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91.发明申请SYSTEM, METHOD AND COMPUTER PROGRAM PRODUCT FOR PROVIDING A SHARED MEMORY TRANSLATION FACILITY 有权用于提供共享存储器翻译设备的系统，方法和计算机程序产品公开(公告)号：US20090216963A1
公开(公告)日：2009-08-27
申请号：US12037177
申请日：2008-02-26
申请人： Dan F. Greiner , Lisa C. Heller , Damian L. Osisek , Erwin Pfeffer , Donald W. Schmidt , Jaya Srikrishnan , Charles F. Webb , Leslie W. Wyman
发明人： Dan F. Greiner , Lisa C. Heller , Damian L. Osisek , Erwin Pfeffer , Donald W. Schmidt , Jaya Srikrishnan , Charles F. Webb , Leslie W. Wyman
CPC分类号： G06F12/00 , G06F12/0284 , G06F12/109 , G06F12/1441 , G06F2212/656
摘要： A system, method and computer program product for providing a shared memory translation facility. The method includes receiving a request for access to a memory address from a requestor at a configuration, the receiving at a shared memory translation mechanism. It is determined if the memory address refers to a shared memory object (SMO), the SMO accessible by a plurality of configurations. In response to determining that the memory address refers to the SMO, it is determined if the configuration has access to the SMO. In response to determining that the configuration has access to the SMO, the requestor is provided a system absolute address for the SMO and access to the SMO. In this manner direct interchange of data between the plurality of configurations is allowed.
摘要翻译： 一种用于提供共享存储器翻译设备的系统，方法和计算机程序产品。 该方法包括在配置下从请求者接收访问存储器地址的请求，在共享存储器转换机制处接收。 确定存储器地址是指共享存储器对象（SMO），SMO可由多个配置访问。 响应于确定存储器地址是指SMO，确定配置是否可以访问SMO。 响应于确定配置可以访问SMO，请求者为SMO提供系统绝对地址并访问SMO。 以这种方式允许在多个配置之间直接互换数据。
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公开(公告)号：US20090193214A1
公开(公告)日：2009-07-30
申请号：US11972718
申请日：2008-01-11
申请人： DAN F. GREINER , Charles W. Gainey, JR. , Lisa C. Heller , Damian L. Osisek , Timothy J. Slegel , Gustav E. Sittmann
发明人： DAN F. GREINER , Charles W. Gainey, JR. , Lisa C. Heller , Damian L. Osisek , Timothy J. Slegel , Gustav E. Sittmann
IPC分类号： G06F12/10
CPC分类号： G06F12/1036 , G06F9/30043 , G06F9/30145
摘要： What is disclosed is a frame management function defined for a machine architecture of a computer system. In one embodiment, a machine instruction is obtained containing an opcode for a frame management instruction identifying a first and second general register. Clear frame information is obtained from the first general register having a frame size field indicating whether a storage frame is a small or large block of data. The second general register contains an operand address of a storage frame. If the storage frame is a small block, all bytes of the small block of data are set to zero. If the storage frame is a large block of data, an operand address of an initial first block of data within the large block is obtained from the second general register. All data of all blocks within the large block are cleared starting from the initial first block.
摘要翻译： 公开的是针对计算机系统的机器结构定义的帧管理功能。 在一个实施例中，获得包含识别第一和第二通用寄存器的帧管理指令的操作码的机器指令。 从具有指示存储帧是小数据块还是大数据块的帧大小字段的第一通用寄存器获得清除帧信息。 第二个通用寄存器包含存储帧的操作数地址。 如果存储帧是小块，则小块数据的所有字节都被设置为零。 如果存储帧是大数据块，则从第二通用寄存器获得大块内的初始第一数据块的操作数地址。 大块内的所有块的所有数据从初始第一块开始清零。
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公开(公告)号：US20090187732A1
公开(公告)日：2009-07-23
申请号：US11972715
申请日：2008-01-11
申请人： DAN F. GREINER , Charles W. Gainey, JR. , Lisa C. Heller , Damian L. Osisek , Erwin Pfeffer , Timothy J. Slegel , Charles F. Webb
发明人： DAN F. GREINER , Charles W. Gainey, JR. , Lisa C. Heller , Damian L. Osisek , Erwin Pfeffer , Timothy J. Slegel , Charles F. Webb
IPC分类号： G06F12/10
CPC分类号： G06F12/1009 , G06F12/145 , G06F2212/651 , G06F2212/652
摘要： What is provided is an enhanced dynamic address translation facility. In one embodiment, a virtual address to be translated and an initial origin address of any one of a region first table, a region second table, a region third table, or a segment table are obtained. Based on the obtained initial origin address, a segment table entry is obtained which contains a format control and DAT protection fields. If the format control field is enabled, obtaining from the translation table entry a segment-frame absolute address of a large block of data in main storage. The segment-frame absolute address is combined with a page index portion and a byte index portion of the virtual address to form a translated address of the desired block of data. If the DAT protection field is not enabled, fetches and stores are permitted to the desired block of data addressed by the translated virtual address.
摘要翻译： 提供的是增强的动态地址转换设施。 在一个实施例中，获得要转换的虚拟地址和区域第一表，区域秒表，区域第三表或段表中的任何一个的初始起始地址。 基于获得的初始起始地址，获得包含格式控制和DAT保护字段的段表条目。 如果格式控制字段被使能，则从转换表条目获得主存储器中的大块数据的段帧绝对地址。 分段帧绝对地址与虚拟地址的页索引部分和字节索引部分组合，以形成所需数据块的转换地址。 如果DAT保护字段未被使能，则获取和存储被允许被转换的虚拟地址寻址的所需数据块。
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公开(公告)号：US20090187728A1
公开(公告)日：2009-07-23
申请号：US11972694
申请日：2008-01-11
申请人： DAN F. GREINER , Lisa C. Heller , Damian L. Osisek , Erwin Pfeffer , Timothy J. Slegel , Charles F. Webb
发明人： DAN F. GREINER , Lisa C. Heller , Damian L. Osisek , Erwin Pfeffer , Timothy J. Slegel , Charles F. Webb
IPC分类号： G06F9/34
CPC分类号： G06F12/1009 , G06F9/30054 , G06F9/30101 , G06F9/455 , G06F12/1045 , G06F12/109 , G06F12/1475
摘要： What is provided is an enhanced dynamic address translation facility. In one embodiment, a virtual address to be translated and an initial origin address of a translation table of the hierarchy of translation tables are obtained. A segment table entry obtained from a segment table contains a format control field. If the format control field is enabled, a segment-frame absolute address of a large block of data in main storage is obtained from the segment table entry. Each 4K byte block of data within the large block has an associated storage key. Store operations associated with the virtual address are performed to the desired block of data. If the change recording override field is disabled, the change bit of the storage key associated with the desired 4K byte block is set to 1. An indication is then provided that the desired 4K byte block has been modified.
摘要翻译： 提供的是增强的动态地址转换设施。 在一个实施例中，获得要转换的虚拟地址和翻译表的层次结构的转换表的初始起始地址。 从段表获得的段表条目包含格式控制字段。 如果启用格式控制字段，则从段表条目获取主存储器中的大块数据的分段帧绝对地址。 大块内的每4K字节的数据块具有关联的存储密钥。 与虚拟地址相关联的存储操作被执行到期望的数据块。 如果改变记录覆盖字段被禁用，则与期望的4K字节块相关联的存储密钥的改变位被设置为1.然后提供所需的4K字节块已被修改的指示。
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公开(公告)号：US20090182973A1
公开(公告)日：2009-07-16
申请号：US11972705
申请日：2008-01-11
申请人： DAN F. GREINER , Lisa C. Heller , Damian L. Osisek , Erwin Pfeffer , Timothy J. Slegel , Gustav E. Sittmann
发明人： DAN F. GREINER , Lisa C. Heller , Damian L. Osisek , Erwin Pfeffer , Timothy J. Slegel , Gustav E. Sittmann
IPC分类号： G06F9/34
CPC分类号： G06F12/1009 , G06F9/30043 , G06F9/30101 , G06F9/34 , G06F9/342 , G06F2212/651 , G06F2212/657
摘要： What is provided is a load real address function defined for a machine architecture of a computer system. In one embodiment, a machine instruction containing an opcode is obtained indicating that a load real address is to be performed. The instruction further identifies a first general register. Based on the contents of the machine instruction, a virtual address to be translated is obtained. Dynamic address translation is performed on the virtual address to obtain a segment-frame absolute address of a large block of data in memory. If an extended DAT facility and a format control field in the segment table entry are enabled, the address of the block of data is saved in the first general register. A page index portion and a byte index portion of the virtual address may also be saved in the first general register.
摘要翻译： 提供了为计算机系统的机器结构定义的负载实地址功能。 在一个实施例中，获得包含操作码的机器指令，指示要执行负载实际地址。 该指令进一步标识第一个通用寄存器。 根据机器指令的内容，获得要翻译的虚拟地址。 对虚拟地址执行动态地址转换，以获得存储器中大块数据的段帧绝对地址。 如果分段表项中的扩展DAT功能和格式控制字段被使能，数据块的地址将保存在第一个通用寄存器中。 虚拟地址的页索引部分和字节索引部分也可以保存在第一通用寄存器中。
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公开(公告)号：US07523291B2
公开(公告)日：2009-04-21
申请号：US11190710
申请日：2005-07-26
IPC分类号： G06F13/00
CPC分类号： G11C29/02 , G11C29/024 , G11C29/025
摘要： Aliasing errors, occasioned by, for example, a programming error resulting in including extra or missing bits in a storage address, wrong addressing mode, or wrong address context, are detected by providing a storage address configuration including gaps in valid addresses. Such a programming error is detected and an exception is thrown (that is, an addressing error is detected and indicated) responsive to an address reference to such a gap in valid addresses. Gaps are configured at complementary address ranges to facilitate detection of such aliasing errors.
摘要翻译： 通过提供包括有效地址中的间隙的存储地址配置来检测由例如导致存储地址中的额外的或缺少的位，错误的寻址模式或错误的地址上下文的编程错误引起的混叠错误。 检测到这样的编程错误，并且响应于对有效地址中的这种差距的地址引用，抛出异常（即，检测和指示寻址错误）。 间隙配置在互补地址范围，以便于检测到这种混叠错误。
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公开(公告)号：US4809168A
公开(公告)日：1989-02-28
申请号：US920002
申请日：1986-10-17
CPC分类号： G06F9/466
摘要： In a multi-processing computer system, a method for serializing references to shared data objects, such as pages, tables, and the like, that permits the system processes to reference objects on a shared access basis without obtaining a shared lock. A point of execution of the control program is monitored that is common to all processes in the system, which occurs regularly in the execution of each process and across which no references to any data object can be maintained by any process, except references using locks. A system reference point is established, which occurs after each process in the system has passed the monitored point of execution at least once since the last such system reference point. Operations requiring exclusive access, such as modification or destruction of the data object, are performed by, first, obtaining a conventional exclusive lock, then preventing any subsequent references to the data object, waiting until two of the system reference points have occurred, and, finally, performing the operation. Significant reductions in overhead can be achieved through the application of the invention.
摘要翻译： 在多处理计算机系统中，一种用于序列化对共享数据对象（诸如页面，表等）的引用的方法，其允许系统进程在共享访问的基础上引用对象而不获得共享锁。 监视控制程序的执行点，这是系统中所有进程通用的执行点，这在执行每个进程时定期出现，除了使用锁定的引用之外，任何进程都不能维护对任何数据对象的引用。 建立系统参考点，这是在系统中的每个进程自上次这样的系统参考点以来至少经过一次监视的执行点之后发生的。 执行需要独占访问的操作，例如数据对象的修改或破坏，首先通过获得常规的排他锁，然后防止对数据对象的任何后续的引用，直到两个系统参考点发生，等待， 最后，执行操作。 通过应用本发明可以显着降低开销。
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公开(公告)号：US20130339561A1
公开(公告)日：2013-12-19
申请号：US13524903
申请日：2012-06-15
IPC分类号： G06F13/24
CPC分类号： G06F13/24 , G06F9/466 , G06F11/3636
摘要： A transaction is initiated within a computing environment, and based on detecting a program event recording event, an interrupt is presented for the transaction. Subsequent to the interrupt, one or more controls are set to inhibit presentation of another interrupt based on detecting another PER event. Thereafter, the transaction is re-executed and PER events detected during execution of the transaction are ignored.
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公开(公告)号：US08527715B2
公开(公告)日：2013-09-03
申请号：US12037177
申请日：2008-02-26
申请人： Dan F. Greiner , Lisa C. Heller , Damian L. Osisek , Erwin Pfeffer , Donald W. Schmidt , Jaya Srikrishnan , Charles F. Webb , Leslie W. Wyman
发明人： Dan F. Greiner , Lisa C. Heller , Damian L. Osisek , Erwin Pfeffer , Donald W. Schmidt , Jaya Srikrishnan , Charles F. Webb , Leslie W. Wyman
IPC分类号： G06F13/00
CPC分类号： G06F12/00 , G06F12/0284 , G06F12/109 , G06F12/1441 , G06F2212/656
摘要： A system, method and computer program product for providing a shared memory translation facility. The method includes receiving a request for access to a memory address from a requestor at a configuration, the receiving at a shared memory translation mechanism. It is determined if the memory address refers to a shared memory object (SMO), the SMO accessible by a plurality of configurations. In response to determining that the memory address refers to the SMO, it is determined if the configuration has access to the SMO. In response to determining that the configuration has access to the SMO, the requestor is provided a system absolute address for the SMO and access to the SMO. In this manner direct interchange of data between the plurality of configurations is allowed.
摘要翻译： 一种用于提供共享存储器翻译设备的系统，方法和计算机程序产品。 该方法包括在配置下从请求者接收访问存储器地址的请求，在共享存储器转换机制处接收。 确定存储器地址是指共享存储器对象（SMO），SMO可由多个配置访问。 响应于确定存储器地址是指SMO，确定配置是否可以访问SMO。 响应于确定配置可以访问SMO，请求者为SMO提供系统绝对地址并访问SMO。 以这种方式允许在多个配置之间直接互换数据。
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100.发明授权System, method and computer program product for providing quiesce filtering for shared memory 有权用于为共享存储器提供静默滤波的系统，方法和计算机程序产品公开(公告)号：US08458438B2
公开(公告)日：2013-06-04
申请号：US12037897
申请日：2008-02-26
CPC分类号： G06F12/1027 , G06F2212/681
摘要： A system, method and computer program product for providing quiesce filtering for shared memory. The method includes receiving a shared-memory quiesce request at a processor. The request includes a donor zone. The processor includes translation look aside buffer one (TLB1). It is determined that the shared-memory request can be filtered by the processor if there not any shared memory entries in the TLB1 and the donor zone is not equal to a current zone of the processor and the processor is not running in host mode. The shared-memory quiesce request is filtered in response to the determining.
摘要翻译： 一种用于为共享存储器提供静默滤波的系统，方法和计算机程序产品。 该方法包括在处理器处接收共享存储器静默请求。 请求包括捐助者区域。 处理器包括翻译后备缓冲区（TLB1）。 如果TLB1中没有任何共享存储器条目，并且供体区域不等于处理器的当前区域并且处理器未在主机模式下运行，则确定共享存储器请求可被处理器过滤。 响应于确定，对共享内存静默请求进行过滤。
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