公开(公告)号：US07041546B2

公开(公告)日：2006-05-09

申请号：US10639773

申请日：2003-08-13

申请人： Yuichiro Morozumi ,  Kazuhide Hasebe ,  Shigeru Nakajima ,  Haruhiko Furuya ,  Dong-Kyun Choi ,  Takahito Umehara ,  Katsushige Harada ,  Tomonori Fujiwara ,  Hirotake Fujita

发明人： Yuichiro Morozumi ,  Kazuhide Hasebe ,  Shigeru Nakajima ,  Haruhiko Furuya ,  Dong-Kyun Choi ,  Takahito Umehara ,  Katsushige Harada ,  Tomonori Fujiwara ,  Hirotake Fujita

IPC分类号： H01L21/8238

CPC分类号： H01L28/56 ,  H01L21/31612 ,  H01L21/31637 ,  H01L21/31645 ,  H01L28/40

摘要： In a capacitor of an MIM (Metal-Insulator-Metal) structure, a silicon-containing high dielectric film (e.g., a hafnium silicate film) containing a silicon atom, as well as a silicon-free high dielectric film (e.g., a tantalum oxide film) containing no silicon atom is interposed between a lower electrode film and an upper electrode film which are made of metal or metal compound. By adding the silicon-containing high dielectric film, a leak current can be suppressed and the change in capacitor capacity accompanied with the change in applied voltage can be reduced.

摘要翻译： 在MIM（金属 - 绝缘体 - 金属）结构的电容器中，含有硅原子的含硅高电介质膜（例如，硅酸铪膜）以及无硅高介电膜（例如，钽 不含硅原子的氧化膜插入由金属或金属化合物制成的下电极膜和上电极膜之间。 通过添加含硅高介电膜，可以抑制泄漏电流，并且可以减少伴随施加电压变化的电容器容量的变化。

公开(公告)号：US06782854B2

公开(公告)日：2004-08-31

申请号：US10649619

申请日：2003-08-28

申请人： Motoo Nakamura ,  Shigeru Nakajima

发明人： Motoo Nakamura ,  Shigeru Nakajima

IPC分类号： F01L134

CPC分类号： F01L1/3442 ,  F01L2001/34473 ,  F01L2001/34479 ,  F01L2001/34483

摘要： A valve timing control device includes a rotation member for opening and closing values, a rotation transmitting member rotatably mounted on the rotation member, a fluid chamber defined between the rotation member and the rotation transmitting member, a vane fitted into a vane groove formed on the rotation member or the rotation transmitting member so as to divide the fluid chamber into a advance angle pressure chamber and a retard angle pressure chamber, the vane groove having contacting portions contacted with the vane and an elastic member disposed between the vane and the rotation member or the rotation transmitting member, wherein the radial length between the bottom portion of the vane groove and a bottom portion side end portion of the contacting portion is larger than a radial length between the bottom portion of the vane groove and an engaging portion of the vane engaged with the elastic member.

摘要翻译： 气门正时控制装置包括用于打开和关闭数值的旋转构件，可旋转地安装在旋转构件上的旋转传递构件，限定在旋转构件和旋转传递构件之间的流体室，安装在形成在旋转构件 旋转构件或旋转传递构件，以便将流体室分成提前角压力室和延迟角压力室，叶片槽具有与叶片接触的接触部分和设置在叶片和旋转构件之间的弹性构件， 旋转传递部件，其中，所述叶片槽的底部与所述接触部的底部侧端部之间的径向长度大于所述叶片槽的底部与所述叶片的接合部之间的径向长度， 与弹性构件。

公开(公告)号：US5608388A

公开(公告)日：1997-03-04

申请号：US543769

申请日：1995-10-16

申请人： Shigeru Nakajima

发明人： Shigeru Nakajima

IPC分类号： H04L29/02 ,  B60R16/00 ,  H04L12/40 ,  H04L29/06 ,  H04Q9/00

CPC分类号： H04L12/4135 ,  H04L12/40032 ,  H04L29/06 ,  H04L2012/40273

摘要： A data transmission system includes control units connected to a network line and various sensors. Each of the control units includes an ID code comparing/processing section. In each of the ID code comparing/processing sections, multiplex communication control units, FIFO memory, CPU, main register and data extracting circuit are provided. Each of the multiplex communication control units receives an ID code extracted from a data frame transmitted via the network line by the data extracting circuit and checks whether the received ID code coincides with preset ID codes or not. The FIFO memory receives and holds the ID code in response to a coincidence signal from the multiplex communication control units and outputs a signal indicating that the ID code is held. The CPU detects that an ID code attached to main data necessary in the ID code comparing/processing section is input from the network line in response to a signal indicating that the ID code is held, processes main data stored in the main register corresponding to the ID code held in the FIFO memory.

摘要翻译： 数据传输系统包括连接到网络线路和各种传感器的控制单元。 每个控制单元包括ID码比较/处理部分。 在每个ID码比较/处理部分中，提供了多路复用通信控制单元，FIFO存储器，CPU，主寄存器和数据提取电路。 每个复用通信控制单元从数据提取电路接收经由网络线发送的数据帧提取的ID码，并检查接收的ID码是否与预置的ID码一致。 FIFO存储器响应于来自多路复用通信控制单元的一致信号而接收并保持ID码，并输出表示该ID代码被保持的信号。 CPU检测到响应于指示保持了ID码的信号，从网络线输入附加到ID码比较/处理部分所需的主数据的ID代码，处理存储在主寄存器中对应的主寄存器的主数据 ID代码保存在FIFO存储器中。

公开(公告)号：US5473177A

公开(公告)日：1995-12-05

申请号：US180479

申请日：1994-01-12

申请人： Shigeru Nakajima

发明人： Shigeru Nakajima

IPC分类号： H01L29/20 ,  H01L21/338 ,  H01L29/778 ,  H01L29/812 ,  H01L29/161 ,  H01L29/205 ,  H01L29/225

CPC分类号： H01L29/7783

摘要： There is disclosed a field effect transistor having a channel layer, an electron supply layer, and a spacer layer formed between the channel layer and the electron supply layer. The spacer layer has a thickness for spatially separating a two-dimensional electron gas from donor ions in the electron supply layer, and for forming the two-dimensional electron gas in the channel layer by the Coulomb force of the donor ions. The spacer layer material has better high frequency characteristics than that of the electron supply layer.

摘要翻译： 公开了一种场效应晶体管，其具有沟道层，电子供应层和形成在沟道层和电子供应层之间的间隔层。 间隔层具有用于在电子供给层中空间分离二维电子气体与供体离子的厚度，并且通过供体离子的库仑力在沟道层中形成二维电子气。 间隔层材料具有比电子供给层更好的高频特性。

公开(公告)号：US5436470A

公开(公告)日：1995-07-25

申请号：US818537

申请日：1992-01-09

申请人： Shigeru Nakajima

发明人： Shigeru Nakajima

IPC分类号： H01L29/812 ,  H01L29/161 ,  H01L29/205

CPC分类号： H01L29/8128

摘要： The invention provides a FET by forming a channel layer in layer including "n" type impurity at high concentration, which is sandwiched by a first semiconductor layer and a second semiconductor layer lightly doped with impurity. Therefore even when electrons in the channel layer obtain high energy, the electrons in this arrangement rush out essentially to the second semiconductor layer excelling in electron carrying characteristic, thus a travelling speed of the electrons in the channel layer is not lowered. Furthermore the channel layer being formed in layer and allowed to include impurity at high concentration, the current drive capability can be improved.

摘要翻译： 本发明通过在由第一半导体层和轻掺杂杂质的第二半导体层夹在高浓度的“n”型杂质的层中形成沟道层来提供FET。 因此，即使在沟道层中的电子获得高能量的情况下，该配置中的电子基本上突出到具有优异的电子携带特性的第二半导体层，因此沟道层中的电子的移动速度不降低。 此外，沟道层形成为层并允许包含高浓度的杂质，可以提高电流驱动能力。

公开(公告)号：US5408111A

公开(公告)日：1995-04-18

申请号：US025410

申请日：1993-02-26

申请人： Shigeru Nakajima ,  Hideki Hayashi

发明人： Shigeru Nakajima ,  Hideki Hayashi

IPC分类号： H01L21/338 ,  H01L29/10 ,  H01L29/36 ,  H01L29/80 ,  H01L29/804 ,  H01L29/812

CPC分类号： H01L29/66863 ,  H01L29/1029 ,  H01L29/66871 ,  H01L29/802 ,  H01L29/365

摘要： A buffer layer, a first undoped layer, a first active layer and second undoped layer, a second active layer, a third undoped layer, a cap layer and contact layers are epitaxially grown on a semiconductor substrate in the stated order. A gate electrode is formed in a recess etched groove which formed in the center and reaches the cap layer through the contact layers. A drain electrode and a source electrode are formed on the contact layers and on both sides of the gate electrode.

摘要翻译： 按照所述顺序在半导体衬底上外延生长缓冲层，第一未掺杂层，第一有源层和第二未掺杂层，第二有源层，第三未掺杂层，覆盖层和接触层。 栅电极形成在形成在中心并通过接触层到达盖层的凹陷蚀刻槽中。 漏电极和源电极形成在栅电极的接触层和两侧上。

公开(公告)号：US5382821A

公开(公告)日：1995-01-17

申请号：US988258

申请日：1992-12-14

申请人： Shigeru Nakajima

发明人： Shigeru Nakajima

IPC分类号： H01L29/423 ,  H01L27/085 ,  H01L27/088 ,  H01L27/105

CPC分类号： H01L29/42316

摘要： There is disclosed an FET having a high drain breakdown voltage and a short gate length comprising an active layer 2 formed on a surface layer of a semiconductor substrate 1; a highly doped impurity source region 4 and highly doped impurity drain region 4 formed in the surface layer of the semiconductor substrate 1 to sandwich the active layer 2; an insulation film 5 formed on the highly doped impurity source region 4; a gate electrode 8 formed on the active layer 2 and the insulation film 5 while maintaining a constant distance 1.sub.GD from the highly doped impurity drain region 4; and a source electrode 6 and a drain electrode 7 formed on the highly doped impurity source region 4 and the highly doped impurity drain region 4, respectively.

摘要翻译： 公开了一种具有高漏极击穿电压和短栅极长度的FET，其包括形成在半导体衬底1的表面层上的有源层2; 形成在半导体衬底1的表面层中以夹持有源层2的高掺杂杂质源区4和高掺杂杂质漏极区4; 形成在高掺杂杂质源区4上的绝缘膜5; 形成在有源层2和绝缘膜5上的栅电极8，同时保持与高掺杂杂质漏区4的距离1GD不变; 以及分别形成在高掺杂杂质源极区4和高掺杂杂质漏极区4上的源电极6和漏电极7。

公开(公告)号：US4974075A

公开(公告)日：1990-11-27

申请号：US221976

申请日：1988-07-20

申请人： Shigeru Nakajima

发明人： Shigeru Nakajima

IPC分类号： A61B1/05 ,  H01R13/658 ,  H04N5/225 ,  H04N5/232

CPC分类号： A61B1/00124 ,  A61B1/05 ,  H01R13/6585 ,  H04N5/2251 ,  H04N5/2253 ,  H04N5/23203 ,  H04N2005/2255

摘要： An electrical connector for electrically connecting an image pickup unit and a system for processing signals supplied therefrom. Signal cables are separated into some groups so that signals in different cables in each group do not considerably interfere with each other. The groups of cables are respectively shielded by shielding members, and an inner conductor of each shielded signal cable is connected to a contact of a single-pin structure for electrical connection to a corresponding conductor while shielding members are electrically connected by electrical contacts of a single-pin structure.

摘要翻译： 一种用于电连接图像拾取单元和用于处理从其提供的信号的系统的电连接器。 信号电缆分为几组，每组不同电缆的信号彼此之间不会相互干扰。 电缆组分别被屏蔽构件屏蔽，并且每个屏蔽信号电缆的内部导体连接到单针结构的触点，用于与对应导体电连接，而屏蔽构件通过单个电缆的电触点电连接 in结构。

公开(公告)号：US4854301A

公开(公告)日：1989-08-08

申请号：US119742

申请日：1987-11-12

申请人： Shigeru Nakajima

发明人： Shigeru Nakajima

IPC分类号： A61B1/00 ,  A61B17/00 ,  A61B19/00

CPC分类号： A61B1/00149 ,  A61B1/00147 ,  A61B90/50 ,  A61B90/60 ,  A61B1/00039 ,  A61B2017/00973

摘要： An endoscope chair apparatus whereby the operator can inspect and treat the patient by using an endoscope while sitting on the chair and an operating switch for the endoscope apparatus is provided in a position in which the switch can be operated by the operator in this state.

摘要翻译： 一种内窥镜椅装置，其能够使操作者在坐在椅子上时通过使用内窥镜对患者进行检查和处理，并且在该状态下，设置有操作者能够操作开关的内窥镜装置的操作开关。

公开(公告)号：US4774200A

公开(公告)日：1988-09-27

申请号：US844477

申请日：1986-03-26

申请人： Shigeru Nakajima ,  Toshiki Ebata

发明人： Shigeru Nakajima ,  Toshiki Ebata

IPC分类号： H01L29/812 ,  H01L21/285 ,  H01L21/338 ,  H01L29/423 ,  H01L29/80

CPC分类号： H01L29/66878 ,  H01L21/28587 ,  H01L29/42316

摘要： A Schottky-gate field effect transistor comprises a substrate, an active layer formed in one surface of the substrate, a Schottky gate electrode in the form of an inverted trapezoid on the active layer. A heavily doped region is formed in the one surface of the substrate at each side of the inverted trapezoid Schottky gate electrode separately from the side edge of the bottom of the Schottky gate electrode by a certain distance but in self-alignment with the corresponding side edge of the top of the inverted trapezoid Schottky gate electrode. Source and drain electrodes are respectively formed on the heavily doped regions in ohmic contact thereto in such a manner that the edge of each of the source and drain electrodes close to Schottky gate electrode is in alignment with the corresponding side edge of the top of the inverted-trapezoid gate electrode.

摘要翻译： 肖特基栅场效应晶体管包括衬底，形成在衬底的一个表面中的有源层，在有源层上呈倒梯形形式的肖特基栅电极。 在反相梯形肖特基栅电极的每一侧的基板的一个表面中，与肖特基栅电极的底部的侧边缘分开地形成一个重掺杂区，距离相对于相应的边缘自对准 的倒梯形肖特基电极的顶部。 源电极和漏极电极分别形成在与其欧姆接触的重掺杂区域上，使得靠近肖特基栅电极的源电极和漏电极中的每一个的边缘与倒置的顶部的相应侧边缘对准 梯形栅电极。