Vertical connector based packaging solution for integrated circuits
    91.
    发明授权
    Vertical connector based packaging solution for integrated circuits 失效
    用于集成电路的垂直连接器封装解决方案

    公开(公告)号:US6005776A

    公开(公告)日:1999-12-21

    申请号:US2775

    申请日:1998-01-05

    摘要: An assembly featuring a substrate and a plurality of components. The plurality of components are packaged to be connected in a vertical orientation to the substrate. These components include (i) a vertical chip-scale package (CSP), (ii) an integrated circuit die and (iii) an interconnect. Including a plurality of connection leads, the vertical CSP contains the die which is generally situated along a vertical plane. The interconnect, capable of transferring information between the plurality of connection leads and the integrated circuit die, includes a first segment generally perpendicular to the vertical plane and connected to at least one connection lead. The interconnect further includes a second segment generally in parallel to the vertical plane and connected to the integrated circuit die.

    摘要翻译: 一种具有基板和多个部件的组件。 多个部件被封装成垂直定向地连接到基板。 这些组件包括(i)垂直芯片级封装(CSP),(ii)集成电路管芯和(iii)互连。 包括多个连接引线,垂直CSP包含通常沿垂直平面定位的管芯。 能够在多个连接引线和集成电路管芯之间传送信息的互连件包括大致垂直于垂直平面并连接到至少一个连接引线的第一段。 互连还包括大致平行于垂直平面并连接到集成电路管芯的第二段。

    Encoder and decoder for an SEC-DED-S4ED rotational code
    92.
    发明授权
    Encoder and decoder for an SEC-DED-S4ED rotational code 失效
    用于SEC-DED-S4ED旋转码的编码器和解码器

    公开(公告)号:US5856987A

    公开(公告)日:1999-01-05

    申请号:US801617

    申请日:1997-02-18

    申请人: Thomas J. Holman

    发明人: Thomas J. Holman

    IPC分类号: H03M7/36 H03M13/15 H03M13/00

    CPC分类号: H03M13/151

    摘要: A computer system employs a SEC-DED-S4ED rotational error control code (ECC) wherein all columns of H matrix are linearly independent and have an odd weight, and are arranged to allow detection of 4-bit byte errors. The ECC includes check bits arranged in a specific manner in designated columns of the matrix to permit detection and correction of single bit errors, as well as detection of double, triple and quadruple bit errors. The computer system employing the ECC also includes a data path having a variety of implementations; e.g., a single 72-bit path, two 36-bit paths, or a single 36-bit path.

    摘要翻译: 计算机系统采用SEC-DED-S4ED旋转误差控制码(ECC),其中H矩阵的所有列都是线性独立的并且具有奇数权重,并且被布置为允许检测4位字节错误。 ECC包括以特定方式布置在矩阵的指定列中的校验位,以允许检测和校正单个位错误,以及检测双重,三重和四重位错误。 采用ECC的计算机系统还包括具有各种实现的数据路径; 例如单个72位路径,两个36位路径或单个36位路径。

    Bonding sleeve for medical device
    96.
    发明授权
    Bonding sleeve for medical device 有权
    医疗器械接合套

    公开(公告)号:US07785340B2

    公开(公告)日:2010-08-31

    申请号:US10066994

    申请日:2002-02-04

    IPC分类号: A61M29/00 A61F2/06

    CPC分类号: A61F2/958 A61F2002/9583

    摘要: A medical device delivery system comprises an inner tube, a medical device disposed about a portion of the distal region of the inner tube, a medical device sheath disposed about the medical device, a medical device sheath retraction device extending proximally from the medical device sheath and an outer sheath disposed about a portion of the medical device sheath retraction device. The distal end of the outer sheath terminates at least one medical device length proximal of the medical device. The medical device sheath is movable relative to the outer sheath and relative to the inner tube.

    摘要翻译: 医疗装置输送系统包括内管,围绕内管的远端区域的一部分设置的医疗装置,围绕医疗装置设置的医疗装置护套,从医疗装置护套向近侧延伸的医疗装置护套收回装置, 设置在所述医疗装置鞘缩回装置的一部分周围的外护套。 外护套的远端终止医疗装置近端的至少一个医疗装置长度。 医疗器械护套可相对于外护套和相对于内管移动。

    Method and apparatus for high reliability data storage and retrieval operations in multi-level flash cells
    97.
    发明申请
    Method and apparatus for high reliability data storage and retrieval operations in multi-level flash cells 失效
    用于多级闪存单元中高可靠性数据存储和检索操作的方法和装置

    公开(公告)号:US20100042772A1

    公开(公告)日:2010-02-18

    申请号:US12228795

    申请日:2008-08-14

    CPC分类号: G11C11/5628 G11C2211/5641

    摘要: One or more multi-level NAND flash cells are operated so as to store only single-level data, and these operations achieve an increased level of charge separation between the data states of the single-level operation by requiring a write to both the upper and lower pages, even though only one bit of data is being stored. That is, the second write operation increases the difference in floating gate charge between the erased state and the programmed state of the first write operation without changing the data in the flash memory cell. In one embodiment, a controller instructs the flash memory to perform two write operations for storing a single bit of data in an MLC flash cell. In another embodiment, the flash memory recognizes that a single write operation is directed a high reliability memory area and internally generates the required plurality of programming steps to place at least a predetermined amount of charge on the specified floating gate.

    摘要翻译: 操作一个或多个多电平NAND闪存单元以仅存储单级数据,并且这些操作通过要求写入上层和第二级的单级操作来实现单级操作的数据状态之间的电荷分离水平的提高 即使只有一位数据被存储,也是较低的页面。 也就是说,第二写入操作增加擦除状态和第一写操作的编程状态之间的浮栅电荷的差异,而不改变闪存单元中的数据。 在一个实施例中,控制器指示闪速存储器执行用于在MLC闪存单元中存储单个数据位的两个写入操作。 在另一个实施例中,闪速存储器识别出单个写入操作被引导到高可靠性存储区域,并且在内部产生所需的多个编程步骤以将至少预定量的电荷放置在指定的浮动栅极上。