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703 条记录 (耗时 0.108 秒)

    Systems utilizing variable program voltage increment values in non-volatile memory program operations
    91.
    发明授权
    Systems utilizing variable program voltage increment values in non-volatile memory program operations 有权
    在非易失性存储器程序操作中利用可变程序电压增量值的系统

    公开(公告)号：US07450426B2

    公开(公告)日：2008-11-11

    申请号：US11548267

    申请日：2006-10-10

    申请人： Yan Li ,  Fanglin Zhang ,  Toru Miwa ,  Farookh Moogat

    发明人： Yan Li ,  Fanglin Zhang ,  Toru Miwa ,  Farookh Moogat

    IPC分类号： G11C11/34

    CPC分类号： G11C16/12 ,  G11C11/5628 ,  G11C16/0483 ,  G11C16/3481

    摘要： The lowest programmed state in multi-state non-volatile flash memory devices can suffer from an increased level of bit line to bit line capacitive charge coupling when compared with other states. Program voltages applied to memory cells as increasing voltage pulses can be incremented using smaller values when programming memory cells to the lowest programmable state. Smaller increments in the applied voltage allow for greater precision and a narrower threshold voltage distribution to compensate for the disproportionate charge coupling experienced by cells programmed to this state. Smaller increment values can be used when switching from lower page to upper page programming in some implementations. In a pipelined programming architecture where cells forming a physical page store two logical pages of data and programming for one logical page begins before receiving data for the other logical page, the increment value can be increased when switching from programming the first logical page to programming both pages concurrently.

    摘要翻译： 与其他状态相比，多状态非易失性闪存器件中的最低编程状态可能会受到位线到位线电容电荷耦合的增加的影响。 当将存储器单元编程到最低可编程状态时，可以使用较小的值将增加的电压脉冲施加到存储单元的编程电压递增。 施加电压的较小增量允许更高的精度和更窄的阈值电压分布，以补偿编程到该状态的单元所经历的不成比例的电荷耦合。 在一些实现中从较低页切换到上页编程时，可以使用较小的增量值。 在流水线编程架构中，形成物理页面的单元存储两个逻辑页面的数据和一个逻辑页面的编程，在接收另一个逻辑页面的数据之前开始，当从第一个逻辑页面的编程切换到编程时，增量值可以增加 同时页面。

    Method for power-saving multi-pass sensing in non-volatile memory
    92.
    发明授权
    Method for power-saving multi-pass sensing in non-volatile memory 有权
    非易失性存储器中省电多通道感测的方法

    公开(公告)号：US07447094B2

    公开(公告)日：2008-11-04

    申请号：US11322427

    申请日：2005-12-29

    申请人： Shou-Chang Tsao ,  Yan Li

    发明人： Shou-Chang Tsao ,  Yan Li

    IPC分类号： G11C7/00

    CPC分类号： G11C11/5642 ,  G11C7/08 ,  G11C7/12 ,  G11C16/0483 ,  G11C16/24 ,  G11C16/28 ,  G11C2207/005 ,  G11C2211/5631

    摘要： Power-saving techniques are employed in sensing a group of non-volatile memory cells in parallel. One technique is that the coupling of the memory cells to their bit lines is delayed during a precharge operation in order to reduce the cells'currents working against the precharge. Another technique is that a power-consuming precharge period is minimized by preemptively starting the sensing in a multi-pass sensing operation. High current cells not detected as a result of the premature sensing will still be able to be detected in a subsequent pass.

    摘要翻译： 同时采用省电技术来感测一组非易失性存储单元。 一种技术是在预充电操作期间，存储器单元与其位线的耦合被延迟，以便减小单元电流对预充电的作用。 另一种技术是通过在多遍感测操作中预先启动感测来最大限度地减少功耗的预充电周期。 作为过早感测的结果，未检测到的高电流电流仍然能够在随后的通过中被检测。

    Housing wheel engine
    95.
    发明申请
    Housing wheel engine 有权
    轴轮发动机

    公开(公告)号：US20080251043A1

    公开(公告)日：2008-10-16

    申请号：US11786977

    申请日：2007-04-13

    申请人： Yan Li

    发明人： Yan Li

    IPC分类号： F02B75/00 ,  F16C19/00 ,  F16H1/32 ,  F16N17/00

    CPC分类号： F02B53/04 ,  F01B2009/045 ,  F01C1/077 ,  F02B53/06 ,  Y02T10/17

    摘要： Disclosed herein is a housing wheel engine that has one wheel shaped combustion housing, the housing wheel engine can hold several pistons which's both sides working inside the combustion housing. The housing wheel engine transmits its rotating movement directly to the driveshaft by planetary gearsets. A four strokes time mechanism provided by planetary gearsets.

    摘要翻译： 这里公开了具有一个轮形燃烧壳体的壳轮发动机，该壳轮发动机可以容纳几个在燃烧壳体内部工作的两个活塞。 外壳轮发动机通过行星齿轮组将其旋转运动直接传递到驱动轴。 由行星齿轮组提供的四冲程时间机构。

    Flexible and area efficient column redundancy for non-volatile memories
    97.
    发明授权
    Flexible and area efficient column redundancy for non-volatile memories 有权
    非易失性存储器的灵活和区域高效的列冗余

    公开(公告)号：US07405985B2

    公开(公告)日：2008-07-29

    申请号：US11619524

    申请日：2007-01-03

    申请人： Raul-Adrian Cernea ,  Yan Li

    发明人： Raul-Adrian Cernea ,  Yan Li

    IPC分类号： G11C29/00

    CPC分类号： G11C7/1036 ,  G11C29/848

    摘要： A non-volatile memory wherein bad columns in the array of memory cells can be removed is described. Additionally, substitute redundant columns can replace the removed columns. Both of these processes are performed on the memory in a manner that is externally transparent and, consequently, need not be managed externally by the host or controller to which the memory is attached. An inventory of the bad columns can be maintained on the memory. At power up, the list of bad columns is used to fuse out the bad columns. The memory may also contain a number of redundant columns that can be used to replace the bad columns.

    摘要翻译： 描述了可以去除存储器单元阵列中的不良列的非易失性存储器。 另外，替换冗余列可以替换已删除的列。 这些处理都以外部透明的方式在存储器上执行，因此不需要由附加存储器的主机或控制器在外部进行管理。 可以在内存上维护坏列的清单。 上电时，不良列的列表用于对不良列进行融合。 内存还可能包含一些可用于替换不良列的冗余列。

    NON-VOLATILE STORAGE SYSTEM WITH INITIAL PROGRAMMING VOLTAGE BASED ON TRIAL
    98.
    发明申请
    NON-VOLATILE STORAGE SYSTEM WITH INITIAL PROGRAMMING VOLTAGE BASED ON TRIAL 有权
    基于试验的具有初始编程电压的非易失性存储系统

    公开(公告)号：US20080158980A1

    公开(公告)日：2008-07-03

    申请号：US11616665

    申请日：2006-12-27

    申请人： Teruhiko Kamei ,  Yan Li

    发明人： Teruhiko Kamei ,  Yan Li

    IPC分类号： G11C11/34

    CPC分类号： G11C16/10 ,  G11C11/5628 ,  G11C16/0483 ,  G11C16/3454

    摘要： A trial programming process is performed for a first set of one or more non-volatile storage elements to test usage of the non-volatile storage system. Based on this trial programming, a programming signal is calibrated by adjusting its initial magnitude. The calibrated programming signal is then used to program a second set of non-volatile storage elements (which may or may not include the first set).

    摘要翻译： 对第一组一个或多个非易失性存储元件执行试用编程过程以测试非易失性存储系统的使用。 基于该试用编程，通过调整编程信号的初始幅度来校准编程信号。 然后，校准的编程信号用于编程第二组非易失性存储元件（其可以包括或可以不包括第一组）。

    Method and apparatus for measuring a retinal sublayer characteristic
    99.
    发明授权
    Method and apparatus for measuring a retinal sublayer characteristic 有权
    用于测量视网膜亚层特征的方法和装置

    公开(公告)号：US07347548B2

    公开(公告)日：2008-03-25

    申请号：US10833524

    申请日：2004-04-28

    申请人： David Huang ,  Ou Tan ,  Yan Li

    发明人： David Huang ,  Ou Tan ,  Yan Li

    IPC分类号： A61B3/10

    CPC分类号： A61B3/102

    摘要： Methods and systems are provided for measuring a retinal sublayer characteristic of an eye. A plurality of axial scans are performed over an area of the retina of the eye. Reflections are measured during the axial scans to determine a plurality of sets of reflection intensity values. A given set of reflection intensity values is associated with one of the plurality of axial scans. A progressive refinement boundary detection algorithm is performed using the plurality of sets of reflection intensity values to determine at least one boundary location associated with the retinal sublayer for each of the plurality of sets of reflection intensity values. The retinal sublayer characteristic is determined in response to the determined boundary locations.

    摘要翻译： 提供了用于测量眼睛的视网膜亚层特征的方法和系统。 在眼睛的视网膜的一个区域上执行多个轴向扫描。 在轴向扫描期间测量反射以确定多组反射强度值。 给定的一组反射强度值与多个轴向扫描中的一个相关联。 使用多组反射强度值执行逐行细化边界检测算法，以针对多组反射强度值中的每一组来确定与视网膜子层相关联的至少一个边界位置。 响应于确定的边界位置来确定视网膜亚层特征。

    METHODS IN A PSEUDO RANDOM AND COMMAND DRIVEN BIT COMPENSATION FOR THE CYCLING EFFECTS IN FLASH MEMORY
    100.
    发明申请
    METHODS IN A PSEUDO RANDOM AND COMMAND DRIVEN BIT COMPENSATION FOR THE CYCLING EFFECTS IN FLASH MEMORY 有权
    闪存中循环效应的PSEUDO随机和命令驱动位补偿方法

    公开(公告)号：US20080065813A1

    公开(公告)日：2008-03-13

    申请号：US11530399

    申请日：2006-09-08

    申请人： Yan Li ,  Yupin Kawing Fong

    发明人： Yan Li ,  Yupin Kawing Fong

    IPC分类号： G06F12/00

    CPC分类号： G11C7/1006 ,  G11C16/3418

    摘要： Easily implemented randomization within a flash memory EEPROM reduces the NAND string resistance effect, program disturbs, user read disturbs, and floating gate to floating gate coupling that result from repeated and long term storage of specific data patterns. The randomization may be code generated pseudo randomization or user driven randomization in different embodiments. User driven commands, the timing of which cannot be predicted may be used to trigger and achieve a high level of randomization. Randomly altering the encoding scheme of the data prevents repeated and long term storage of specific data patterns. Even if a user wishes to store the same information for long periods, or to repeatedly store it, it will be randomly encoded with different encoding schemes, and the data pattern will therefore be varied.

    摘要翻译： 易于实现的闪速存储器EEPROM内的随机化可以减少由于特定数据模式的重复和长期存储而导致的NAND串电阻效应，程序干扰，用户读取干扰以及浮动栅极与浮动栅极耦合。 在不同的实施例中，随机化可以是代码生成的伪随机化或用户驱动的随机化。 用户驱动的命令，其定时不能预测可用于触发和实现高水平的随机化。 随机改变数据的编码方案可防止特定数据模式的重复和长期存储。 即使用户希望长时间存储相同的信息，也可以重复存储，将以不同的编码方式进行随机编码，因此数据模式将会变化。