公开(公告)号：US20070295964A1

公开(公告)日：2007-12-27

申请号：US11716068

申请日：2007-03-09

申请人： Akira Ishikawa

发明人： Akira Ishikawa

IPC分类号： H01L29/786 ,  H01L31/112 ,  H01L33/00

CPC分类号： H01L29/786 ,  G02F1/136213 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1255 ,  H01L29/4908 ,  H01L29/78648 ,  Y10S257/903 ,  Y10S257/906 ,  Y10S257/908 ,  Y10S257/924

摘要： A semiconductor device and a method for preparing the same that can solve crack of a semiconductor film, capacitance electrodes and the like due to stress when forming a source electrode and a drain electrode in a semiconductor device having a thin film transistor and a holding capacitance with three or more capacitance electrodes is provided. Before forming the source electrode and the drain electrode, a crystalline silicon film for relaxing the stress is formed, then a contact hole connecting to the semiconductor film of the thin film transistor is opened, and a metal film to be the source electrode and the drain electrode is formed.

摘要翻译： 在具有薄膜晶体管和保持电容的半导体器件中形成源电极和漏电极时由于应力引起的半导体膜，电容电极等的裂纹的半导体器件及其制造方法 提供三个或更多个电容电极。 在形成源电极和漏电极之前，形成用于缓和应力的晶体硅膜，然后打开与薄膜晶体管的半导体膜连接的接触孔，并将作为源电极和漏极的金属膜 形成电极。

公开(公告)号：US20070252210A1

公开(公告)日：2007-11-01

申请号：US11822775

申请日：2007-07-10

申请人： Akira Ishikawa

发明人： Akira Ishikawa

IPC分类号： H01L29/786 ,  H01L29/78

CPC分类号： H01L29/41733 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78675

摘要： The present invention provides a method of manufacturing a semiconductor element having a miniaturized structure and a semiconductor device in which the semiconductor element having a miniaturized structure is integrated highly, by overcoming reduction of the yield caused by alignment accuracy, accuracy of a processing technique by reduced projection exposure, a finished dimension of a resist mask, an etching technique and the like. An insulating film covering a gate electrode is formed, and a source region and a drain region are exposed, a conductive film is formed thereover, a resist having a different film thickness is formed by applying the resist over the conductive film, the entire surface of the resist is exposed to light and developed, or the entire surface of the resist is etched to form a resist mask, and the conductive film is etched by using the resist mask to form a source and drain electrode.

公开(公告)号：US07247562B2

公开(公告)日：2007-07-24

申请号：US10827534

申请日：2004-04-20

申请人： Akira Ishikawa

发明人： Akira Ishikawa

IPC分类号： H01L21/44

CPC分类号： H01L29/41733 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78675

摘要： The present invention provides a method of manufacturing a semiconductor element having a miniaturized structure and a semiconductor device in which the semiconductor element having a miniaturized structure is integrated highly, by overcoming reduction of the yield caused by alignment accuracy, accuracy of a processing technique by reduced projection exposure, a finished dimension of a resist mask, an etching technique and the like. An insulating film covering a gate electrode is formed, and a source region and a drain region are exposed, a conductive film is formed thereover, a resist having a different film thickness is formed by applying the resist over the conductive film, the entire surface of the resist is exposed to light and developed, or the entire surface of the resist is etched to form a resist mask, and the conductive film is etched by using the resist mask to form a source and drain electrode.

摘要翻译： 本发明提供一种制造具有小型结构的半导体元件和半导体器件的方法，其中具有小型结构的半导体元件被高度集成，通过克服由对准精度引起的成品率的降低，加工技术的精度降低 投影曝光，抗蚀剂掩模的成品尺寸，蚀刻技术等。 形成覆盖栅电极的绝缘膜，并且源极区域和漏极区域露出，在其上形成导电膜，通过在导电膜上涂覆抗蚀剂，形成具有不同膜厚度的抗蚀剂，整个表面 将抗蚀剂曝光并显影，或者蚀刻抗蚀剂的整个表面以形成抗蚀剂掩模，并且通过使用抗蚀剂掩模来蚀刻导电膜以形成源极和漏极。

公开(公告)号：US07208355B2

公开(公告)日：2007-04-24

申请号：US11040946

申请日：2005-01-21

申请人： Akira Ishikawa

发明人： Akira Ishikawa

IPC分类号： H01L21/00

CPC分类号： H01L29/786 ,  G02F1/136213 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1255 ,  H01L29/4908 ,  H01L29/78648 ,  Y10S257/903 ,  Y10S257/906 ,  Y10S257/908 ,  Y10S257/924

摘要： A semiconductor device and a method for preparing the same that can solve crack of a semiconductor film, capacitance electrodes and the like due to stress when forming a source electrode and a drain electrode in a semiconductor device having a thin film transistor and a holding capacitance with three or more capacitance electrodes is provided. Before forming the source electrode and the drain electrode, a crystalline silicon film for relaxing the stress is formed, then a contact hole connecting to the semiconductor film of the thin film transistor is opened, and a metal film to be the source electrode and the drain electrode is formed.

公开(公告)号：US07101807B2

公开(公告)日：2006-09-05

申请号：US10998920

申请日：2004-11-29

申请人： Akira Ishikawa

发明人： Akira Ishikawa

IPC分类号： H01L21/302 ,  H01L21/461

CPC分类号： H01L27/1288 ,  H01L27/1214 ,  H01L27/124 ,  H01L27/127 ,  H01L29/78621

摘要： In the step of forming a gate electrode in the region having the line width in which the miniaturization has been progressed, the present invention provides a method of fabricating a thin film transistor (TFT) whose patterning margin can be enlarged without requiring carrying out the photolithography multiple times. According to a fabricating method of the present invention, the mask pattern of the first layer and the mask pattern of the second layer can be formed in a self-aligned process and as a mask pattern which is analog and whose size are different from each other by performing the photolithography once. The hut shape gate can be formed in a self-aligned process by setting the line width located on the active layer so as to be Li in the mask pattern of the first layer, and so as to be L′ in the mask pattern of the second layer, and by in turn carrying out the anisotropic etching using the mask pattern of the second layer and the anisotropic etching using the mask pattern of the first layer. Therefore, the problem of a fabricating method being complex along with the miniaturization of a TFT can be solved by reducing the number of reticles using in the fabricating steps.

摘要翻译： 在具有进行小型化的线宽度的区域中形成栅电极的步骤中，本发明提供一种制造薄膜晶体管（TFT）的方法，该薄膜晶体管（TFT）可以在不需要进行光刻的情况下扩大其图案边缘 多次。 根据本发明的制造方法，第一层的掩模图案和第二层的掩模图案可以以自对准工艺形成，并且可以形成为模拟的尺寸彼此不同的掩模图案 通过进行光刻一次。 可以通过将位于有源层上的线宽度设置为第一层的掩模图案中的Li，从而以自对准的方式形成小屋形状门，从而在第一层的掩模图案中为L' 通过第二层的掩模图案和使用第一层的掩模图案的各向异性蚀刻进行各向异性蚀刻。 因此，通过在制造步骤中减少使用的掩模版的数量，可以解决制造方法与TFT的小型化一起复杂的问题。

公开(公告)号：US20060150142A1

公开(公告)日：2006-07-06

申请号：US10546917

申请日：2004-11-19

申请人： Kakuya Yamamoto ,  Takahiro Yamaguchi ,  Satoru Matsunaga ,  Akira Ishikawa

发明人： Kakuya Yamamoto ,  Takahiro Yamaguchi ,  Satoru Matsunaga ,  Akira Ishikawa

IPC分类号： G06F9/44

CPC分类号： H04L12/2803 ,  H04L12/2809 ,  H04L12/282 ,  H04L12/66 ,  H04L29/06 ,  H04L41/5048 ,  H04L67/16 ,  H04L67/306 ,  H04L69/329 ,  H04L2012/285

摘要： In the service association system according to the present invention, an “association template” in which service association details are described is prepared in advance; an actual service adaptable to a template instructed by a user is extracted; a specific association operation description is generated by adapting the actual service instructed by the user to the template; and the service is operated in association. As the result, it becomes possible to construct a service association system in which different services can be automatically adapted to the template in addition to the service which simply adapted to the template.

摘要翻译： 在根据本发明的服务关联系统中，预先准备描述服务关联细节的“关联模板”; 提取适用于由用户指示的模板的实际服务; 通过将用户指示的实际服务适配到模板来生成特定关联操作描述; 并且该服务联合运行。 结果，除了简单地适应于该模板的服务之外，构建可以将不同服务自动适应于该模板的服务关联系统成为可能。

公开(公告)号：US20050245379A1

公开(公告)日：2005-11-03

申请号：US11116363

申请日：2005-04-28

申请人： Akira Ishikawa

发明人： Akira Ishikawa

IPC分类号： B65H35/04 ,  B31B50/16 ,  B41F13/60 ,  B65H26/02 ,  B65H45/04 ,  B65H45/28 ,  B31B1/14

CPC分类号： B65H45/28 ,  B65H26/02 ,  B65H45/04

摘要： A folder includes a cut-off cylinder, etc. for cutting a web into sheets; a group of cylinders for folding each sheet into a signature in accordance with the selected folding specifications; and a conveyer apparatus, a fan wheel, a delivery conveyer, etc. for conveying signatures. In the folder, a cutting blade, etc. are disposed on the upstream side of the cut-off cylinder with respect to the feed direction of the web. When the folding specifications of signatures are changed or when the width of the web is changed, a control device operates the cutting blade to cut the web, and controls the feed of the web in such a manner that only a cut portion of the web present on the downstream side of the cut blade with respect to the feed direction is conveyed to the delivery conveyer.

摘要翻译： 文件夹包括用于将纸幅切割成片材的切割滚筒等; 一组用于根据所选择的折叠规格将每张纸折叠成签名的圆柱体; 以及用于传送签名的输送装置，风扇轮，输送输送机等。 在文件夹中，切割刀片等相对于幅材的进给方向设置在切割滚筒的上游侧。 当签名的折叠规格改变或当幅材的宽度改变时，控制装置操作切割刀片以切割幅材，并且以这样的方式控制幅材的进给，使得只有幅材的切割部分存在 在切割刀片的下游侧相对于进给方向被传送到输送输送器。

公开(公告)号：US20050095842A1

公开(公告)日：2005-05-05

申请号：US10976882

申请日：2004-11-01

申请人： Akira Ishikawa ,  Tetsuji Yamaguchi

发明人： Akira Ishikawa ,  Tetsuji Yamaguchi

IPC分类号： H01L21/3205 ,  G02F1/1362 ,  H01L21/768 ,  H01L21/77 ,  H01L21/84 ,  H01L23/52 ,  H01L27/12 ,  H01L29/417

CPC分类号： H01L27/124 ,  G02F1/136227 ,  H01L29/41733 ,  H01L29/4908

摘要： A technology for easily forming a multi-layer wiring structure that is fine and reliable. In the multi-layer wiring structure, the lower-layer wiring and the upper-layer wiring that are formed to sandwich an insulating layer are electrically connected to each other in a projection formed in the lower-layer wiring. The projection includes a columnar conductive member and the upper and lower layers thereof and each of the lower layer and the upper layer is formed of a conductive layer formed over the entire lower-layer wiring. The upper-layer is electrically connected to the lower-layer wiring in the portion where the projection is exposed substantially on the same plane as the top surface of the insulating layer.

摘要翻译： 一种易于形成精细可靠的多层布线结构的技术。 在多层布线结构中，形成为夹着绝缘层的下层布线和上层布线在形成在下层布线中的突起中彼此电连接。 突起包括柱状导电部件及其上下层，下层和上层各自由形成在整个下层布线上的导电层形成。 在突起部与绝缘层的上表面大致位于同一平面上的部分，上层与下层布线电连接。

公开(公告)号：US06881504B2

公开(公告)日：2005-04-19

申请号：US10650809

申请日：2003-08-29

申请人： Tomoo Yamamoto ,  Ichiro Tamai ,  Akira Ishikawa

发明人： Tomoo Yamamoto ,  Ichiro Tamai ,  Akira Ishikawa

IPC分类号： C23C14/06 ,  G11B5/64 ,  G11B5/65 ,  G11B5/66 ,  G11B5/667 ,  G11B5/73 ,  G11B5/738 ,  H01F10/26 ,  H01F10/30 ,  G11B5/70

CPC分类号： G11B5/667 ,  G11B5/66 ,  G11B5/7325 ,  Y10S428/90 ,  Y10T428/12465 ,  Y10T428/265

摘要： A large-capacity magnetic storage apparatus is disclosed, capable of performing ultra-high density magnetic recording of 50 gigabits or more per 1 square inch. In a perpendicular magnetic recording medium having a non-magnetic intermediate layer and a magnetic recording layer sequentially formed, the non-magnetic intermediate layer is composed of a layer having a face-centered cubic structure and containing a non-magnetic elements excluding Pt. Specifically, the intermediate layer mainly contains at least one selected from the group of elements constituted of Al, Cu, Rh, Pd, Ag, Ir and Au, and is composed of a film having a face-centered cubic (f. c. c.) structure. The magnetic recording layer contains at least Co, Cr and Pt, and is composed of a film having a hexagonal close-packed (h. c. p.) structure. More preferably, a non-magnetic h. c. p. intermediate layer is provided between the non-magnetic intermediate layer and the magnetic recording layer.

摘要翻译： 公开了一种能够进行每1平方英寸50吉比特或更高的超高密度磁记录的大容量磁存储装置。 在具有顺序地形成非磁性中间层和磁记录层的垂直磁记录介质中，非磁性中间层由具有面心立方结构并包含除Pt以外的非磁性元素的层组成。 具体地说，中间层主要含有选自由Al，Cu，Rh，Pd，Ag，Ir和Au构成的元素组中的至少一种，并且由具有面心立方（c。c。）结构的膜组成。 磁记录层至少含有Co，Cr和Pt，并且由具有六方密堆积（h.p.P。）结构的膜组成。 更优选地，非磁性h。 C。 p。 中间层设置在非磁性中间层和磁记录层之间。

公开(公告)号：US06749714B1

公开(公告)日：2004-06-15

申请号：US09856272

申请日：2001-05-18

申请人： Akira Ishikawa ,  Tatsuya Senga

发明人： Akira Ishikawa ,  Tatsuya Senga

IPC分类号： B24B3700

CPC分类号： B24B37/205 ,  B24B37/26

摘要： The present invention provides a hard polishing pad consisting of a non-foam material which is used in a CMP apparatus. Hard polishing pads consisting of foam resins show good pattern step difference elimination, but tend to cause scratching of the wafer. Furthermore, the polishing rate tends to be lower than that of polishing pads consisting of foam polyurethane. In the polishing pad of the present invention, spiral grooves or concentric circular grooves and lattice-form grooves are combined in the surface of the polishing pad; furthermore, the angles of intersection of the grooves are set at less than 2 degrees, and there are no edge parts with a curvature radius of 50 nm or less in the surface of the polishing pad. Accordingly, since there is no generation of flash, the object of polishing is not scratched, and the polishing rate can be increased.

摘要翻译： 本发明提供一种由CMP装置中使用的非泡沫材料组成的硬抛光垫。 由泡沫树脂组成的硬抛光垫具有良好的图案阶差消除，但倾向于引起晶片划伤。 此外，抛光速率倾向于低于由泡沫聚氨酯组成的抛光垫的抛光速率。 在本发明的研磨垫中，在抛光垫的表面上组合有螺旋槽或同心圆形槽和格子状槽， 此外，凹槽的交叉角度设定在小于2度，并且在抛光垫的表面中没有曲率半径为50nm以下的边缘部分。 因此，由于不产生闪光，因此不会划伤抛光的目的，并且可以提高抛光速率。