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    Drift mitigation with embedded refresh
    91.
    发明授权
    Drift mitigation with embedded refresh 有权

    公开(公告)号：US10269442B1

    公开(公告)日：2019-04-23

    申请号：US15857125

    申请日：2017-12-28

    Applicant: Micron Technology, Inc.

    Inventor： Innocenzo Tortorelli ,  Agostino Pirovano ,  Andrea Redaelli ,  Fabio Pellizzer ,  Hongmei Wang

    IPC: G11C29/00 ,  G11C13/00 ,  H01L27/24 ,  H01L45/00

    Abstract: Methods, systems, and devices for drift mitigation with embedded refresh are described. A memory cell may be written to and read from using write and read voltages, respectively, that are of different polarities. For example, a memory cell may be written to by applying a first write voltage and may be subsequently read from by applying a first read voltage of a first polarity. At least one additional (e.g., a second) read voltage—a setback voltage—of a second polarity may be utilized to return the memory cell to its original state. Thus the setback voltage may mitigate a shift in the voltage distribution of the cell caused by the first read voltage.

    APPARATUSES INCLUDING MULTI-LEVEL MEMORY CELLS AND METHODS OF OPERATION OF SAME
    95.
    发明申请
    APPARATUSES INCLUDING MULTI-LEVEL MEMORY CELLS AND METHODS OF OPERATION OF SAME 审中-公开

    公开(公告)号：US20180040370A1

    公开(公告)日：2018-02-08

    申请号：US15231518

    申请日：2016-08-08

    Applicant: Micron Technology, Inc.

    Inventor： Innocenzo Tortorelli ,  Russell L. Meyer ,  Agostino Pirovano ,  Andrea Redaelli ,  Lorenzo Fratin ,  Fabio Pellizzer

    IPC: G11C11/56 ,  G11C13/00

    Abstract: Disclosed herein is a memory cell including a memory element and a selector device. Data may be stored in both the memory element and selector device. The memory cell may be programmed by applying write pulses having different polarities and magnitudes. Different polarities of the write pulses may program different logic states into the selector device. Different magnitudes of the write pulses may program different logic states into the memory element. The memory cell may be read by read pulses all having the same polarity. The logic state of the memory cell may be detected by observing different threshold voltages when the read pulses are applied. The different threshold voltages may be responsive to the different polarities and magnitudes of the write pulses.

    Memory cells, integrated devices, and methods of forming memory cells
    98.
    发明授权
    Memory cells, integrated devices, and methods of forming memory cells 有权
    存储单元，集成器件和形成存储单元的方法

    公开(公告)号：US09299930B2

    公开(公告)日：2016-03-29

    申请号：US14225111

    申请日：2014-03-25

    Applicant: Micron Technology, Inc.

    Inventor： Andrea Redaelli ,  Ugo Russo ,  Agostino Pirovano ,  Simone Lavizzari

    IPC: H01L45/00

    CPC classification number: H01L45/06 ,  G11C13/0004 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/128 ,  H01L45/1286 ,  H01L45/141 ,  H01L45/144 ,  H01L45/16 ,  H01L45/1608 ,  H01L45/165 ,  H01L45/1675

    Abstract: Some embodiments include integrated devices, such as memory cells. The devices may include chalcogenide material, an electrically conductive material over the chalcogenide material, and a thermal sink between the electrically conductive material and the chalcogenide material. The thermal sink may be of a composition that includes an element in common with the electrically conductive material and includes an element in common with the chalcogenide material. Some embodiments include a method of forming a memory cell. Chalcogenide material may be formed over heater material. Electrically conductive material may be formed over the chalcogenide material. A thermal sink may be formed between the electrically conductive material and the chalcogenide material. The thermal sink may be of a composition that includes an element in common with the electrically conductive material and includes an element in common with the chalcogenide material.

    Abstract translation: 一些实施例包括集成设备，诸如存储器单元。 这些装置可以包括硫族化物材料，在硫族化物材料上的导电材料，以及在导电材料和硫族化物材料之间的散热器。 散热器可以是包括与导电材料相同的元件的组合物，并且包括与硫族化物材料相同的元件。 一些实施例包括形成存储器单元的方法。 可以在加热器材料上形成硫族化物材料。 可以在硫族化物材料上形成导电材料。 可以在导电材料和硫族化物材料之间形成散热器。 散热器可以是包括与导电材料相同的元件的组合物，并且包括与硫族化物材料相同的元件。

    Memory constructions
    100.
    发明授权
    Memory constructions 有权

    公开(公告)号：US08872150B2

    公开(公告)日：2014-10-28

    申请号：US14242706

    申请日：2014-04-01

    Applicant: Micron Technology, Inc.

    Inventor： Andrea Redaelli ,  Agostino Pirovano

    IPC: H01L29/02 ,  H01L45/00

    CPC classification number: H01L45/06 ,  H01L27/2445 ,  H01L45/00 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/144

    Abstract: Some embodiments include memory constructions having a plurality of bands between top and bottom electrically conductive materials. The bands include chalcogenide bands alternating with non-chalcogenide bands. In some embodiments, there may be least two of the chalcogenide bands and at least one of the non-chalcogenide bands. In some embodiments, the memory cells may be between a pair of electrodes; with one of the electrodes being configured as a lance, angled plate, container or beam. In some embodiments, the memory cells may be electrically coupled with select devices, such as, for example, diodes, field effect transistors or bipolar junction transistors.

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