Abstract:
A solid-state imaging device is capable of simplifying the pixel structure to reduce the pixel size and capable of suppressing the variation in the characteristics between the pixels when a plurality of output systems is provided. A unit cell includes two pixels. Upper and lower photoelectric converters and, transfer transistors and connected to the upper and lower photoelectric converters, respectively, a reset transistor, and an amplifying transistor form the two pixels. A full-face signal line is connected to the respective drains of the reset transistor and the amplifying transistor. Controlling the full-face signal line, along with transfer signal lines and a reset signal line, to read out signals realizes the simplification of the wiring in the pixel, the reduction of the pixel size, and so on.
Abstract:
An imaging device includes: a photoelectric conversion region that generates photovoltaic power for each pixel depending on irradiation light; and a first element isolation region that is provided between adjacent photoelectric conversion regions in a state of surrounding the photoelectric conversion region.
Abstract:
An imaging device includes: a photoelectric conversion region that generates photovoltaic power for each pixel depending on irradiation light; and a first element isolation region that is provided between adjacent photoelectric conversion regions in a state of surrounding the photoelectric conversion region.
Abstract:
A solid state image sensor includes a pixel array, as well as charge-to-voltage converters, reset gates, and amplifiers each shared by a plurality of pixels in the array. The voltage level of the reset gate power supply is set higher than the voltage level of the amplifier power supply. Additionally, charge overflowing from photodetectors in the pixels may be discarded into the charge-to-voltage converters. The image sensor may also include a row scanner configured such that, while scanning a row in the pixel array to read out signals therefrom, the row scanner resets the charge in the photodetectors of the pixels sharing a charge-to-voltage converter with pixels on the readout row. The charge reset is conducted simultaneously with or prior to reading out the signals from the pixels on the readout row.
Abstract:
A MOS type solid state imaging device in which unit pixels, each having a photodiode, a transfer transistor for transferring the signal of the photodiode to a floating node, an amplifier transistor for outputting the signal of the floating node to a vertical signal line, and a reset transistor for resetting the floating node are arrayed in a matrix. A gate voltage of the reset transistor is controlled by three values of a power source potential (for example 3V), a ground potential (0V), and a negative power source potential (for example −1V).
Abstract:
A CMOS image sensor has an image array as a matrix of unit pixels each including at least a photodiode, a memory for holding a charge stored in the photodiode, a floating diffusion region for converting the charge in the memory into a voltage, a first transfer gate for transferring the charge from the photodiode to the memory, a second transfer gate for transferring the charge from the memory to the floating diffusion region, and a resetting transistor for resetting the charge in the floating diffusion region. The unit pixels are driven to set the potential of a potential barrier at a boundary between the memory and the floating diffusion region to a potential such that a charge overflowing the memory is transferred to the floating diffusion region, when the first transfer gate is turned on. The CMOS image sensor operates in a global shutter mode for capturing moving images.
Abstract:
A solid-state imaging device including a pixel region in which a plurality of pixels are arranged. The pixels each includes a photoelectric conversion section, a transfer transistor, a plurality of floating diffusion sections receiving a charge from the photoelectric conversion section through the transfer transistor, a reset transistor resetting the floating diffusion sections, a separating transistor performing on-off control of a connection between the plurality of floating diffusion sections, and an amplifying transistor outputting a signal corresponding to a potential of the floating diffusion sections.
Abstract:
A solid-state image capturing device includes: a pixel array unit including plural pixels each converting light selectively incident through a mechanical shutter into charges to be stored in a storage portion and having an overflow path through which charges exceeding a saturation charge amount are discharged; and a driving unit starting an exposure by simultaneously resetting all pixels of the pixel array unit, maintaining the overflow path in an opened state during the exposure period, and closing the overflow path during a period while signals are read from the pixels after ending the exposure by closing the mechanical shutter.
Abstract:
A solid-state imaging device and method of making a solid-state imaging device are described herein. By way of example, the solid-state imaging device includes a first wiring layer formed on a sensor substrate and a second wiring layer formed on a circuit substrate. The sensor substrate is coupled to the circuit substrate, the first wiring layer and the second wiring layer being positioned between the sensor substrate and the circuit substrate. A first electrode is formed on a surface of the first wiring layer, and a second electrode is formed on a surface of the second wiring layer. The first electrode is in electrical contact with the second electrode.
Abstract:
The present technology relates to an imaging element, a driving method, and an electronic apparatus that can decrease a voltage and increase a saturation signal amount.In each pixel configuring a pixel array unit, a photodiode receiving light from a subject and performing photoelectric conversion on the light and a first charge accumulating unit accumulating charges generated by the photodiode are provided. A reset gate unit to initialize the first charge accumulating unit is connected to the first charge accumulating unit through a third transfer gate unit. When the first charge accumulating unit is initialized, a voltage is applied to gate electrodes of the third transfer gate unit and the reset gate unit and a positive voltage is applied to a well region provided with a pixel to assist voltage application. Thereby, initialization is appropriately performed and a reset level is suppressed low. As a result, a voltage can be decreased and a saturation signal amount can be increased. The present technology can be applied to a solid-state imaging element.