公开(公告)号：US20250148942A1

公开(公告)日：2025-05-08

申请号：US19018661

申请日：2025-01-13

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Yukinori SHIMA ,  Masami JINTYOU

IPC: G09F9/30 ,  H10D30/67 ,  H10K50/00 ,  H10K59/00

Abstract: A semiconductor device that can be highly integrated is provided.
The semiconductor device includes a semiconductor layer, a first insulating layer, a second insulating layer, a third insulating layer, and a first conductive layer. The third insulating layer is positioned over the semiconductor layer and includes a first opening over the semiconductor layer. The first conductive layer is positioned over the semiconductor layer, the first insulating layer is positioned between the first conductive layer and the semiconductor layer, and the second insulating layer is provided in a position that is in contact with a side surface of the first opening, the semiconductor layer, and the first insulating layer. The semiconductor layer includes a first portion overlapping with the first insulating layer, a pair of second portions between which the first portion is sandwiched and which overlap with the second insulating layer, and a pair of third portions between which the first portion and the pair of second portions are sandwiched and which overlap with neither the first insulating layer nor the second insulating layer. The first portion has a smaller width than the first opening and has a thinner shape of the semiconductor layer than the second portions, and the second portions have a thinner shape of the semiconductor layer than the third portions.

公开(公告)号：US20250098439A1

公开(公告)日：2025-03-20

申请号：US18729577

申请日：2023-01-17

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yasuharu HOSAKA ,  Yukinori SHIMA ,  Masami JINTYOU ,  Masataka NAKADA ,  Junichi KOEZUKA ,  Kenichi OKAZAKI

IPC: H10K59/124 ,  H10K59/123

Abstract: A display apparatus with high definition is provided. The display apparatus includes a transistor, a light-emitting device and a first insulating layer. The transistor includes a semiconductor layer, first to third conductive layers, and second and third insulating layers. The second insulating layer is provided over the first conductive layer and includes a first opening reaching the first conductive layer. The second conductive layer is provided over the second insulating layer and includes a second opening in a region overlapping with the first opening. The semiconductor layer is in contact with the top surface of the first conductive layer, the side surface of the second insulating layer, and the top surface and the side surface of the second conductive layer. The third insulating layer is provided over the semiconductor layer. The third conductive layer is provided over the third insulating layer. The first insulating layer is provided over the transistor. The first insulating layer and the third insulating layer include a third opening reaching the second conductive layer. The light-emitting device is provided over the first insulating layer and includes a pixel electrode, a common electrode, and an EL layer. The pixel electrode is electrically connected to the second conductive layer through the third opening. The EL layer includes a region in contact with the top surface and the side surface of the pixel electrode.

公开(公告)号：US20250098417A1

公开(公告)日：2025-03-20

申请号：US18828036

申请日：2024-09-09

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Masami JINTYOU ,  Daisuke KUROSAKI ,  Shiori TAMURA ,  Junichi KOEZUKA ,  Takahiro IGUCHI ,  Eiji SHIODA

IPC: H10K59/121 ,  H10K59/12

Abstract: A semiconductor device includes first to third insulating layers and a transistor including a semiconductor layer, first to fourth conductive layers, and fourth to sixth insulating layers. The first conductive layer, the first insulating layer, the third conductive layer, the fifth insulating layer, the second insulating layer, the third insulating layer, and the second conductive layer overlap in this order. The first to third insulating layers and the second and third conductive layers include an opening reaching the first conductive layer. In the opening, the first insulating layer includes a protruding portion, and the fourth insulating layer is in contact with the top surface of the first insulating layer and side surfaces of the fifth insulating layer and the second insulating layer. The fifth insulating layer, an oxide of the third conductive layer, is in contact with top and side surfaces of the third conductive layer. The semiconductor layer is in contact with the top surfaces of the first and second conductive layers and a side surface of the fourth insulating layer. The sixth insulating layer is in contact with the top surface of the semiconductor layer. The fourth conductive layer is over and in contact with the sixth insulating layer to overlap with the opening.

公开(公告)号：US20240213356A1

公开(公告)日：2024-06-27

申请号：US18402852

申请日：2024-01-03

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei YAMAZAKI ,  Masami JINTYOU ,  Yukinori SHIMA

IPC: H01L29/66 ,  H01L21/02 ,  H01L29/423 ,  H01L29/49 ,  H01L29/786

CPC classification number: H01L29/66969 ,  H01L21/02326 ,  H01L21/0234 ,  H01L21/02472 ,  H01L21/02483 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02573 ,  H01L21/0262 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/4966 ,  H01L29/78621 ,  H01L29/7869

Abstract: Provided is a method for manufacturing a semiconductor device whose electric characteristics are prevented from being varied and whose reliability is improved. In the method, an insulating film is formed over an oxide semiconductor film, a buffer film is formed over the insulating film, oxygen is added to the buffer film and the insulating film, a conductive film is formed over the buffer film to which oxygen is added, and an impurity element is added to the oxide semiconductor film using the conductive film as a mask. An insulating film containing hydrogen and overlapping with the oxide semiconductor film may be formed after the impurity element is added to the oxide semiconductor film.

公开(公告)号：US20240154041A1

公开(公告)日：2024-05-09

申请号：US18542870

申请日：2023-12-18

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei YAMAZAKI ,  Junichi KOEZUKA ,  Kenichi OKAZAKI ,  Masami JINTYOU

IPC: H01L29/786 ,  H01L21/02 ,  H01L21/425 ,  H01L27/12 ,  H01L29/417 ,  H01L29/423 ,  H01L29/49 ,  H01L29/66

CPC classification number: H01L29/7869 ,  H01L21/02323 ,  H01L21/02337 ,  H01L21/0234 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/0262 ,  H01L21/02631 ,  H01L21/425 ,  H01L27/1225 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78696 ,  H01L21/473

Abstract: A change in electrical characteristics in a semiconductor device including an oxide semiconductor film is inhibited, and the reliability is improved. The semiconductor device includes a gate electrode, a first insulating film over the gate electrode, an oxide semiconductor film over the first insulating film, a source electrode electrically connected to the oxide semiconductor film, a drain electrode electrically connected to the oxide semiconductor film, a second insulating film over the oxide semiconductor film, the source electrode, and the drain electrode, a first metal oxide film over the second insulating film, and a second metal oxide film over the first metal oxide film. The first metal oxide film contains at least one metal element that is the same as a metal element contained in the oxide semiconductor film. The second metal oxide film includes a region where the second metal oxide film and the first metal oxide film are mixed.

公开(公告)号：US20240105734A1

公开(公告)日：2024-03-28

申请号：US18531767

申请日：2023-12-07

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Junichi KOEZUKA ,  Yasutaka NAKAZAWA ,  Yukinori SHIMA ,  Masami JINTYOU ,  Masayuki SAKAKURA ,  Motoki NAKASHIMA

IPC: H01L27/12

CPC classification number: H01L27/1225

Abstract: The stability of a step of processing a wiring formed using copper, aluminum, gold, silver, molybdenum, or the like is increased. Moreover, the concentration of impurities in a semiconductor film is reduced. Moreover, the electrical characteristics of a semiconductor device are improved. In a transistor including an oxide semiconductor film, an oxide film in contact with the oxide semiconductor film, and a pair of conductive films being in contact with the oxide film and including copper, aluminum, gold, silver, molybdenum, or the like, the oxide film has a plurality of crystal parts and has c-axis alignment in the crystal parts, and the c-axes are aligned in a direction parallel to a normal vector of a top surface of the oxide semiconductor film or the oxide film.

公开(公告)号：US20240014137A1

公开(公告)日：2024-01-11

申请号：US18370916

申请日：2023-09-21

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Junichi KOEZUKA ,  Toshimitsu OBONAI ,  Masami JINTYOU ,  Daisuke KUROSAKI

IPC: H01L29/66 ,  H01L29/786

CPC classification number: H01L29/66969 ,  H01L29/7869

Abstract: A semiconductor device having favorable electrical characteristics is provided. A semiconductor device having stable electrical characteristics is provided. A highly reliable semiconductor device is provided. The semiconductor device includes a semiconductor layer, a first insulating layer, and a first conductive layer. The semiconductor layer includes an island-shaped top surface. The first insulating layer is provided in contact with a top surface and a side surface of the semiconductor layer. The first conductive layer is positioned over the first insulating layer and includes a portion overlapping with the semiconductor layer. In addition, the semiconductor layer includes a metal oxide, and the first insulating layer includes an oxide. The semiconductor layer includes a first region overlapping with the first conductive layer and a second region not overlapping with the first conductive layer. The first insulating layer includes a third region overlapping with the first conductive layer and a fourth region not overlapping with the first conductive layer. Furthermore, the second region and the fourth region contain phosphorus or boron.

公开(公告)号：US20230268445A1

公开(公告)日：2023-08-24

申请号：US18133622

申请日：2023-04-12

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yoshiaki OIKAWA ,  Nobuharu OHSAWA ,  Masami JINTYOU ,  Yasutaka NAKAZAWA

IPC: H01L29/786 ,  H01L27/12 ,  H01L21/28 ,  H01L29/49 ,  H01L29/04 ,  H01L29/45

CPC classification number: H01L29/7869 ,  H01L29/78648 ,  H01L29/78696 ,  H01L27/1255 ,  H01L21/28 ,  H01L27/124 ,  H01L29/4908 ,  H01L27/1225 ,  H01L29/04 ,  H01L29/45

Abstract: The transistor includes a first gate electrode, a first insulating film over the first gate electrode, an oxide semiconductor film over the first insulating film, a source electrode over the oxide semiconductor film, a drain electrode over the oxide semiconductor film, a second insulating film over the oxide semiconductor film, the source electrode, and the drain electrode, and a second gate electrode over the second insulating film. The first insulating film includes a first opening. A connection electrode electrically connected to the first gate electrode through the first opening is formed over the first insulating film. The second insulating film includes a second opening that reaches the connection electrode. The second gate electrode includes an oxide conductive film and a metal film over the oxide conductive film. The connection electrode and the second gate electrode are electrically connected to each other through the metal film.

公开(公告)号：US20230125324A1

公开(公告)日：2023-04-27

申请号：US17773168

申请日：2020-11-20

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Manabu SATO ,  Susumu KAWASHIMA ,  Koji KUSUNOKI ,  Hidenori MORI ,  Hironori MATSUMOTO ,  Daisuke KUROSAKI ,  Masami JINTYOU ,  Masataka NAKADA

IPC: H01L27/12 ,  H01L29/786

Abstract: A semiconductor device with high reliability is provided. The semiconductor device includes a first transistor, a second transistor, a capacitor, and first to fourth wirings. The first transistor includes a first gate and a second gate, and one of a source and a drain of the first transistor is connected to the first wiring and the second gate, and the other of the source and the drain is connected to one of a source and a drain of the second transistor and one electrode of the capacitor. A gate of the second transistor is connected to the other electrode of the capacitor, and the other of the source and the drain of the second transistor is electrically connected to the second wiring. The first wiring is supplied with a first potential, and the second wiring is supplied with a second potential and a third potential alternately. The third wiring is connected to the first gate and supplied with a first signal. The fourth wiring is connected to the gate of the second transistor and supplied with a second signal obtained by inverting the first signal.

公开(公告)号：US20220310517A1

公开(公告)日：2022-09-29

申请号：US17729306

申请日：2022-04-26

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Junichi KOEZUKA ,  Toshimitsu OBONAI ,  Masami JINTYOU ,  Daisuke KUROSAKI

IPC: H01L23/532 ,  H01L21/02 ,  H01L21/263 ,  H01L21/265

Abstract: A semiconductor device having favorable electrical characteristics is provided. A semiconductor device having stable electrical characteristics is provided. A highly reliable semiconductor device is provided. The semiconductor device includes a semiconductor layer, a first insulating layer, and a first conductive layer. The semiconductor layer includes an island-shaped top surface. The first insulating layer is provided in contact with a top surface and a side surface of the semiconductor layer. The first conductive layer is positioned over the first insulating layer and includes a portion overlapping with the semiconductor layer. In addition, the semiconductor layer includes a metal oxide, and the first insulating layer includes an oxide. The semiconductor layer includes a first region overlapping with the first conductive layer and a second region not overlapping with the first conductive layer. The first insulating layer includes a third region overlapping with the first conductive layer and a fourth region not overlapping with the first conductive layer. Furthermore, the second region and the fourth region contain phosphorus or boron.