公开(公告)号：US20220199465A1

公开(公告)日：2022-06-23

申请号：US17676627

申请日：2022-02-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Wei Wu ,  Ying-Ching Shih ,  Szu-Wei Lu ,  Jing-Cheng Lin ,  Long Hua Lee

IPC: H01L21/768 ,  H01L21/56 ,  H01L23/31 ,  H01L23/367 ,  H01L23/00

Abstract: A method of forming a semiconductor device includes attaching a metal foil to a carrier, the metal foil being pre-made prior to attaching the metal foil; forming a conductive pillar on a first side of the metal foil distal the carrier; attaching a semiconductor die to the first side of the metal foil; forming a molding material around the semiconductor die and the conductive pillar; and forming a redistribution structure over the molding material.

公开(公告)号：US11355454B2

公开(公告)日：2022-06-07

申请号：US16944102

申请日：2020-07-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Tsung-Fu Tsai ,  Shih-Ting Lin ,  Szu-Wei Lu ,  Chen-Hsuan Tsai ,  I-Ting Huang

IPC: H01L23/538 ,  H01L23/00 ,  H01L21/48 ,  H01L21/683

Abstract: A package structure includes a redistribution circuit structure, a wiring substrate, a semiconductor device, an insulating encapsulation, and a reinforcement structure. The redistribution circuit structure has a first surface and a second surface opposite to the first surface. The wiring substrate is disposed on the first surface of the redistribution circuit structure. The semiconductor device is disposed on the second surface of the redistribution circuit structure. The insulating encapsulation laterally encapsulates the wiring substrate. The reinforcement structure is directly in contact with the insulating encapsulation.

公开(公告)号：US11302683B2

公开(公告)日：2022-04-12

申请号：US16836927

申请日：2020-04-01

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Chien Pan ,  Chin-Fu Kao ,  Li-Hui Cheng ,  Szu-Wei Lu

IPC: H01L25/16 ,  H01L23/00 ,  H01L21/56 ,  G02B6/13 ,  H01L23/24

Abstract: A package structure and method of forming the same are provided. The package structure includes a first die, a second die, a wall structure and an encapsulant. The second die is electrically bonded to the first die. The wall structure is laterally aside the second die and on the first die. The wall structure is in contact with the first die and a hole is defined within the wall structure for accommodating an optical element insertion. The encapsulant laterally encapsulates the second die and the wall structure.

公开(公告)号：US11296051B2

公开(公告)日：2022-04-05

申请号：US16547609

申请日：2019-08-22

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chin-Fu Kao ,  Chih-Yuan Chien ,  Li-Hui Cheng ,  Szu-Wei Lu

IPC: H01L25/065 ,  H01L23/367 ,  H01L23/31 ,  H01L23/538 ,  H01L21/48 ,  H01L23/00 ,  H01L21/56

Abstract: Semiconductor packages and methods of forming the same are provided. One of the semiconductor packages includes a first semiconductor die, an adhesive layer, a second semiconductor die and an underfill. The first semiconductor die includes a first surface, and the first surface includes a central region and a peripheral region surrounding the central region. The adhesive layer is adhered to the peripheral region and exposes the central region. The second semiconductor die is stacked over the first surface of the first semiconductor die. The underfill is disposed between the first semiconductor die and the second semiconductor die.

公开(公告)号：US11289424B2

公开(公告)日：2022-03-29

申请号：US16655260

申请日：2019-10-17

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Wei Wu ,  Chen-Hua Yu ,  Kuo-Chung Yee ,  Szu-Wei Lu ,  Ying-Ching Shih

IPC: H01L23/495 ,  H01L23/538 ,  H01L23/31 ,  H01L23/00 ,  H01L25/00 ,  H01L21/56 ,  H01L21/48 ,  H01L25/065

Abstract: Provided are a package and a method of manufacturing the same. The package includes a first die, a second die, a bridge structure, an encapsulant, and a redistribution layer (RDL) structure. The first die and the second die are disposed side by side. The bridge structure is disposed over the first die and the second die to electrically connect the first die and the second die. The encapsulant laterally encapsulates the first die, the second die, and the bridge structure. The RDL structure is disposed over a backside of the bridge structure and the encapsulant. The RDL structure includes an insulating structure and a conductive pattern, the conductive pattern is disposed over the insulating structure and extending through the insulating structure and a substrate of the bridge structure, so as to form at least one through via in the substrate of the bridge structure.

公开(公告)号：US11239180B2

公开(公告)日：2022-02-01

申请号：US16227449

申请日：2018-12-20

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yi-Chao Mao ,  Chin-Chuan Chang ,  Szu-Wei Lu

IPC: H01L23/52 ,  H01L23/00 ,  H01L21/768

Abstract: A structure and a formation method of a package structure are provided. The method includes disposing a first semiconductor die over a carrier substrate and forming a first protective layer to surround the first semiconductor die. The method also includes forming a dielectric layer over the first protective layer and the first semiconductor die. The method further includes patterning the dielectric layer to form an opening partially exposing the first semiconductor die and the first protective layer. In addition, the method includes bonding a second semiconductor die to the first semiconductor die after the opening is formed. The method includes forming a second protective layer to surround the second semiconductor die.

公开(公告)号：US11239134B2

公开(公告)日：2022-02-01

申请号：US16745338

申请日：2020-01-17

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Hao Chen ,  Chin-Fu Kao ,  Li-Hui Cheng ,  Szu-Wei Lu

IPC: H01L23/367 ,  H01L23/31 ,  H01L23/00 ,  H01L21/48 ,  H01L21/683 ,  H01L21/56

Abstract: A structure includes a circuit substrate, a device, a metal layer, a lid and a thermal interface material layer. The device is disposed on and electrically connected to the circuit substrate. The device includes at least one semiconductor die laterally encapsulated by an insulating encapsulation. The metal layer is covering a back surface of the at least one semiconductor die and the insulating encapsulation. The lid is disposed on the circuit substrate, and the lid is adhered to the metal layer through the thermal interface material layer.

公开(公告)号：US20210358825A1

公开(公告)日：2021-11-18

申请号：US17384923

申请日：2021-07-26

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Wei Chen ,  Li-Chung Kuo ,  Ying-Ching Shih ,  Szu-Wei Lu ,  Jing-Cheng Lin ,  Long Hua Lee ,  Kuan-Yu Huang

IPC: H01L23/31 ,  H01L23/498 ,  H01L21/56 ,  H01L23/00 ,  H01L25/065

Abstract: A method for forming an underfill structure and semiconductor packages including the underfill structure are disclosed. In an embodiment, the semiconductor package may include a package including an integrated circuit die; an interposer bonded to the integrated circuit die by a plurality of die connectors; and an encapsulant surrounding the integrated circuit die. The semiconductor package may further include a package substrate bonded to the interposer by a plurality of conductive connectors; a first underfill between the package and the package substrate, the first underfill having a first coefficient of thermal expansion (CTE); and a second underfill surrounding the first underfill, the second underfill having a second CTE less than the first CTE.

公开(公告)号：US11164855B2

公开(公告)日：2021-11-02

申请号：US16572619

申请日：2019-09-17

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Weiming Chris Chen ,  Chi-Hsi Wu ,  Chih-Wei Wu ,  Kuo-Chiang Ting ,  Szu-Wei Lu ,  Shang-Yun Hou ,  Ying-Ching Shih ,  Hsien-Ju Tsou ,  Cheng-Chieh Li

IPC: H01L23/32 ,  H01L25/18 ,  H01L25/00 ,  H01L23/00 ,  H01L21/82 ,  H01L23/48 ,  H01L21/56 ,  H01L23/367

Abstract: A package structure includes a circuit element, a first semiconductor die, a second semiconductor die, a heat dissipating element, and an insulating encapsulation. The first semiconductor die and the second semiconductor die are located on the circuit element. The heat dissipating element connects to the first semiconductor die, and the first semiconductor die is between the circuit element and the heat dissipating element, where a sum of a first thickness of the first semiconductor die and a third thickness of the heat dissipating element is substantially equal to a second thickness of the second semiconductor die. The insulating encapsulation encapsulates the first semiconductor die, the second semiconductor die and the heat dissipating element, wherein a surface of the heat dissipating element is substantially leveled with the insulating encapsulation.

公开(公告)号：US11164824B2

公开(公告)日：2021-11-02

申请号：US16865432

申请日：2020-05-04

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Tsung-Fu Tsai ,  Kung-Chen Yeh ,  Li-Chung Kuo ,  Szu-Wei Lu ,  Ying-Ching Shih

IPC: H01L23/495 ,  H01L23/00 ,  H01L23/31 ,  H01L23/538 ,  H01L21/48 ,  H01L21/56 ,  H01L21/78

Abstract: A package structure includes a circuit substrate and a semiconductor package. The semiconductor package is disposed on the circuit substrate, and includes a plurality of semiconductor dies, an insulating encapsulant and a connection structure. The insulating encapsulant comprises a first portion and a second portion protruding from the first portion, the first portion is encapsulating the plurality of semiconductor dies and has a planar first surface, and the second portion has a planar second surface located at a different level than the planar first surface. The connection structure is located over the first portion of the insulating encapsulant on the planar first surface, and located on the plurality of semiconductor dies, wherein the connection structure is electrically connected to the plurality of semiconductor dies and the circuit substrate.