公开(公告)号：US20130307087A1

公开(公告)日：2013-11-21

申请号：US13471846

申请日：2012-05-15

申请人： Ruilong Xie ,  Su Chen Fan ,  Pranatharthiharan Haran Balasubramanian ,  David Vaclav Horak ,  Ponoth Shom

发明人： Ruilong Xie ,  Su Chen Fan ,  Pranatharthiharan Haran Balasubramanian ,  David Vaclav Horak ,  Ponoth Shom

IPC分类号： H01L27/088 ,  H01L21/311

CPC分类号： H01L21/823475 ,  H01L21/76897

摘要： A self-aligned source/drain contact formation process without spacer or cap loss is described. Embodiments include providing two gate stacks, each having spacers on opposite sides, and an interlayer dielectric (ILD) over the two gate stacks and in a space therebetween, forming a vertical contact opening within the ILD between the two gate stacks, and laterally removing ILD between the two gate stacks from the vertical contact opening toward the spacers, to form a contact hole.

摘要翻译： 描述了没有间隔物或盖损失的自对准源极/漏极接触形成过程。 实施例包括提供两个栅极堆叠，每个栅极堆叠在相对的两侧具有间隔物，以及位于两个栅极堆叠之间并在它们之间的空间中的层间电介质（ILD），在两个栅极堆叠之间的ILD内形成垂直接触开口，并横向移除ILD 在两个栅极堆叠之间从垂直接触开口朝向间隔件，形成接触孔。

公开(公告)号：US07807335B2

公开(公告)日：2010-10-05

申请号：US11144857

申请日：2005-06-03

申请人： Daniel A. Corliss ,  Dario Gil ,  Dario Leonardo Goldfarb ,  Steven John Holmes ,  David Vaclav Horak ,  Kurt Rudolf Kimmel ,  Karen Elizabeth Petrillo ,  Dmitriy Shneyder

发明人： Daniel A. Corliss ,  Dario Gil ,  Dario Leonardo Goldfarb ,  Steven John Holmes ,  David Vaclav Horak ,  Kurt Rudolf Kimmel ,  Karen Elizabeth Petrillo ,  Dmitriy Shneyder

IPC分类号： G03F7/26

CPC分类号： G03F7/2041 ,  G03F7/11 ,  Y10S430/162

摘要： A method of forming an image in a photoresist layer. The method includes, providing a substrate; forming the photoresist layer over the substrate; forming a contamination gettering topcoat layer over the photoresist layer, the contamination gettering topcoat layer including one or more polymers and one or more cation complexing agents; exposing the photoresist layer to actinic radiation through a photomask having opaque and clear regions, the opaque regions blocking the actinic radiation and the clear regions being transparent to the actinic radiation, the actinic radiation changing the chemical composition of regions of the photoresist layer exposed to the radiation forming exposed and unexposed regions in the photoresist layer; and removing either the exposed regions of the photoresist layer or the unexposed regions of the photoresist layer. The contamination gettering topcoat layer includes one or more polymers, one or more cation complexing agents and a casting solvent.

摘要翻译： 在光致抗蚀剂层中形成图像的方法。 该方法包括提供基板; 在衬底上形成光致抗蚀剂层; 在光致抗蚀剂层上形成污染吸气顶涂层，吸收顶涂层的污染物包括一种或多种聚合物和一种或多种阳离子络合剂; 将光致抗蚀剂层暴露于通过具有不透明和透明区域的光掩模的光化辐射，不透明区域阻挡光化辐射，透明区域对于光化辐射是透明的，光化辐射改变曝光于光致抗蚀剂层的光致抗蚀剂层的区域的化学组成 在光致抗蚀剂层中形成曝光和未曝光区域的辐射; 以及去除光致抗蚀剂层的曝光区域或光致抗蚀剂层的未曝光区域。 污染吸附顶涂层包括一种或多种聚合物，一种或多种阳离子络合剂和流延溶剂。

公开(公告)号：US20100176512A1

公开(公告)日：2010-07-15

申请号：US12351436

申请日：2009-01-09

申请人： Chih-Chao Yang ,  David Vaclav Horak ,  Takeshi Nogami ,  Shom Ponoth

发明人： Chih-Chao Yang ,  David Vaclav Horak ,  Takeshi Nogami ,  Shom Ponoth

IPC分类号： H01L23/48 ,  H01L21/44

CPC分类号： H01L21/76834 ,  H01L21/76832 ,  H01L21/76844 ,  H01L21/76846 ,  H01L21/76873 ,  H01L21/76879 ,  H01L23/5226 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L23/53295 ,  H01L2221/1089 ,  H01L2924/0002 ,  H01L2924/00

摘要： An improved semiconductor structure consists of interconnects in an upper interconnect level connected to interconnects in a lower interconnect level through use of a conductive protrusion located at the bottom of a via opening in an upper interconnect level, the conductive protrusion extends upward from bottom of the via opening and into the via opening. The improved interconnect structure with the conductive protrusion between the upper and lower interconnects enhances overall interconnect reliability.

摘要翻译： 改进的半导体结构由上互连级别中的互连构成，所述互连通过使用位于上互连级别的通孔开口的底部的导电突起连接到下互连级别中的互连，所述导电突起从通孔的底部向上延伸 打开并进入通道开口。 与上下互连之间的导电突起的改进的互连结构增强了整体互连的可靠性。

公开(公告)号：US08679968B2

公开(公告)日：2014-03-25

申请号：US13471846

申请日：2012-05-15

申请人： Ruilong Xie ,  Su Chen Fan ,  Pranatharthiharan Haran Balasubramanian ,  David Vaclav Horak ,  Ponoth Shom

发明人： Ruilong Xie ,  Su Chen Fan ,  Pranatharthiharan Haran Balasubramanian ,  David Vaclav Horak ,  Ponoth Shom

IPC分类号： H01L21/4763 ,  H01L21/44

CPC分类号： H01L21/823475 ,  H01L21/76897

摘要： A self-aligned source/drain contact formation process without spacer or cap loss is described. Embodiments include providing two gate stacks, each having spacers on opposite sides, and an interlayer dielectric (ILD) over the two gate stacks and in a space therebetween, forming a vertical contact opening within the ILD between the two gate stacks, and laterally removing ILD between the two gate stacks from the vertical contact opening toward the spacers, to form a contact hole.

摘要翻译： 描述了没有间隔物或盖损失的自对准源极/漏极接触形成过程。 实施例包括提供两个栅极堆叠，每个栅极堆叠在相对的两侧具有间隔物，以及位于两个栅极堆叠之间并在它们之间的空间中的层间电介质（ILD），在两个栅极堆叠之间的ILD内形成垂直接触开口，并横向移除ILD 在两个栅极堆叠之间从垂直接触开口朝向间隔件，形成接触孔。

公开(公告)号：US08021974B2

公开(公告)日：2011-09-20

申请号：US12351436

申请日：2009-01-09

申请人： Chih-Chao Yang ,  David Vaclav Horak ,  Takeshi Nogami ,  Shom Ponoth

发明人： Chih-Chao Yang ,  David Vaclav Horak ,  Takeshi Nogami ,  Shom Ponoth

IPC分类号： H01L21/02

CPC分类号： H01L21/76834 ,  H01L21/76832 ,  H01L21/76844 ,  H01L21/76846 ,  H01L21/76873 ,  H01L21/76879 ,  H01L23/5226 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L23/53295 ,  H01L2221/1089 ,  H01L2924/0002 ,  H01L2924/00

摘要： An improved semiconductor structure consists of interconnects in an upper interconnect level connected to interconnects in a lower interconnect level through use of a conductive protrusion located at the bottom of a via opening in an upper interconnect level, the conductive protrusion extends upward from bottom of the via opening and into the via opening. The improved interconnect structure with the conductive protrusion between the upper and lower interconnects enhances overall interconnect reliability.

摘要翻译： 改进的半导体结构由上互连级别中的互连构成，所述互连通过使用位于上互连级别的通孔开口的底部的导电突起连接到下互连级别中的互连，所述导电突起从通孔的底部向上延伸 打开并进入通道开口。 与上下互连之间的导电突起的改进的互连结构增强了整体互连的可靠性。

公开(公告)号：US20080197448A1

公开(公告)日：2008-08-21

申请号：US12112549

申请日：2008-04-30

申请人： Mark Charles Hakey ,  Steven John Holmes ,  David Vaclav Horak ,  Charles William Koburger ,  Peter H. Mitchell ,  Larry Alan Nesbit

发明人： Mark Charles Hakey ,  Steven John Holmes ,  David Vaclav Horak ,  Charles William Koburger ,  Peter H. Mitchell ,  Larry Alan Nesbit

IPC分类号： H01L29/00

CPC分类号： H01L27/1203 ,  H01L21/76283 ,  H01L21/84

摘要： To isolate two active regions formed on a silicon-on-insulator (SOI) substrate, a shallow trench isolation region is filled with liquid phase deposited silicon dioxide (LPD-SiO2) while avoiding covering the active areas with the oxide. By selectively depositing the oxide in this manner, the polishing needed to planarize the wafer is significantly reduced as compared to a chemical-vapor deposited oxide layer that covers the entire wafer surface. Additionally, the LPD-SiO2 does not include the growth seams that CVD silicon dioxide does. Accordingly, the etch rate of the LPD-SiO2 is uniform across its entire expanse thereby preventing cavities and other etching irregularities present in prior art shallow trench isolation regions in which the etch rate of growth seams exceeds that of the other oxide areas.

摘要翻译： 为了隔离形成在绝缘体上硅（SOI）衬底上的两个有源区，浅沟槽隔离区填充有液相沉积二氧化硅（LPD-SiO 2），同时避免覆盖有源区 与氧化物。 通过以这种方式选择性地沉积氧化物，与覆盖整个晶片表面的化学气相沉积氧化物层相比，平坦化晶片所需的抛光显着降低。 此外，LPD-SiO 2不包括CVD二氧化硅的生长接缝。 因此，LPD-SiO 2的蚀刻速率在其整个宽度上是均匀的，从而防止存在于现有技术的浅沟槽隔离区域中的空穴和其它蚀刻不规则性，其中生长接缝的蚀刻速率超过 其他氧化物区域。