公开(公告)号：US07892880B2

公开(公告)日：2011-02-22

申请号：US12724667

申请日：2010-03-16

申请人： Eun Soo Nam ,  Myoung Sook Oh ,  Ho Young Kim ,  Young Jun Chong ,  Hyun Kyu Yu

发明人： Eun Soo Nam ,  Myoung Sook Oh ,  Ho Young Kim ,  Young Jun Chong ,  Hyun Kyu Yu

IPC分类号： H01L21/00

CPC分类号： H01L27/14643 ,  G01S7/4863 ,  G01S17/89 ,  H01L27/14681 ,  H04N5/369

摘要： A method of manufacturing a photo-detector array device integrated with a read-out integrated circuit (ROIC) monolithically integrated for a laser-radar image signal. A detector array device, a photodiode and control devices for selecting and outputting a laser-radar image signal are simultaneously formed on an InP substrate. In addition, after the photodiode and the control devices are simultaneously formed on the InP substrate, the photodiode and the control devices are electrically separated from each other using a polyamide, whereby a PN junction surface of the photodiode is buried to reduce surface leakage current and improve electrical reliability, and the structure of the control devices can be simplified to improve image signal reception characteristics.

摘要翻译： 一种制造与用于激光雷达图像信号单片集成的读出集成电路（ROIC）集成的光电检测器阵列装置的方法。 在InP衬底上同时形成用于选择和输出激光雷达图像信号的检测器阵列器件，光电二极管和控制器件。 此外，在InP衬底上同时形成光电二极管和控制装置之后，使用聚酰胺将光电二极管和控制装置彼此电分离，由此埋入光电二极管的PN结表面以减小表面泄漏电流， 提高电气可靠性，可以简化控制装置的结构，提高图像信号接收特性。

公开(公告)号：US20100322361A1

公开(公告)日：2010-12-23

申请号：US12818510

申请日：2010-06-18

申请人： Seon-Ho HAN ,  Hyun Kyu Yu

发明人： Seon-Ho HAN ,  Hyun Kyu Yu

IPC分类号： H04L27/08

CPC分类号： H04B1/0025 ,  H04B1/001

摘要： In a digital receiver, a noise attenuation and signal magnitude mapping variable amplifying unit includes a filter and an amplifier, amplifies and band-bass filters an analog signal and attenuating white noise and an interference signal other than a band signal. An ADC performs sub sampling on a carrier frequency of a desired signal and performs oversampling on the band of the desired signal by using a sampling frequency to convert the analog signal which has passed through the noise attenuation and signal magnitude mapping variable amplifying unit into a digital signal of a direct conversion frequency band or an intermediate frequency band. The ADC has a dynamic range for processing both the desired signal and an undesired signal adjacent to the desired signal. A digital signal processing unit converts a signal frequency of the digital signal or digital-filters an undesired signal within the digital signal and processes the digital signal by digitally adjusting a gain.

摘要翻译： 在数字接收机中，噪声衰减和信号幅度映射可变放大单元包括滤波器和放大器，对模拟信号进行放大和频带滤波，并衰减白噪声和除频带信号之外的干扰信号。 ADC对期望信号的载波频率进行子采样，并通过使用采样频率对已经通过噪声衰减和信号幅度可变放大单元的模拟信号进行数字化处理，对期望信号的频带进行过采样， 直接转换频带或中频带的信号。 ADC具有用于处理期望信号和与期望信号相邻的不期望信号的动态范围。 数字信号处理单元转换数字信号的信号频率或数字滤波数字信号内的不需要的信号，并通过数字调节增益来处理数字信号。

公开(公告)号：US20100134192A1

公开(公告)日：2010-06-03

申请号：US12581105

申请日：2009-10-16

申请人： Byung Hun MIN ,  Ja Yol Lee ,  Seong Do Kim ,  Cheon Soo Kim ,  Hyun Kyu Yu

发明人： Byung Hun MIN ,  Ja Yol Lee ,  Seong Do Kim ,  Cheon Soo Kim ,  Hyun Kyu Yu

IPC分类号： H03L7/00

CPC分类号： H03L7/181 ,  H03L2207/50 ,  Y10S331/02

摘要： A frequency calibration loop circuit having a pre-set frequency channel word (FCW) command value, a bit inputted to obtain a target frequency in an oscillator and a pre-set minimum division ratio n (n is a constant) of a programmable divider, includes: an oscillator adjusting a oscillation frequency according to control value; a programmable divider dividing the oscillation frequency according to a division ratio; a counter counting the number of clocks of the divided frequency by using a reference frequency; and a frequency detector outputting a value obtained by subtracting the number of the counted clocks from a reference comparison value, a value obtained by dividing a Frequency Channel Word (FCW) command value by a minimum division ratio of the programmable divider, as the control value of the oscillator.

摘要翻译： 一种频率校准环路电路，具有预定的频道字（FCW）指令值，为了获得振荡器中的目标频率输入的比特和可编程分频器的预设最小分频比n（n是常数） 包括：振荡器根据控制值调节振荡频率; 一个可编程除法器根据分频比划分振荡频率; 通过使用参考频率对分频频率的时钟数进行计数的计数器; 输出通过从参考比较值中减去计数时钟数而得到的值的频率检测器，通过将频率通道字（FCW）指令值除以可编程分压器的最小分频比而获得的值作为控制值 的振荡器。

公开(公告)号：US20100090761A1

公开(公告)日：2010-04-15

申请号：US12511323

申请日：2009-07-29

申请人： Sang Jin Byun ,  Jae Hoon Shim ,  Hyun Kyu Yu

发明人： Sang Jin Byun ,  Jae Hoon Shim ,  Hyun Kyu Yu

IPC分类号： H03D3/00

CPC分类号： H04L27/233 ,  H04L27/2338

摘要： A PSK demodulator using a time-to-digital converter includes: a filter unit that performs band pass filtering on a PSK signal; an amplitude limiting unit that limits the amplitude of an output signal of the filter unit; a clock signal generating unit that generates a clock signal; and a time-to-digital converter that samples the phase of an output signal of the amplitude limiting unit according to the clock signal and outputs a digital signal having a value corresponding to the phase of the PSK signal. Power consumption can be reduced and a circuit implementation can be simplified.

摘要翻译： 使用时间 - 数字转换器的PSK解调器包括：对PSK信号执行带通滤波的滤波器单元; 幅度限制单元，限制滤波器单元的输出信号的幅度; 时钟信号生成单元，生成时钟信号; 以及时间 - 数字转换器，其根据时钟信号对幅度限制单元的输出信号的相位进行采样，并输出具有与PSK信号的相位对应的值的数字信号。 可以降低功耗并简化电路实现。

公开(公告)号：US07532001B2

公开(公告)日：2009-05-12

申请号：US11447747

申请日：2006-06-06

申请人： Young Jae Lee ,  Hyun Kyu Yu

发明人： Young Jae Lee ,  Hyun Kyu Yu

IPC分类号： G01R33/00

CPC分类号： H03B5/1228 ,  H03B5/1212 ,  H03B5/124 ,  H03B5/1296

摘要： Provided is a Q-boosting circuit for improving a Q factor in a radio frequency (RF) integrated circuit of a semiconductor device using a transformer instead of an inductor. The Q-boosting circuit couples a negative resistance circuit to a pair of terminals of a transformer to reduce a resistance component of the transformer, thereby increasing a mutual inductance component. Therefore, it is possible to obtain a more improved Q factor than a conventional Q factor through adjustment of an inductance and a resistance component, and to obtain the Q factor having a wide range from several tens to several hundreds according to a frequency range.

摘要翻译： 提供了一种用于使用变压器代替电感器来改善半导体器件的射频（RF）集成电路中的Q因子的Q升压电路。 Q升压电路将负电阻电路耦合到变压器的一对端子，以减小变压器的电阻分量，从而增加互感元件。 因此，可以通过调整电感和电阻分量来获得比常规Q因子更好的Q因子，并且根据频率范围获得宽度范围从几十到几百的Q因子。

公开(公告)号：US07429874B2

公开(公告)日：2008-09-30

申请号：US11451962

申请日：2006-06-13

申请人： Sang Jin Byun ,  Hyun Kyu Yu

发明人： Sang Jin Byun ,  Hyun Kyu Yu

IPC分类号： H03K19/094

CPC分类号： H03F1/301 ,  H03F3/45183 ,  H03F2200/453 ,  H03F2200/456 ,  H03F2200/513

摘要： Provided is a replica bias circuit which is suitable for multi-layer stacked CMOS current mode logic (CML) and is stably used in application fields using a low power supply voltage. The replica bias circuit applies a reference voltage to gates of target transistors constituting an electronic circuit. The replica bias circuit includes a sub threshold voltage generator for maintaining a voltage difference lower than a threshold voltage of the transistor; and a replica path including devices designed by referring to dimensions of constituent devices forming a current flow path, the current flow path including the target transistors in the electronic circuit. With the replica bias circuit, multi-layer stacked CMOS current mode logic (CML) circuits can stably operate even at a low power supply voltage.

摘要翻译： 提供了一种适用于多层堆叠CMOS电流模式逻辑（CML）的复制偏置电路，并且在使用低电源电压的应用领域中稳定地使用。 复制偏置电路对构成电子电路的目标晶体管的栅极施加参考电压。 复制偏置电路包括用于保持低于晶体管的阈值电压的电压差的副阈值电压发生器; 以及包括通过参考形成电流流路的构成装置的尺寸而设计的装置的复制路径，所述电流流路包括电子电路中的目标晶体管。 利用复制偏置电路，即使在低电源电压下，多层堆叠CMOS电流模式逻辑（CML）电路也能稳定地工作。

公开(公告)号：US07420423B2

公开(公告)日：2008-09-02

申请号：US11431982

申请日：2006-05-11

申请人： Young Jae Lee ,  Hyun Kyu Yu

发明人： Young Jae Lee ,  Hyun Kyu Yu

IPC分类号： H03F3/04

CPC分类号： H03F3/189 ,  H03F3/45183 ,  H03F3/68

摘要： An active balun device is provided. The active balun device includes: a differential input portion for receiving an external single input signal to output two complementary differential signals; and a differential amplifier connected to the differential input portion in cascade to amplify the two differential signals received from the differential input portion. Thus, the active balun device has a sufficient gain and a desired bandwidth in a semiconductor circuit.

摘要翻译： 提供主动平衡 - 不平衡转换器。 主动平衡 - 不平衡变换器包括：差分输入部分，用于接收外部单个输入信号以输出两个互补差分信号; 以及级联连接到差分输入部分的差分放大器，以放大从差分输入部分接收的两个差分信号。 因此，有源平衡 - 不平衡转换器件在半导体电路中具有足够的增益和期望的带宽。

公开(公告)号：US07348849B2

公开(公告)日：2008-03-25

申请号：US11497461

申请日：2006-08-01

申请人： Seon Ho Han ,  Hyun Kyu Yu

发明人： Seon Ho Han ,  Hyun Kyu Yu

IPC分类号： H03F3/45 ,  H03G3/10

CPC分类号： H03G1/007 ,  H03F1/342 ,  H03F3/211 ,  H03F3/45206 ,  H03F3/45659 ,  H03F2200/15 ,  H03F2203/21154 ,  H03F2203/45008 ,  H03F2203/45302 ,  H03G7/06

摘要： A complementary metal oxide semiconductor (CMOS) variable gain amplifier has a wider decibel-linear gain variation characteristic with respect to a control voltage when a signal is amplified. The variable gain amplifier includes: a bias input circuit for supplying a current corresponding to a bias voltage; an operation region combination and feedback circuit connected to the bias input circuit and combining at least two amplifiers by feedback in response to a control voltage, each amplifier having a decibel-linear characteristic in saturation and triode regions of a complementary metal oxide semiconductor (CMOS); and a bias output circuit connected to the bias input circuit, and outputting bias current controlled by the operation region combination and feedback circuit.

摘要翻译： 互补金属氧化物半导体（CMOS）可变增益放大器在信号被放大时相对于控制电压具有更宽的分贝线性增益变化特性。 可变增益放大器包括：偏置输入电路，用于提供对应于偏置电压的电流; 连接到偏置输入电路的操作区域组合和反馈电路，并且通过响应于控制电压的反馈来组合至少两个放大器，每个放大器在互补金属氧化物半导体（CMOS）的饱和度和三极管区域中具有分贝线性特性， ; 以及偏置输出电路，连接到偏置输入电路，并输出由操作区域组合和反馈电路控制的偏置电流。

公开(公告)号：US20070132513A1

公开(公告)日：2007-06-14

申请号：US11497461

申请日：2006-08-01

申请人： Seon Ho Han ,  Hyun Kyu Yu

发明人： Seon Ho Han ,  Hyun Kyu Yu

IPC分类号： H03G3/10

CPC分类号： H03G1/007 ,  H03F1/342 ,  H03F3/211 ,  H03F3/45206 ,  H03F3/45659 ,  H03F2200/15 ,  H03F2203/21154 ,  H03F2203/45008 ,  H03F2203/45302 ,  H03G7/06

摘要： A complementary metal oxide semiconductor (CMOS) variable gain amplifier has a wider decibel-linear gain variation characteristic with respect to a control voltage when a signal is amplified. The variable gain amplifier includes: a bias input circuit for supplying a current corresponding to a bias voltage; an operation region combination and feedback circuit connected to the bias input circuit and combining at least two amplifiers by feedback in response to a control voltage, each amplifier having a decibel-linear characteristic in saturation and triode regions of a complementary metal oxide semiconductor (CMOS); and a bias output circuit connected to the bias input circuit, and outputting bias current controlled by the operation region combination and feedback circuit.

摘要翻译： 互补金属氧化物半导体（CMOS）可变增益放大器在信号被放大时相对于控制电压具有更宽的分贝线性增益变化特性。 可变增益放大器包括：偏置输入电路，用于提供对应于偏置电压的电流; 连接到偏置输入电路的操作区域组合和反馈电路，并且通过响应于控制电压的反馈来组合至少两个放大器，每个放大器在互补金属氧化物半导体（CMOS）的饱和度和三极管区域中具有分贝线性特性， ; 以及偏置输出电路，连接到偏置输入电路，并输出由操作区域组合和反馈电路控制的偏置电流。

公开(公告)号：US06395637B1

公开(公告)日：2002-05-28

申请号：US09168343

申请日：1998-10-07

申请人： Min Park ,  Cheon Soo Kim ,  Hyun Kyu Yu

发明人： Min Park ,  Cheon Soo Kim ,  Hyun Kyu Yu

IPC分类号： H01L21302

CPC分类号： H01F41/041 ,  H01F17/0006 ,  H01F27/34 ,  H01F2017/0046 ,  H01L23/5227 ,  H01L28/10 ,  H01L2924/0002 ,  H01L2924/00

摘要： The present invention relates to a method for fabricating an inductor and, more particularly, to a method for fabricating a spiral inductor used in a monolithic microwave integrated circuit on a silicon substrate using semiconductor fabrication processes. The method for fabricating an inductor, comprising the steps of: forming a first dielectric layer on a silicon substrate and forming a first metal wire on the first dielectric layer, wherein the first metal wire is in contact with an active element formed on the silicon substrate; and alternatively forming dielectric layers and metal layers, wherein the metal layers are electrically connected with an upper metal wire and a lower metal wire and wherein the metal layers are patterned using the dielectric layers as etching mask, whereby a metal corrosion is prevented by using the spiral dielectric pattern as the etching mask.

摘要翻译： 本发明涉及一种用于制造电感器的方法，更具体地说，涉及使用半导体制造工艺制造在硅衬底上的单片微波集成电路中使用的螺旋电感器的方法。 一种制造电感器的方法，包括以下步骤：在硅衬底上形成第一电介质层并在第一电介质层上形成第一金属线，其中第一金属线与形成在硅衬底上的有源元件接触 ; 还可以形成电介质层和金属层，其中金属层与上金属线和下金属线电连接，并且其中使用电介质层作为蚀刻掩模对金属层进行构图，由此通过使用 螺旋介质图案作为蚀刻掩模。