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公开(公告)号：US11839167B2
公开(公告)日：2023-12-05
申请号：US17134953
申请日：2020-12-28
摘要： Apparatus, methods, and systems are disclosed for robust scalable topological quantum computing. Quantum dots are fabricated as van der Waals heterostructures, supporting localized topological phases and non-Abelian anyons (quasiparticles). Large bandgaps provide noise immunity. Three-dot structures include an intermediate quantum dot between two computational quantum dots. With the intermediate quantum dot in an OFF state, quasiparticles at the computational quantum dots can be isolated, with long lifetimes. Alternatively, the intermediate quantum dot can be controlled to decrease the quasiparticle tunneling barrier, enabling fast computing operations. A computationally universal suite of operations includes quasiparticle initialization, braiding, fusion, and readout of fused quasiparticle states, with, optionally, transport or tunable interactions—all topologically protected. Robust qubits can be operated without error correction. Quasilinear arrays of quantum dots or qubits can be scaled arbitrarily, up to resource limits, and large-scale topological quantum computers can be realized. Extensive two-dimensional arrays can also be used.
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公开(公告)号：US20230385669A1
公开(公告)日：2023-11-30
申请号：US18231917
申请日：2023-08-09
申请人： Intel Corporation
发明人： Xiang ZOU
CPC分类号： G06N10/00 , G06F15/16 , G06F9/30101 , G06F9/30043 , G06N20/00
摘要： An apparatus and method for scalable qubit addressing. For example, one embodiment of a processor comprises: a decoder comprising quantum instruction decode circuitry to decode quantum instructions to generate quantum microoperations (uops) and non-quantum decode circuitry to decode non-quantum instructions to generate non-quantum uops; execution circuitry comprising: an address generation unit (AGU) to generate a system memory address responsive to execution of one or more of the non-quantum uops; and quantum index generation circuitry to generate quantum index values responsive to execution of one or more of the quantum uops, each quantum index value uniquely identifying a quantum bit (qubit) in a quantum processor; wherein to generate a first quantum index value for a first quantum uop, the quantum index generation circuitry is to read the first quantum index value from a first architectural register identified by the first quantum uop.
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公开(公告)号：US11831313B2
公开(公告)日：2023-11-28
申请号：US18046757
申请日：2022-10-14
发明人： Kushal Das , Alireza Moini , David J. Reilly
IPC分类号： H03K19/195 , H02M1/08 , G06N10/00 , G06F9/448 , G06F1/03 , G06F9/30 , G11C11/44 , H02M3/07 , H10B63/00 , H04L45/00 , H04L1/24 , H04L7/033
CPC分类号： H03K19/1958 , G06F1/0321 , G06F9/30098 , G06F9/4498 , G06N10/00 , G11C11/44 , H02M1/08 , H02M3/07 , H03K19/195 , H04L1/24 , H04L7/033 , H04L45/40 , H10B63/30
摘要： Systems and methods related to charge locking circuits and a control system for qubits are provided. A system for controlling qubit gates includes a first packaged device comprising a quantum device including a plurality of qubit gates, where the quantum device is configured to operate at a cryogenic temperature. The system further includes a second packaged device comprising a control circuit configured to operate at the cryogenic temperature, where the first packaged device is coupled to the second packaged device, and where the control circuit comprises a plurality of charge locking circuits, where each of the plurality of charge locking circuits is coupled to at least one qubit gate of the plurality of qubit gates via an interconnect such that each of the plurality of charge locking circuits is configured to provide a voltage signal to at least one qubit gate.
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公开(公告)号：US20230380303A1
公开(公告)日：2023-11-23
申请号：US18224685
申请日：2023-07-21
发明人： Yasunobu NAKAMURA , Yutaka TABUCHI , Shuhei TAMATE
CPC分类号： H10N69/00 , G06N10/00 , H10N60/12 , H10N60/805
摘要： A superconducting complex quantum computing circuit includes a circuit substrate in which a wiring pattern of a circuit element including quantum bits and measurement electrodes, and ground patterns are formed, and through-electrodes connecting the ground pattern formed on a first surface of the substrate surface and the ground pattern formed on a second surface; a first ground electrode including a first contact portion in contact with the ground patterns, and a first non-contact portion having a shape corresponding to a shape of the wiring pattern; a second ground electrode including a second contact portion in contact with the ground pattern; a control signal line provided with a contact spring pin at a tip; and a pressing member that presses the first ground electrode against the first surface of the circuit substrate or presses the second ground electrode against the second surface of the circuit substrate.
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公开(公告)号：US20230376353A1
公开(公告)日：2023-11-23
申请号：US18364182
申请日：2023-08-02
CPC分类号： G06F9/5027 , G06N10/00
摘要： A computing system is provided, including a processor configured to identify a plurality of measurement sequences that implement a logic gate. Each measurement sequence may include a plurality of measurements of a quantum state of a topological quantum computing device. The processor may be further configured to determine a respective estimated total resource cost of each measurement sequence of the plurality of measurement sequences. The processor may be further configured to determine a first measurement sequence that has a lowest estimated total resource cost of the plurality of measurement sequences. The topological quantum computing device may be configured to implement the logic gate by applying the first measurement sequence to the quantum state.
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公开(公告)号：US11824505B2
公开(公告)日：2023-11-21
申请号：US17114863
申请日：2020-12-08
发明人： David J. Reilly
摘要： Systems and methods related to a parametric amplifier including a quantum capacitor are described. In one example, a parametric amplifier comprising an input terminal for receiving a qubit signal is provided. The parametric amplifier further includes a pump terminal for receiving a pump signal. The parametric amplifier further comprises an amplifier, including a plurality of quantum capacitance devices configured to operate in a cryogenic environment, configured to amplify the qubit signal by mixing the qubit signal with the pump signal to generate an amplified signal. The parametric amplifier further includes an output terminal for providing the amplified signal.
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公开(公告)号：US11823010B2
公开(公告)日：2023-11-21
申请号：US17313671
申请日：2021-05-06
申请人： IONQ, INC. , University of Maryland
发明人： Pradeep Niroula , Yunseong Nam
CPC分类号： G06N10/00 , G06F9/30032 , G06F9/30101
摘要： A method of determining a pattern in a sequence of bits using a quantum computing system includes setting a first register of a quantum processor in a superposition of a plurality of string index states, encoding a bit string in a second register of the quantum processor, encoding a bit pattern in a third register of the quantum processor, circularly shifting qubits of the second register conditioned on the first register, amplifying an amplitude of a state combined with the first register in which the circularly shifted qubits of the second register matches qubits of the third register, measuring an amplitude of the first register and determining a string index state of the plurality of string index states associated with the amplified state, and outputting, by use of a classical computer, a string index associated with the first register in the measured state.
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公开(公告)号：US11816558B2
公开(公告)日：2023-11-14
申请号：US16613990
申请日：2018-05-16
摘要： An integrated circuit device for reservoir computing can include a weighted input layer, an unweighted, asynchronous, internal recurrent neural network made up of nodes having binary weighting, and a weighted output layer. Weighting of output signals can be performed using predetermined weighted sums stored in memory. Application specific integrated circuit (ASIC) embodiments may include programmable nodes. Characteristics of the reservoir of the device can be tunable to perform rapid processing and pattern recognition of signals at relatively large rates.
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公开(公告)号：US20230359912A1
公开(公告)日：2023-11-09
申请号：US18351666
申请日：2023-07-13
发明人： Poulami DAS , Nicolas Guillaume DELFOSSE , Christopher Anand PATTISON , Srilatha MANNE , Douglas CARMEAN , Krysta Marie SVORE , Helmut Gottfried KATZGRABER
IPC分类号： G06N10/00 , G06F9/30 , G06F9/38 , G06F9/50 , G06N10/60 , G06N10/40 , G06N10/80 , G06N10/70 , H03M13/15 , H03M13/00 , G06F18/2323
CPC分类号： G06N10/00 , G06F9/30098 , G06F9/30145 , G06F9/3861 , G06F9/5016 , G06N10/60 , G06N10/40 , G06N10/80 , G06N10/70 , G06F9/382 , G06F9/3869 , H03M13/1575 , H03M13/611 , G06F18/2323
摘要： A quantum computing device comprises a surface code lattice that includes l logical qubits, where l is a positive integer. The surface code lattice is partitioned into two or more regions based on lattice geometry. A compression engine is coupled to each logical qubit of the l logical qubits. Each compression engine is configured to compress syndrome data generated by the surface code lattice using a geometry-based compression scheme. A decompression engine is coupled to each compression engine. Each decompression engine is configured to receive compressed syndrome data, decompress the received compressed syndrome data, and route the decompressed syndrome data to a decoder block.
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公开(公告)号：US11809959B2
公开(公告)日：2023-11-07
申请号：US16383365
申请日：2019-04-12
发明人： Guang Hao Low , Nathan O. Wiebe
IPC分类号： G06N10/00 , G06F30/20 , G06F111/10
CPC分类号： G06N10/00 , G06F30/20 , G06F2111/10
摘要： In this disclosure, quantum algorithms are presented for simulating Hamiltonian time-evolution e−i(A+B)t in the interaction picture of quantum mechanics on a quantum computer. The interaction picture is a known analytical tool for separating dynamical effects due to trivial free-evolution A from those due to interactions B. This is especially useful when the energy-scale of the trivial component is dominant, but of little interest. Whereas state-of-art simulation algorithms scale with the energy ∥A+B∥≤∥A∥+∥B∥ of the full Hamiltonian, embodiments of the disclosed approach generally scale linearly with the sum of the Hamiltonian coefficients from the low-energy component B and poly-logarithmically with those from A.
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