公开(公告)号：US20240178228A1

公开(公告)日：2024-05-30

申请号：US18165867

申请日：2023-02-07

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Hung-Li Chiang ,  Jer-Fu Wang ,  Iuliana Radu

IPC分类号： H01L27/092 ,  H01L23/528 ,  H01L29/06 ,  H01L29/417 ,  H01L29/423 ,  H01L29/775

CPC分类号： H01L27/0922 ,  H01L23/5286 ,  H01L29/0673 ,  H01L29/0676 ,  H01L29/41733 ,  H01L29/42392 ,  H01L29/775

摘要： A semiconductor device and a logic device formed of the semiconductor device are provided. The semiconductor device includes a first field effect transistor (FET), disposed on a semiconductor substrate, and including vertically separated first channel structures formed as thin sheets each having opposite major planar surfaces facing toward and away from the semiconductor substrate; and a second FET, disposed on the semiconductor substrate and overlapped with the first FET. A conductive type of the second FET is complementary to a conductive type of the first FET. Second channel structures of the second FET are separately arranged along a lateral direction, and formed as thin walls.

公开(公告)号：US20240170556A1

公开(公告)日：2024-05-23

申请号：US18171524

申请日：2023-02-20

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Shih-Cheng CHEN ,  Zhi-Chang LIN ,  Jung-Hung CHANG ,  Chien-Ning YAO ,  Tsung-Han CHUANG ,  Kuo-Cheng CHIANG

IPC分类号： H01L29/66 ,  H01L21/306 ,  H01L21/308 ,  H01L29/06 ,  H01L29/423 ,  H01L29/775 ,  H01L29/786

CPC分类号： H01L29/66545 ,  H01L21/30604 ,  H01L21/3086 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/6656 ,  H01L29/775 ,  H01L29/78696

摘要： A method for forming a semiconductor structure is provided. The method includes forming a spacer layer along a first fin structure and a second fin structure, etching a first portion of the spacer layer and the first fin structure to form first fin spacers and a first recess between the first fin spacers, etching a second portion of the spacer layer and the second fin structure to form second fin spacers and a second recess between the second fin spacers, and forming a first source/drain feature in the first recess and a second source/drain feature in the second recess. The second fin structure is wider than the first fin structure. The first fin spacers have a first height, and the second fin spacers have a second height that is greater than the first height.

公开(公告)号：US20240170541A1

公开(公告)日：2024-05-23

申请号：US18511608

申请日：2023-11-16

申请人： ENKRIS SEMICONDUCTOR, INC.

发明人： Kai CHENG

IPC分类号： H01L29/20 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

CPC分类号： H01L29/2003 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/66469 ,  H01L29/775 ,  H01L29/78696

摘要： Disclosed are a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes: a substrate including a first region and a second region surrounding the first region; a patterned structure, a first N-type heavily-doped semiconductor layer, a channel layer, and a second N-type heavily-doped semiconductor layer arranged on the first region sequentially; a source electrode connected to the second N-type heavily-doped semiconductor layer; a drain electrode connected to the first N-type heavily-doped semiconductor layer; and a gate electrode wrapping around sidewall of the channel layer. The channel layer is a vertical channel structure wrapped by the gate electrode, which increases a gate control area, makes the electric field distribution more uniform, and greatly improves a control ability on the channel layer, so that a breakdown voltage is effectively increased, leakage current is reduced, dynamic characteristics are improved, and efficiency and linearity of the semiconductor structure are improved as well.

公开(公告)号：US20240170532A1

公开(公告)日：2024-05-23

申请号：US18056731

申请日：2022-11-18

申请人： International Business Machines Corporation

发明人： Ruilong Xie ,  Koichi Motoyama ,  Nicholas Alexander POLOMOFF ,  Leon Sigal

IPC分类号： H01L29/06 ,  H01L21/8234 ,  H01L29/417 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

CPC分类号： H01L29/0673 ,  H01L21/823412 ,  H01L21/823418 ,  H01L29/41733 ,  H01L29/66439 ,  H01L29/775 ,  H01L29/78696

摘要： Embodiments herein include semiconductor structures that may include a first field-effect transistor (FET) comprising a first source/drain (S/D), a second FET comprising a second S/D squarely above the first S/D, and a shared S/D contact. The shared S/D may include a recessed portion between the first S/D and the second S/D, a side portion above the recessed portion, and a top portion above the second S/D. The side portion may contact a lateral side of the second S/D.

公开(公告)号：US11990532B2

公开(公告)日：2024-05-21

申请号：US18067178

申请日：2022-12-16

申请人： Taiwan Semiconductor Manufacturing Company Limited

发明人： Jean-Pierre Colinge ,  Carlos H. Diaz

IPC分类号： H01L21/02 ,  B82Y10/00 ,  H01L21/8234 ,  H01L21/8238 ,  H01L29/06 ,  H01L29/08 ,  H01L29/10 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

CPC分类号： H01L29/66742 ,  B82Y10/00 ,  H01L21/823487 ,  H01L21/823885 ,  H01L29/0676 ,  H01L29/068 ,  H01L29/0847 ,  H01L29/1033 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/775 ,  H01L29/78642 ,  H01L29/78681 ,  H01L29/78684 ,  H01L29/78696 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02532

摘要： According to another embodiment, a method of forming a transistor is provided. The method includes the following operations: providing a substrate; providing a source over the substrate; providing a channel connected to the source; providing a drain connected to the channel; providing a gate insulator adjacent to the channel; providing a gate adjacent to the gate insulator; providing a first interlayer dielectric between the source and the gate; and providing a second interlayer dielectric between the drain and the gate, wherein at least one of the formation of the source, the drain, and the channel includes about 20-95 atomic percent of Sn.

公开(公告)号：US20240162336A1

公开(公告)日：2024-05-16

申请号：US18180698

申请日：2023-03-08

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Ming-Heng TSAI ,  Chun-Sheng LIANG

IPC分类号： H01L29/775 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66

CPC分类号： H01L29/775 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/66439

摘要： Semiconductor structures and methods for manufacturing the same are provided. The semiconductor structure includes a first stack structure extends above the isolation structure, and the first stack structure includes a plurality of first nanostructures along a first direction. The semiconductor structure also includes a second stack structure formed adjacent to the first stack structure, and the second stack structure includes a plurality of second nanostructures along the first direction. A first dielectric wall between the first stack structure and the second stack structure, and the first dielectric wall is directly over a first portion of the isolation structure and surrounded by a second portion of the isolation structure, and a top surface of the first portion of the isolation structure is lower than a top surface of the second portion of the isolation structure.

公开(公告)号：US20240162322A1

公开(公告)日：2024-05-16

申请号：US18206139

申请日：2023-06-06

申请人： Samsung Electronics Co., Ltd.

发明人： Jongmin Shin ,  Donghoon Hwang

IPC分类号： H01L29/423 ,  H01L27/092 ,  H01L29/06 ,  H01L29/417 ,  H01L29/775 ,  H01L29/786

CPC分类号： H01L29/42392 ,  H01L27/092 ,  H01L29/0673 ,  H01L29/41733 ,  H01L29/775 ,  H01L29/78696

摘要： A semiconductor device may include an active region on a substrate, channel patterns on the active region, and gate electrodes on the channel patterns, respectively, and extending in a first direction. The channel patterns may include a first subset of the channel patterns, each of which has a first width, and a second subset of the channel patterns, each of which has a second width. The first and second subsets may be adjacent to each other in a second direction. The channel patterns may further include a buffer channel pattern between the first subset and the second subset. The buffer channel pattern may include a connection side surface extending in the first direction, and the connection side surface may be configured such that a width of the buffer channel pattern changes from the first width to the second width when moving from the first subset to the second subset.

公开(公告)号：US20240162311A1

公开(公告)日：2024-05-16

申请号：US18225777

申请日：2023-07-25

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Darong OH ,  Ho-Jun KIM ,  Jeewoong KIM

IPC分类号： H01L29/417 ,  H01L23/48 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

CPC分类号： H01L29/41733 ,  H01L23/481 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/6656 ,  H01L29/775 ,  H01L29/78696

摘要： A semiconductor device comprising a substrate including an active pattern, a channel pattern and a source/drain pattern that are on the active pattern, the source/drain pattern connected to the channel pattern, a gate electrode on the channel pattern, an active contact on the source/drain pattern, an upper contact being adjacent to the active contact and extending into the substrate, a lower power interconnection line buried in the substrate, and a power delivery network layer on a bottom surface of the substrate, wherein the lower power interconnection line includes a connection portion connected to the upper contact, and a lower portion of the upper contact protrudes into the connection portion.

公开(公告)号：US20240162310A1

公开(公告)日：2024-05-16

申请号：US18180589

申请日：2023-03-08

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Ta-Chun LIN ,  Wen-Chiang HONG ,  Chih-Hao CHANG

IPC分类号： H01L29/417 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

CPC分类号： H01L29/41733 ,  H01L21/823418 ,  H01L21/823481 ,  H01L27/088 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/66545 ,  H01L29/775 ,  H01L29/78696

摘要： Semiconductor structures and methods for manufacturing the same are provided. The semiconductor structure includes a gate structure formed over a substrate, and a first source/drain (S/D) structure formed adjacent to the gate structure. The semiconductor structure includes a first contact structure formed over a first side of the first S/D structure, and a portion of the first contact structure is lower than a top surface of the first S/D structure. The semiconductor structure includes a second contact structure formed over a second side of the first S/D structure, and the second contact structure is in direct contact with the first contact structure.

公开(公告)号：US20240162120A1

公开(公告)日：2024-05-16

申请号：US18205814

申请日：2023-06-05

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： Kern RIM ,  Doo Hyun LEE ,  Heon Jong SHIN ,  Jin Young PARK

IPC分类号： H01L23/48 ,  H01L29/06 ,  H01L29/417 ,  H01L29/423 ,  H01L29/775 ,  H01L29/786

CPC分类号： H01L23/481 ,  H01L29/0673 ,  H01L29/41733 ,  H01L29/41775 ,  H01L29/42392 ,  H01L29/775 ,  H01L29/78696

摘要： A semiconductor device is provided. The semiconductor device includes first through third active patterns extending in and spaced apart from each other along a first direction on a first surface of a substrate; a first gate electrode extending in a second direction on the first active pattern; a first active cut between the first and second active patterns, wherein the first active cut extends in the second direction, and the first active cut is spaced apart from the first gate electrode in the first direction; a second active cut between the second and third active patterns, wherein the second active cut extends in the second direction, and the second active cut is spaced apart from the first active cut in the first direction; and a first through via extending vertically through the second active pattern between the first and second active cuts, and into the substrate.