公开(公告)号：US09026809B2

公开(公告)日：2015-05-05

申请号：US13668943

申请日：2012-11-05

Applicant: Linear Technology Corporation

Inventor： Michael Paul

IPC: G06F1/26 ,  H04L12/10 ,  H02H11/00

CPC classification number: G06F1/26 ,  H02H11/002 ,  H04L12/10

Abstract: A system for combining power to a load in a Powered Device (PD) using Power Over Ethernet (PoE) receives power from a first channel and power from a second channel, via four pairs of wires. A MOSFET bridge for each channel is initially disabled. A bridge controller IC simultaneously senses all the voltages and controls the bridge MOSFETs. The bridge controller IC also contains a first PoE handshaking circuit. A second PoE handshaking circuit is external to the bridge controller IC and operates independently. The body diodes in the MOSFET bridge initially couple the first channel to the second PoE handshaking circuit while isolating the second channel. The second handshaking circuit then couples the first channel to the load. The first handshaking circuit then carries out a PoE handshaking routine for the second channel. Ultimately, the bridge controller controls the bridge MOSFETs to couple both channels to the load.

Abstract translation: 使用以太网供电（PoE）的动力设备（PD）中的负载组合电力的系统通过四对电线从第一通道接收电力并从第二通道接收电力。 最初禁用每个通道的MOSFET桥。 桥式控制器IC同时感测所有电压并控制桥式MOSFET。 桥接控制器IC还包含第一个PoE握手电路。 第二个PoE握手电路在桥接控制器IC的外部，独立运行。 MOSFET桥接器中的体二极管首先将第一通道耦合到第二PoE握手电路，同时隔离第二通道。 然后，第二握手电路将第一通道耦合到负载。 然后，第一握手电路对第二通道执行PoE握手程序。 最终，桥式控制器控制桥式MOSFET将两个通道耦合到负载。

公开(公告)号：US08947101B2

公开(公告)日：2015-02-03

申请号：US13734581

申请日：2013-01-04

Applicant: Linear Technology Corporation

Inventor： Bernhard Helmut Engl

IPC: G01R35/00 ,  G01R17/10 ,  G01R27/14 ,  G01R1/20 ,  G01R27/16

CPC classification number: G01R35/005 ,  G01R1/203 ,  G01R17/105 ,  G01R27/14 ,  G01R27/16

Abstract: Method and system for measuring the resistance of a resistive structure having at least three nodes. A first calibration signal is determined by measuring a voltage at an output of the resistance structure when no calibration current is injected into a third node between the first and second nodes of the structure. A calibration current is then injected into the third node and a second calibration signal is determined. The absolute value of the difference between the first calibration signal and the second calibration signal is determined, the absolute value being proportional to a product of the resistance of the resistive structure and the calibration current.

Abstract translation: 用于测量具有至少三个节点的电阻结构的电阻的方法和系统。 当没有校准电流注入结构的第一和第二节点之间的第三节点时，通过测量电阻结构的输出端的电压来确定第一校准信号。 然后将校准电流注入到第三节点中，并且确定第二校准信号。 确定第一校准信号和第二校准信号之间的差的绝对值，绝对值与电阻结构的电阻与校准电流的乘积成比例。

公开(公告)号：US20150016005A1

公开(公告)日：2015-01-15

申请号：US14300999

申请日：2014-06-10

Applicant: Linear Technology Corporation

Inventor： Joshua John SIMONSON ,  David Henry SOO ,  Christopher Bruce UMMINGER

IPC: H02H9/02

CPC classification number: H02H9/025 ,  H02H3/025 ,  H02H9/004 ,  H03K17/167

Abstract: A novel system is offered for supplying power from an input node to a load coupled to an output node. The system may have multiple switches coupled between the input node and the output node. One or more limiting circuits may be configured for controlling the switches so as to limit outputs of the switches. For example, the limiting circuits may limit current through the respective switches. One or more timers may set a delay period for indicating a fault condition after the limiting is initiated.

Abstract translation: 提供了一种新颖的系统，用于从输入节点向耦合到输出节点的负载供电。 该系统可以具有耦合在输入节点和输出节点之间的多个开关。 一个或多个限制电路可以被配置为用于控制开关以限制开关的输出。 例如，限制电路可以限制通过相应开关的电流。 一个或多个定时器可以在启动限制之后设置用于指示故障状况的延迟时段。

公开(公告)号：US20140312866A1

公开(公告)日：2014-10-23

申请号：US13969893

申请日：2013-08-19

Applicant: Linear Technology Corporation

Inventor： Robert Dobkin ,  Amitkumar Pravin Patel

IPC: G05F1/575 ,  G05F1/46

CPC classification number: G05F1/575 ,  G05F1/468

Abstract: A linear regulator integrated circuit may be formed having four external terminals including a voltage input (Vin) terminal, a voltage output (Vout) terminal, a Set terminal, and an operational amplifier (op amp) power terminal. A user connects an external resistor to the Set terminal for creating a reference voltage. An op amp controls a pass (or series transistor) to cause an output voltage at the Vout terminal to equal the reference voltage. The op amp has a first power supply terminal internally coupled to the Vin terminal and a second power supply terminal coupled to the op amp power terminal. The op amp power terminal allows a user to externally couple the op amp second power supply terminal to either the Vout pin (for high voltage applications), system ground (for medium voltage applications), or another voltage (to provide additional headroom in very low voltage applications).

Abstract translation: 线性稳压器集成电路可以形成为具有包括电压输入（Vin）端子，电压输出（Vout）端子，设置端子和运算放大器（运算放大器）功率端子）的四个外部端子。 用户将外部电阻连接到设置端子以创建参考电压。 运算放大器控制通过（或串联晶体管），使Vout端子处的输出电压等于参考电压。 运算放大器具有内部耦合到Vin端子的第一电源端子和耦合到运算放大器电源端子的第二电源端子。 运算放大器电源端子允许用户将运算放大器第二电源端子外部耦合到Vout引脚（用于高电压应用），系统地（用于中压应用）或另一电压（以提供更低的额外余量） 电压应用）。

公开(公告)号：US08866554B2

公开(公告)日：2014-10-21

申请号：US13829807

申请日：2013-03-14

Applicant: Linear Technology Corporation

Inventor： Thomas Lloyd Botker

IPC: H03F3/45

CPC classification number: H03F1/0266 ,  H03F3/45183 ,  H03F3/45475 ,  H03F2200/447 ,  H03F2203/45248 ,  H03F2203/45466 ,  H03F2203/45512 ,  H03F2203/45702

Abstract: A method of improving the slew rate of an amplifier is described where a differential pair of transistors receives a differential first control signal and second control signal. The tail current for the transistors is provided by a tail current regulator. The same control signals are applied to a slew boost controller, whose output increases as the differential between the control signals increase. The tail current regulator generates a bias signal that sets a minimum tail current. The tail current is controlled to be the minimum tail current until the slew boost output signal exceeds a threshold, whereupon the tail current increases in response to an increasing differential between the control signals. Common mode rejection is not adversely affected by the slew boost controller generating a slightly varying current under common mode conditions due to the minimum tail current.

Abstract translation: 描述了一种提高放大器的转换速率的方法，其中差分对晶体管接收差分第一控制信号和第二控制信号。 晶体管的尾电流由尾电流调节器提供。 相同的控制信号被施加到压摆升压控制器，其输出随着控制信号之间的差异增加而增加。 尾电流调节器产生设置最小尾电流的偏置信号。 尾电流被控制为最小尾电流，直到转换升压输出信号超过阈值为止，因此尾电流响应于控制信号之间的差增加而增加。 由于最小的尾电流，共模抑制不会在共模状态下产生略微变化的电流的压摆升压控制器产生不利影响。

公开(公告)号：US20140306670A1

公开(公告)日：2014-10-16

申请号：US13963880

申请日：2013-08-09

Applicant: Linear Technology Corporation

Inventor： Jian LI

IPC: H02M11/00

CPC classification number: H02M3/156 ,  H02M2003/1566

Abstract: A method and a circuit dynamically adjust a frequency of a clock signal that drives the operations of a power converter. The method includes (a) detecting a change from a predetermined value in an output voltage of the power converter; and (b) upon detecting the change, changing the frequency of the clock signal so as to restore the output voltage. The change, such as a load step-up, may be detected by comparing a feedback signal generated from the output voltage and a predetermined threshold voltage. In one implementation, changing the switching frequency is achieved in increasing (e.g., doubling) the frequency of the clock signal, as needed. The frequency of the clock signal need only be changed for a predetermined time period.

Abstract translation: 一种方法和电路动态地调节驱动功率转换器的操作的时钟信号的频率。 该方法包括：（a）检测来自功率转换器的输出电压中的预定值的变化; 和（b）在检测到变化时，改变时钟信号的频率以恢复输出电压。 可以通过比较从输出电压产生的反馈信号和预定的阈值电压来检测诸如负载升压的变化。 在一个实现中，根据需要增加（例如，加倍）时钟信号的频率来实现改变开关频率。 时钟信号的频率仅需要改变预定时间段。

公开(公告)号：US08841962B1

公开(公告)日：2014-09-23

申请号：US13871981

申请日：2013-04-26

Applicant: Linear Technology Corporation

Inventor： Gerd Trampitsch

IPC: H03K5/00 ,  H03F1/34

CPC classification number: H03F3/45475 ,  H03F2203/45514

Abstract: Methods and systems for a differential correlated double sampling (CDS) switched capacitor integrator circuit. The circuit includes a differential amplifier that has a differential input and a differential output. There is a first feedback path between the negative output node and the positive input node, and a second feedback path between the positive output node and the negative input node. Each feedback path includes an integration capacitor and at least one switch that has a parasitic capacitance. A first capacitive element is coupled between the negative input node and the negative output node, and a second capacitive element is coupled between the positive input node and the positive output node. Each capacitive element is configured to cancel the parasitic capacitance of its corresponding feedback path.

Abstract translation: 差分相关双采样（CDS）开关电容积分电路的方法和系统。 该电路包括具有差分输入和差分输出的差分放大器。 在负输出节点和正输入节点之间存在第一反馈路径，以及在正输出节点和负输入节点之间的第二反馈路径。 每个反馈路径包括积分电容器和至少一个具有寄生电容的开关。 第一电容元件耦合在负输入节点和负输出节点之间，第二电容元件耦合在正输入节点和正输出节点之间。 每个电容元件被配置为抵消其对应的反馈路径的寄生电容。

公开(公告)号：US20140233288A1

公开(公告)日：2014-08-21

申请号：US14092131

申请日：2013-11-27

Applicant: Linear Technology Corporation

Inventor： Michael Hendrikus Laurentius KOUWENHOVEN

IPC: H02M7/217 ,  G06G7/20

CPC classification number: G06G7/20 ,  G01R19/02 ,  G01R21/10 ,  H02M7/217

Abstract: An RMS-DC converter includes a chopper-stabilized square cell that eliminates offset, thus enabling high-bandwidth operation. The chopper-stabilized offset requires only a small portion of the circuitry (i.e., a single component square cell) which operates at high frequencies, and is amenable to using high-bandwidth component square cells. Using the chopping technique minimizes required device sizes without compromising an acceptable square cell dynamic range, thereby maximizing the square cell bandwidth. The RMS-DC converter consumes less power than conventional RMS-to-DC converters that requires a high-frequency variable gain amplifier.

Abstract translation: RMS-DC转换器包括消除偏移的斩波稳定的方形单元，从而实现高带宽操作。 斩波稳定的偏移仅需要在高频下工作的电路（即，单个分量方形小区）的一小部分，并且可以使用高带宽分量方形小区。 使用斩波技术最小化所需的设备尺寸，而不会影响可接受的平方单元动态范围，从而最大化平方单元带宽。 与需要高频可变增益放大器的常规RMS-DC转换器相比，RMS-DC转换器的功耗更低。

公开(公告)号：US20140191768A1

公开(公告)日：2014-07-10

申请号：US13734581

申请日：2013-01-04

Applicant: LINEAR TECHNOLOGY CORPORATION

Inventor： Bernhard Helmut ENGL

IPC: G01R35/00 ,  G01R27/14

CPC classification number: G01R35/005 ,  G01R1/203 ,  G01R17/105 ,  G01R27/14 ,  G01R27/16

Abstract: Method and system for measuring the resistance of a resistive structure having at least three nodes. A first calibration signal is determined by measuring a voltage at an output of the resistance structure when no calibration current is injected into a third node between the first and second nodes of the structure. A calibration current is then injected into the third node and a second calibration signal is determined. The absolute value of the difference between the first calibration signal and the second calibration signal is determined, the absolute value being proportional to a product of the resistance of the resistive structure and the calibration current.

Abstract translation: 用于测量具有至少三个节点的电阻结构的电阻的方法和系统。 当没有校准电流注入结构的第一和第二节点之间的第三节点时，通过测量电阻结构的输出端的电压来确定第一校准信号。 然后将校准电流注入到第三节点中，并且确定第二校准信号。 确定第一校准信号和第二校准信号之间的差的绝对值，绝对值与电阻结构的电阻与校准电流的乘积成比例。

公开(公告)号：US20140191741A1

公开(公告)日：2014-07-10

申请号：US13734485

申请日：2013-01-04

Applicant: LINEAR TECHNOLOGY CORPORATION

Inventor： Samuel H. NORK

IPC: G05F1/62

CPC classification number: G05F1/62 ,  G01R29/24 ,  H02J7/0078 ,  H02M3/156 ,  H02M3/1582 ,  H02M2001/0032

Abstract: A power supply system includes a regulator circuit responsive to an input signal at the input node for producing an output signal at the output node at a desired level. The regulator circuit has a controller, an inductive element and a first switch coupled to the inductor element and controlled by the controller to produce the output signal. Also, the power supply system includes a Coulomb counter for producing a Coulomb count signal proportional to the number of Coulombs passing from the input node to the output node. The Coulomb counter is enabled by an enabling signal representing a predetermined time period, for determining the number of Coulombs passing from the input node to the output node during that predetermined time period.

Abstract translation: 电源系统包括响应于输入节点处的输入信号的调节器电路，用于在输出节点处以期望的水平产生输出信号。 调节器电路具有控制器，电感元件和耦合到电感器元件并由控制器控制以产生输出信号的第一开关。 此外，电源系统包括用于产生与从输入节点传送到输出节点的库仑数成正比的库仑计数信号的库仑计数器。 库仑计数器由表示预定时间段的使能信号使能，用于确定在该预定时间段期间从输入节点传送到输出节点的库仑数。