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    Selective activation of programming schemes in analog memory cell arrays
    101.
    发明授权
    Selective activation of programming schemes in analog memory cell arrays 有权
    在模拟存储单元阵列中选择性地激活编程方案

    公开(公告)号：US09007797B2

    公开(公告)日：2015-04-14

    申请号：US14215208

    申请日：2014-03-17

    Applicant: Apple Inc.

    Inventor： Dotan Sokolov ,  Naftali Sommer ,  Uri Perlmutter ,  Ofir Shalvi

    IPC: G11C27/00 ,  G11C7/02 ,  G11C11/56 ,  G11C16/34

    CPC classification number: G11C27/005 ,  G11C7/02 ,  G11C11/5628 ,  G11C16/3418

    Abstract: A method for data storage includes defining a first programming scheme that programs a group of analog memory cells while reducing interference caused by at least one memory cell that neighbors the group, and a second programming scheme that programs the group of the analog memory cells and does not reduce all of the interference reduced by the first programming scheme. One of the first and second programming schemes is selected based on a criterion defined with respect to the analog memory cells. Data is stored in the group of the analog memory cells using the selected programming scheme.

    Abstract translation: 一种用于数据存储的方法包括：定义第一编程方案，其编程一组模拟存储器单元，同时减少由与该组相邻的至少一个存储器单元引起的干扰;以及第二编程方案，其对该组模拟存储器单元进行编程 不能减少第一编程方案减少的所有干扰。 基于针对模拟存储器单元定义的标准来选择第一和第二编程方案之一。 使用所选择的编程方案将数据存储在模拟存储器单元的组中。

    STORAGE AT M BITS/CELL DENSITY IN N BITS/CELL ANALOG MEMORY CELL DEVICES, M>N
    104.
    发明申请
    STORAGE AT M BITS/CELL DENSITY IN N BITS/CELL ANALOG MEMORY CELL DEVICES, M>N 有权
    存储在N位/细胞模拟记忆体细胞中的位置/细胞密度M> N

    公开(公告)号：US20140237322A1

    公开(公告)日：2014-08-21

    申请号：US14264303

    申请日：2014-04-29

    Applicant: Apple Inc.

    Inventor： Ofir Shalvi ,  Naftali Sommer ,  Uri Perlmutter ,  Dotan Sokolov

    IPC: G06F11/10

    CPC classification number: G06F11/1068 ,  G11C11/5628 ,  G11C11/5642 ,  G11C16/26 ,  G11C27/005 ,  G11C2211/5641

    Abstract: A method for data storage includes accepting data for storage in a memory that includes multiple analog memory cells and supports a set of built-in programming commands. Each of the programming commands programs a respective page, selected from a group of N pages, in a subset of the memory cells. The subset of the memory cells is programmed to store M pages of the data, M>N, by performing a sequence of the programming commands drawn only from the set.

    Abstract translation: 一种用于数据存储的方法包括接收用于存储在包括多个模拟存储器单元的存储器中的数据，并且支持一组内置的编程命令。 每个编程命令在存储器单元的子集中编写从一组N页中选择的相应页面。 存储器单元的子集被编程为通过执行仅从集合中绘制的编程命令的序列来存储数据的M页M> N。

    HIGH-PERFORMANCE ECC DECODER
    105.
    发明申请
    HIGH-PERFORMANCE ECC DECODER 审中-公开
    高性能ECC解码器

    公开(公告)号：US20140164884A1

    公开(公告)日：2014-06-12

    申请号：US14182802

    申请日：2014-02-18

    Applicant: Apple Inc.

    Inventor： Micha Anholt ,  Naftali Sommer ,  Gil Semo ,  Tal Inbar

    IPC: H03M13/15

    CPC classification number: G06F11/1076 ,  H03M13/03 ,  H03M13/1525 ,  H03M13/45 ,  H03M13/617

    Abstract: Methods for Error Correction Code (ECC) decoding include producing syndromes from a set of bits, which represent data that has been encoded with the ECC. An Error Locator Polynomial (ELP) is generated based on the syndromes. At least some of the ELP roots are identified, and the errors indicated by these roots are corrected. Each syndrome may be produced by applying to the bits vector operations in a vector space. Each syndrome is produced by applying vector operations using a different basis of the vector space. The ELP may be evaluated on a given field element by operating on ELP coefficients using serial multipliers, wherein each serial multiplier performs a sequence of multiplication cycles and produces an interim result in each cycle. Responsively to detecting at least one interim result indicating that the given element is not an ELP root, the multiplication cycles are terminated before completion of the sequence.

    Abstract translation: 用于纠错码（ECC）解码的方法包括从表示已经用ECC编码的数据的一组位产生综合征。 错误定位器多项式（ELP）是基于综合征产生的。 识别至少一些ELP根，并校正由这些根指示的错误。 可以通过应用向量空间中的比特向量操作来产生每个综合征。 通过使用向量空间的不同基础应用向量运算来产生每个综合征。 可以通过使用串行乘法器对ELP系数进行操作，在给定的场元件上评估ELP，其中每个串行乘法器执行乘法周期序列，并在每个周期中产生中间结果。 响应于检测至少一个中期结果，指示给定的元素不是ELP根，在完成序列之前终止乘法循环。

    Estimation of memory cell wear level based on saturation current
    106.
    发明授权
    Estimation of memory cell wear level based on saturation current 有权
    基于饱和电流估计存储单元磨损水平

    公开(公告)号：US08717826B1

    公开(公告)日：2014-05-06

    申请号：US13710938

    申请日：2012-12-11

    Applicant: Apple Inc.

    Inventor： Eyal Gurgi ,  Naftali Sommer ,  Yael Shur

    IPC: G11C11/34

    CPC classification number: G11C16/349

    Abstract: A method includes measuring a saturation current flowing through one or more analog memory cells. A wear level of the memory cells is deduced from the measured saturation current. Storage of data in the memory cells is configured based on the deduced wear level.

    Abstract translation: 一种方法包括测量流过一个或多个模拟存储器单元的饱和​​电流。 从测量的饱和电流推导出存储器单元的磨损水平。 基于推导的磨损水平来配置存储单元中的数据存储。

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