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公开(公告)号：US09906804B2
公开(公告)日：2018-02-27
申请号：US14598117
申请日：2015-01-15
Applicant: QUALCOMM Incorporated
Inventor： Jianle Chen , Krishnakanth Rapaka , Marta Karczewicz
Abstract: Systems and methods for encoding and decoding scalable video information are disclosed. The system may have a memory unit configured to store syntax elements for a multi-layer picture. The system may further comprise one or more processors operationally coupled to the memory unit. The processors may be configured to determine at least one phase offset value between a reference layer sample position in the multi-layer picture and a corresponding enhancement layer sample position. The processors may be further configured to generate a syntax element indicating the phase offset value the phase offset value representing a phase offset of a luma sample position and a chroma sample position of the reference layer position.
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公开(公告)号：US09854259B2
公开(公告)日：2017-12-26
申请号：US13935283
申请日：2013-07-03
Applicant: QUALCOMM Incorporated
Inventor： Krishnakanth Rapaka , Jianle Chen , Marta Karczewicz
IPC: H04N7/26 , H04N19/30 , H04N19/105 , H04N19/70 , H04N19/147 , H04N19/593 , H04N19/80 , H04N19/82 , H04N19/33 , H04N19/85 , H04N19/86
CPC classification number: H04N19/30 , H04N19/105 , H04N19/147 , H04N19/33 , H04N19/593 , H04N19/70 , H04N19/80 , H04N19/82 , H04N19/85 , H04N19/86
Abstract: An apparatus for coding video information according to certain aspects includes a memory unit and a processor in communication with the memory unit. The memory unit stores difference video information associated with a difference video layer of pixel information derived from a difference between an enhancement layer and a corresponding base layer of the video information. The processor determines a value of a video unit based on a reference video unit or spatial neighboring video unit within the difference video layer and applies a smoothing filter to the reference video unit or spatial neighboring video unit.
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公开(公告)号：US09832467B2
公开(公告)日：2017-11-28
申请号：US14860250
申请日：2015-09-21
Applicant: QUALCOMM Incorporated
Inventor： Krishnakanth Rapaka , Joel Sole Rojals , Cheng-Teh Hsieh , Chao Pang , Vadim Seregin , Marta Karczewicz
IPC: H04N19/176 , H04N19/86 , H04N19/00 , H04N19/50 , H04N19/103 , H04N19/117 , H04N19/182 , H04N19/513 , H04N19/593 , H04N19/82 , H04N19/159
CPC classification number: H04N19/117 , H04N19/159 , H04N19/176 , H04N19/182 , H04N19/513 , H04N19/593 , H04N19/82 , H04N19/86
Abstract: Techniques are described for determining boundary strength value for an intra-block copy (IBC)-coded block and for selective storage of unfiltered pixel values of a region of a picture based on whether the region will be used as reference for IBC coding.
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公开(公告)号：US09794626B2
公开(公告)日：2017-10-17
申请号：US14700982
申请日：2015-04-30
Applicant: QUALCOMM Incorporated
Inventor： Adarsh Krishnan Ramasubramonian , Ye-Kui Wang , Fnu Hendry , Krishnakanth Rapaka
IPC: H04N19/85 , H04N19/48 , H04N19/39 , H04N19/29 , H04N19/187 , H04N21/45 , H04N21/2343 , H04N19/44 , H04N19/70 , H04N19/66 , H04N19/30 , H04N19/127 , H04N19/157 , H04N19/436 , H04N21/81
CPC classification number: H04N21/4516 , H04N19/127 , H04N19/157 , H04N19/187 , H04N19/29 , H04N19/30 , H04N19/39 , H04N19/436 , H04N19/44 , H04N19/48 , H04N19/66 , H04N19/70 , H04N19/85 , H04N21/234327 , H04N21/816
Abstract: A video decoder is configured to decode a bitstream that comprises an encoded representation of video data. As part of decoding the bitstream, the video decoder obtains, from the bitstream, one or more syntax elements indicating one or more partitioning schemes. For each respective partitioning scheme of the one or more partitioning schemes, the respective partitioning scheme specifies a respective set of disjoint partitions whose union forms an output layer set. Each respective partition of the respective set of disjoint partitions contains one or more of the layers. The video decoder is further configured to decode each of the partitions of a particular partitioning scheme using different processing cores in a plurality of hardware cores, the particular partitioning scheme being one of the one or more partitioning schemes.
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公开(公告)号：US09756335B2
公开(公告)日：2017-09-05
申请号：US14318230
申请日：2014-06-27
Applicant: QUALCOMM Incorporated
Inventor： Jianle Chen , Ying Chen , Ye-Kui Wang , Krishnakanth Rapaka , Fnu Hendry
IPC: H04N19/70 , H04N19/30 , H04N19/187 , H04N19/597 , H04N19/105 , H04N19/46 , H04N19/196 , H04N19/174
CPC classification number: H04N19/105 , H04N19/174 , H04N19/196 , H04N19/30 , H04N19/46 , H04N19/597 , H04N19/70
Abstract: A method of coding video data includes receiving one or more layers of video information. Each layer may include at least one picture. The method can include determining a number of active reference layer pictures associated with at least one picture of the one or more layers. The method can further include determining a number of direct reference layers associated with the at least one of the one or more layers. Based on the number of direct reference layers equaling the number of active reference layer pictures, the method can further include refraining from further signaling inter-layer reference picture information in any video slice associated with at least one of a video parameter set (VPS), a sequence parameter set (SPS), or a picture parameter set (PPS).
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Patent Agency Ranking
公开(公告)号：US09712871B2
公开(公告)日：2017-07-18
申请号：US14701004
申请日：2015-04-30
Applicant: QUALCOMM Incorporated
Inventor： Adarsh Krishnan Ramasubramonian , Ye-Kui Wang , Fnu Hendry , Krishnakanth Rapaka
IPC: H04N19/85 , H04N19/48 , H04N19/44 , H04N19/39 , H04N19/29 , H04N19/187 , H04N21/45 , H04N21/2343 , H04N19/70 , H04N19/66 , H04N19/30 , H04N19/127 , H04N19/157 , H04N19/436 , H04N21/81
CPC classification number: H04N21/4516 , H04N19/127 , H04N19/157 , H04N19/187 , H04N19/29 , H04N19/30 , H04N19/39 , H04N19/436 , H04N19/44 , H04N19/48 , H04N19/66 , H04N19/70 , H04N19/85 , H04N21/234327 , H04N21/816
Abstract: A multi-layer video decoder is configured to determine, based on a list of triplet entries, whether the multi-layer video decoder is capable of decoding a bitstream that comprises an encoded representation of the multi-layer video data. The number of triplet entries in the list is equal to a number of single-layer decoders in the multi-layer video decoder. Each respective triplet entry in the list of triplet entries indicates a profile, a tier, and a level for a respective single-layer decoder in the multi-layer video decoder. The multi-layer video decoder is configured such that, based on the multi-layer video decoder being capable of decoding the bitstream, the multi-layer video decoder decodes the bitstream.
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公开(公告)号：US09674522B2
公开(公告)日：2017-06-06
申请号：US14243835
申请日：2014-04-02
Applicant: QUALCOMM Incorporated
Inventor： Krishnakanth Rapaka , Jianle Chen , Marta Karczewicz
IPC: H04N7/12 , H04N19/31 , H04N19/70 , H04N19/187
CPC classification number: H04N19/31 , H04N19/187 , H04N19/70
Abstract: An apparatus configured to code (e.g., encode or decode) video information includes a memory unit and a processor in communication with the memory unit. The memory unit is configured to store video information associated with a video layer comprising one or more temporal sub-layers. The processor is configured to determine presence information for a coded video sequence in a bitstream, the presence information indicating whether said one or more temporal sub-layers of the video layer are present in the bitstream. The processor may encode or decode the video information.
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公开(公告)号：US09648335B2
公开(公告)日：2017-05-09
申请号：US14328317
申请日：2014-07-10
Applicant: QUALCOMM Incorporated
Inventor： Krishnakanth Rapaka , Ye-Kui Wang , Adarsh Krishnan Ramasubramonian , Jianle Chen
IPC: H04B1/66 , H04N19/30 , H04N19/597 , H04N19/70 , H04N19/436
CPC classification number: H04N19/36 , H04N19/105 , H04N19/172 , H04N19/176 , H04N19/184 , H04N19/30 , H04N19/436 , H04N19/597 , H04N19/70 , H04N19/96
Abstract: Bitstream restrictions or constraints on the partitioning of pictures across layers of video data are described. In some examples, the number of tiles per picture for each layer of a plurality of layers is constrained based on a maximum number of tiles per picture for the layer. In some examples, the number of tiles per picture for each layer of the plurality of layers is no greater than the maximum number of tiles per picture for the layer. In some examples, a sum of the numbers of tiles per picture for the plurality of layers is no greater than a sum of the maximum numbers of tiles per picture for the plurality of layers. In some examples, a second largest coding unit (LCU) or coding tree block (CTB) size for a second layer is constrained based on, e.g., to be equal to, a first LCU size for a first layer.
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公开(公告)号：US09641836B2
公开(公告)日：2017-05-02
申请号：US13957841
申请日：2013-08-02
Applicant: QUALCOMM Incorporated
Inventor： Xiang Li , Krishnakanth Rapaka , Jianle Chen , Marta Karczewicz
IPC: H04B1/66 , H04N11/04 , H04N7/12 , H04N11/02 , H04N7/26 , H04N19/50 , H04N19/597 , H04N19/105 , H04N19/172 , H04N19/30 , H04N19/149 , H04N19/34
CPC classification number: H04N19/50 , H04N19/105 , H04N19/149 , H04N19/172 , H04N19/30 , H04N19/34 , H04N19/597
Abstract: An apparatus for coding video information according to certain aspects includes a memory unit and a processor in communication with the memory unit. The memory unit stores video information associated with a reference layer. The processor determines a value of a current video unit based on, at least in part, a reconstruction value associated with the reference layer and an adjusted difference prediction value. The adjusted difference prediction value is equal to a difference between a prediction of a current layer and a prediction of the reference layer multiplied by a weighting factor that is different from 1.
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公开(公告)号：US09628792B2
公开(公告)日：2017-04-18
申请号：US14330985
申请日：2014-07-14
Applicant: QUALCOMM Incorporated
Inventor： Krishnakanth Rapaka , Ye-Kui Wang , Adarsh Krishnan Ramasubramonian
IPC: H04N19/50 , H04N19/70 , H04N19/33 , H04N19/436 , H04N19/105 , H04N19/176 , H04N19/187 , H04N19/136 , H04N19/167
CPC classification number: H04N19/50 , H04N19/105 , H04N19/136 , H04N19/167 , H04N19/176 , H04N19/187 , H04N19/33 , H04N19/436 , H04N19/70
Abstract: In an example, a method of coding video data includes coding data of a video parameter set (VPS) of a multi-layer bitstream, including at least one of data that indicates whether any layers of the multi-layer bitstream have an inter-layer prediction restriction or data that indicates whether tile boundaries are aligned between at least two of the layers of the multi-layer bitstream, and coding the multi-layer bitstream in accordance with the data of the VPS.
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