公开(公告)号：US11152330B2

公开(公告)日：2021-10-19

申请号：US16385242

申请日：2019-04-16

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Cheng-Chieh Li ,  Pu Wang ,  Chih-Wei Wu ,  Ying-Ching Shih ,  Szu-Wei Lu

IPC: H01L21/48 ,  H01L21/56 ,  H01L21/683 ,  H01L21/78 ,  H01L25/065 ,  H01L23/367 ,  H01L25/00

Abstract: A method for forming a semiconductor package structure includes stacking chips to form a chip stack over an interposer. The method also includes disposing a semiconductor die over the interposer. The method also includes filling a first encapsulating layer between the chips and surrounding the chip stack and the semiconductor die. The method also includes forming a second encapsulating layer covering the chip stack and the semiconductor die. The first encapsulating layer fills the gap between the chip stack and the semiconductor die.

公开(公告)号：US11024616B2

公开(公告)日：2021-06-01

申请号：US16413612

申请日：2019-05-16

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Wei Chen ,  Li-Chung Kuo ,  Long-Hua Lee ,  Szu-Wei Lu ,  Ying-Ching Shih ,  Kuan-Yu Huang

IPC: H01L25/11 ,  H01L23/538 ,  H01L23/498 ,  H01L25/00 ,  H01L23/31 ,  H01L25/10 ,  H01L23/00 ,  H01L21/56 ,  H01L23/29

Abstract: Provided is a package structure including at least two chips, an interposer, a first encapsulant, and a second encapsulant. The at least two chips are disposed side by side and bonded to the interposer by a plurality of connectors. The first encapsulant is disposed on the interposer and filling in a gap between the at least two chips. The second encapsulant encapsulates the plurality of connectors and surrounding the at least two chips, wherein the second encapsulant is in contact with the first encapsulant sandwiched between the at least two chips, and a material of the second encapsulant has a coefficient of thermal expansion (CTE) larger than a CTE of a material of the first encapsulant. A method of manufacturing a package structure is also provided.

公开(公告)号：US20210118758A1

公开(公告)日：2021-04-22

申请号：US16655135

申请日：2019-10-16

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Li-Hui Cheng ,  Chin-Fu Kao ,  Szu-Wei Lu ,  Chih-Chien Pan

IPC: H01L23/31 ,  H01L23/00 ,  H01L21/56

Abstract: Semiconductor packages and methods of forming the same are disclosed. a semiconductor package includes a die and an underfill. The die is disposed over a surface and includes a first sidewall. The underfill encapsulates the die. The underfill includes a first underfill fillet on the first sidewall, and in a cross-sectional view, a second sidewall of the first underfill fillet has a turning point.

公开(公告)号：US10964609B2

公开(公告)日：2021-03-30

申请号：US16420186

申请日：2019-05-23

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yi-Chao Mao ,  Chin-Chuan Chang ,  Szu-Wei Lu

IPC: H01L21/56 ,  H01L21/66 ,  H01L21/306

Abstract: An apparatus for detecting an endpoint of a grinding process includes a connecting device, a timer and a controller. The connecting device is connected to a sensor that periodically senses an interface of a reconstructed wafer comprising a plurality of dies of at least two types to generate a thickness signal comprising thicknesses from a surface of an insulating layer of the reconstructed wafer to the interface of the reconstructed wafer. The timer is configured to generate a clock signal having a plurality of pulses with a time interval. The controller is coupled to the sensor and the timer, and configured to filter the thickness signal according to the clock signal to output a thickness extremum among the thicknesses in the thickness signal within each time interval, wherein the thickness signal after the filtering is used to determine the endpoint of the grinding process being performed on the reconstructed wafer.

公开(公告)号：US20210057384A1

公开(公告)日：2021-02-25

申请号：US16547609

申请日：2019-08-22

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chin-Fu Kao ,  Chih-Yuan Chien ,  Li-Hui Cheng ,  Szu-Wei Lu

IPC: H01L25/065 ,  H01L23/367 ,  H01L23/31 ,  H01L23/538 ,  H01L21/56 ,  H01L21/48 ,  H01L23/00

Abstract: Semiconductor packages and methods of forming the same are provided. One of the semiconductor packages includes a first semiconductor die, an adhesive layer, a second semiconductor die and an underfill. The first semiconductor die includes a first surface, and the first surface includes a central region and a peripheral region surrounding the central region. The adhesive layer is adhered to the peripheral region and exposes the central region. The second semiconductor die is stacked over the first surface of the first semiconductor die. The underfill is disposed between the first semiconductor die and the second semiconductor die.

公开(公告)号：US10916488B2

公开(公告)日：2021-02-09

申请号：US16431747

申请日：2019-06-05

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Jing-Cheng Lin ,  Szu-Wei Lu

IPC: H01L23/40 ,  H01L23/433 ,  H01L21/56 ,  H01L23/00 ,  H01L23/367 ,  H01L25/10 ,  H01L25/18 ,  H01L23/31

Abstract: Semiconductor packages are provided. One of the semiconductor package includes a semiconductor die, a thermal conductive pattern, an encapsulant and a thermal conductive layer. The thermal conductive pattern is disposed aside the semiconductor die. The encapsulant encapsulates the semiconductor die and the thermal conductive pattern. The thermal conductive layer covers a rear surface of the semiconductor die, wherein the thermal conductive pattern is thermally coupled to the semiconductor die through the thermal conductive layer and electrically insulated from the semiconductor die.

公开(公告)号：US20200294818A1

公开(公告)日：2020-09-17

申请号：US16886800

申请日：2020-05-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yi-Chao Mao ,  Chin-Chuan Chang ,  Szu-Wei Lu

IPC: H01L21/67 ,  H01L23/00 ,  H01L21/683 ,  H01L21/687 ,  H01L21/56

Abstract: A method for thinning a substrate is provided. The method includes at least the following steps. A substrate is disposed on a carrying surface of a chuck, where a first liquid supply unit surrounds the chuck to form a frame of the chuck, and an outlet of the first liquid supply unit is disposed aside the carrying surface of the chuck. A first liquid flows from a bottom of the frame to the outlet and discharges to fill a gap between the substrate and the carrying surface of the chuck. The substrate is thinned during the gap is filled.

公开(公告)号：US20200273718A1

公开(公告)日：2020-08-27

申请号：US16283851

申请日：2019-02-25

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Li-Hui Cheng ,  Szu-Wei Lu ,  Ping-Yin Hsieh ,  Chih-Hao Chen

IPC: H01L21/48 ,  H01L23/00 ,  H01L25/10 ,  H01L21/56

Abstract: A package structure and the manufacturing method thereof are provided. The package structure includes a semiconductor die, conductive through vias, an insulating encapsulant, and a redistribution structure. The conductive through vias are electrically coupled to the semiconductor die. The insulating encapsulant laterally encapsulates the semiconductor die and the conductive through vias, wherein the insulating encapsulant has a recess ring surrounding the semiconductor die, the conductive through vias are located under the recess ring, and a vertical projection of each of the conductive through vias overlaps with a vertical projection of the recess ring. The redistribution structure is electrically connected to the semiconductor die and the conductive through vias.

公开(公告)号：US20200091077A1

公开(公告)日：2020-03-19

申请号：US16134966

申请日：2018-09-19

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Tsung-Fu Tsai ,  Hou-Ju Huang ,  Shih-Ting Lin ,  Szu-Wei Lu ,  Hung-Wei Tsai

IPC: H01L23/532 ,  H01L23/29 ,  H01L23/538 ,  H01L21/56 ,  H01L21/48

Abstract: An electronic device and the manufacturing method thereof are provided. The electronic device includes a semiconductor die, a conductive structure electrically coupled to the semiconductor die, an insulating encapsulant encapsulating the semiconductor die and the conductive structure, and a redistribution structure disposed on the insulating encapsulant and the semiconductor die. The conductive structure includes a first conductor, a second conductor, and a diffusion barrier layer between the first conductor and the second conductor. The redistribution structure is electrically connected to the semiconductor die and the first conductor of the conductive structure.

公开(公告)号：US10510732B2

公开(公告)日：2019-12-17

申请号：US15854755

申请日：2017-12-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hsien-Ju Tsou ,  Chih-Wei Wu ,  Jing-Cheng Lin ,  Pu Wang ,  Szu-Wei Lu ,  Ying-Ching Shih

IPC: H01L25/10 ,  H01L25/00 ,  H01L21/48 ,  H01L23/00 ,  H01L23/538

Abstract: Provided are a PoP device and a method of manufacturing the same. The PoP device includes a first package structure and a second package structure. The first package structure includes a die, a through integrated fan-out via (TIV), an encapsulant, and a film. The TIV is aside the die. The encapsulant encapsulates sidewalls of the die and sidewalls of the TIV. The film is over the TIV and the encapsulant, and aside the die. The second package structure is connected to the first package structure through a connector. The connector penetrates through the film to electrically connected to the TIV.