公开(公告)号：US20100265216A1

公开(公告)日：2010-10-21

申请号：US12721265

申请日：2010-03-10

Applicant: Meng Shin Yen ,  William Wang ,  Chung Cheng Chou

Inventor： Meng Shin Yen ,  William Wang ,  Chung Cheng Chou

IPC: G06F3/041

CPC classification number: G06F3/0428

Abstract: An optical touch apparatus is disclosed. The optical touch apparatus comprises at least one light sensing module and a processing module. The at least one light sensing module is set at a first side of a surface of the optical touch apparatus, and used for receiving at least one light and generating a sensing result according to the condition of receiving the at least one light. The sensing result relates to whether the at least one light is blocked by at least one object above the surface and also relates to a comparing result between the at least one object and a reference region. The reference region is set at an opposite second side of the surface. The processing module determines at least one touch point position corresponding to the at least one object on the surface according to the sensing result.

Abstract translation: 公开了一种光学触摸装置。 光学触摸装置包括至少一个光感测模块和处理模块。 所述至少一个感光模块设置在所述光学触摸装置的表面的第一侧，并且用于接收至少一个光并且根据接收所述至少一个光的条件产生感测结果。 感测结果涉及至少一个光是否被表面上方的至少一个物体阻挡，并且还涉及至少一个物体与参考区域之间的比较结果。 参考区域设置在表面的相对的第二侧。 处理模块根据感测结果确定与表面上的至少一个对象相对应的至少一个触摸点位置。

公开(公告)号：US20100260002A1

公开(公告)日：2010-10-14

申请号：US12687571

申请日：2010-01-14

Applicant: Yi-Tzu Chen ,  Chia-Wei Su ,  Ming-Zhang Kuo ,  Chung-Cheng Chou

Inventor： Yi-Tzu Chen ,  Chia-Wei Su ,  Ming-Zhang Kuo ,  Chung-Cheng Chou

IPC: G11C7/02 ,  G11C8/00

CPC classification number: G11C8/12 ,  G11C11/413

Abstract: Circuits and methods for transmitting and receiving small swing differential voltage data to and from a memory are described. A plurality of memory cells is formed in arrays within a plurality of memory banks. Each memory bank is coupled to a pair of small swing differential voltage global bit lines that extend across the memory. A small signal write driver circuit is coupled to the global bit lines and configured to output a small signal differential voltage on the global bit lines during write cycles. A global sense amplifier is coupled to the global bit line pairs and configured to output a full swing voltage on a data line during a read cycle. Methods for providing small swing global bit line signals to memory cells are disclosed. The use of small swing differential voltage signals across the memory reduces power consumption and shortens memory cycle time.

Abstract translation: 描述用于向存储器发送和接收小的摆动差分电压数据的电路和方法。 多个存储单元形成为多个存储体中的阵列。 每个存储体耦合到跨越存储器延伸的一对小的摆动差分电压全局位线。 小信号写驱动器电路耦合到全局位线并且被配置为在写周期期间在全局位线上输出小信号差分电压。 全局读出放大器耦合到全局位线对并被配置为在读取周期期间在数据线上输出全摆幅电压。 公开了向存储器单元提供小的摆动全局位线信号的方法。 在存储器内使用小的摆幅差分电压信号可以降低功耗并缩短存储周期时间。

公开(公告)号：US20100129963A1

公开(公告)日：2010-05-27

申请号：US12694239

申请日：2010-01-26

Applicant: Chin-Yung Chen ,  Chia-Hung Hsu ,  William Wang ,  Chung-Cheng Chou

Inventor： Chin-Yung Chen ,  Chia-Hung Hsu ,  William Wang ,  Chung-Cheng Chou

IPC: H01L21/60

CPC classification number: H01L23/3735 ,  H01L23/3677 ,  H01L24/48 ,  H01L2224/16 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: The invention discloses an integrated circuit package. The integrated circuit package comprises a substrate having a first surface and a second surface opposite thereto and a first hole passing through the substrate from the first surface to the second surface. A plurality of conductive lines is disposed on a portion of the second surface of the substrate. A semiconductor chip is disposed above the second surface of the substrate, wherein a chamber is formed between the semiconductor chip and the substrate. A plurality of bonding pads are disposed on a side of the semiconductor chip which is toward the second surface of the substrate, wherein at least one of the bonding pads are electrically connected to one of the plurality of conductive lines. A first heat dissipation layer is disposed in the first hole, and extends into the chamber. A method for fabricating the integrated circuit package is also provided.

Abstract translation: 本发明公开了一种集成电路封装。 集成电路封装包括具有第一表面和与其相对的第二表面的基板以及从第一表面到第二表面穿过基板的第一孔。 多个导电线设置在基板的第二表面的一部分上。 半导体芯片设置在衬底的第二表面上方，其中在半导体芯片和衬底之间形成腔室。 多个接合焊盘设置在半导体芯片的朝向衬底的第二表面的一侧上，其中至少一个接合焊盘电连接到多条导线之一。 第一散热层设置在第一孔中并延伸到腔室中。 还提供了一种用于制造集成电路封装的方法。

公开(公告)号：US07663953B2

公开(公告)日：2010-02-16

申请号：US11684811

申请日：2007-03-12

Applicant: Hank Cheng ,  Chen-Hui Hsieh ,  Chung-Cheng Chou

Inventor： Hank Cheng ,  Chen-Hui Hsieh ,  Chung-Cheng Chou

IPC: G11C7/00

CPC classification number: G11C11/4091 ,  G11C11/4094

Abstract: A method and apparatus are provided for sensing in low voltage DRAM memory cells. A method according to one embodiment includes: providing a DRAM circuit having a memory cell, a sense amplifier including a pre-charge circuit connected to a first voltage source and a back-to-back inverter including a first and second NMOS transistor, each having a source and a first and second PMOS transistor, each having a source. The method further includes the steps of maintaining the voltage of the sources of the first and second NMOS transistors at a first voltage during normal operation and lowering the voltage of the sources of the first and second NMOS transistors from the first voltage to a second voltage during a read operation.

Abstract translation: 提供了一种用于在低电压DRAM存储单元中进行感测的方法和装置。 根据一个实施例的方法包括：提供具有存储单元的DRAM电路，包括连接到第一电压源的预充电电路和包括第一和第二NMOS晶体管的背对背反相器的读出放大器，每个具有第一和第二NMOS晶体管， 源极和第一和第二PMOS晶体管，每个具有源极。 该方法还包括以下步骤：在正常操作期间将第一和第二NMOS晶体管的源极的电压保持在第一电压，并且将第一和第二NMOS晶体管的源极的电压从第一电压降低到第二电压 一个读操作。

公开(公告)号：US07663908B2

公开(公告)日：2010-02-16

申请号：US11684803

申请日：2007-03-12

Applicant: Hank Cheng ,  Chen-Hui Hsieh ,  Chung-Cheng Chou

Inventor： Hank Cheng ,  Chen-Hui Hsieh ,  Chung-Cheng Chou

IPC: G11C11/24

CPC classification number: G11C11/406 ,  G11C11/4091 ,  G11C11/4094 ,  G11C2211/4065

Abstract: The disclosure generally relates to a method and apparatus for decreasing the frequency of refreshing a memory cell in communication with a word line and a bit line. A method according to one embodiment includes: providing a DRAM circuit having a memory cell, a sense amplifier including a pre-charge circuit connected to a first voltage source and a back-to-back inverter including a first NMOS transistor having a source, a second NMOS transistor having a source, a first PMOS transistor having a source and a second PMOS transistor having a source; maintaining the voltage of the sources of the first and second PMOS transistors at a first voltage during normal operation; and raising the voltage of the sources of the first and second PMOS transistors from the first voltage to a second voltage during a refresh operation.

Abstract translation: 本公开一般涉及用于降低与字线和位线通信的刷新存储器单元的频率的方法和装置。 根据一个实施例的方法包括：提供具有存储单元的DRAM电路，包括连接到第一电压源的预充电电路的读出放大器和包括具有源极的第一NMOS晶体管的背对背反相器， 具有源极的第二NMOS晶体管，具有源极的第一PMOS晶体管和具有源极的第二PMOS晶体管; 在正常操作期间将第一和第二PMOS晶体管的源极的电压保持在第一电压; 以及在刷新操作期间将第一和第二PMOS晶体管的源极的电压从第一电压提高到第二电压。

公开(公告)号：US20090097119A1

公开(公告)日：2009-04-16

申请号：US12143943

申请日：2008-06-23

Applicant: Chen Peng ,  William Wang ,  Chung-Cheng Chou ,  Fung-Hsu Wu ,  Long Hsu ,  Cheng-Hsien Liu ,  Sheng-Yang Tseng

Inventor： Chen Peng ,  William Wang ,  Chung-Cheng Chou ,  Fung-Hsu Wu ,  Long Hsu ,  Cheng-Hsien Liu ,  Sheng-Yang Tseng

IPC: G02B27/42

CPC classification number: G02B21/32 ,  G02B27/42 ,  G02B27/4233

Abstract: A diffraction micro flow structure and optical tweezers using the same are provided. The diffraction micro flow structure comprises a substrate and a diffraction part. The substrate comprises at least a flow path. The diffraction part is disposed on the substrate. The diffraction part comprises a diffraction optical element. After light passes through the diffraction optical element, the light is focused in the flow path and forms an optical field.

Abstract translation: 提供衍射微流结构和使用其的光学镊子。 衍射微流结构包括基底和衍射部分。 衬底包括至少一个流动路径。 衍射部分设置在基板上。 衍射部分包括衍射光学元件。 光通过衍射光学元件后，光在流路中聚焦并形成光场。

公开(公告)号：US07513042B2

公开(公告)日：2009-04-07

申请号：US11372964

申请日：2006-03-09

Applicant: Hung-Sheng Hu ,  Wei-Lin Chen ,  In-Yao Lee ,  Tsung-Ping Hsu ,  Chung-Cheng Chou ,  ShangShi Wu

Inventor： Hung-Sheng Hu ,  Wei-Lin Chen ,  In-Yao Lee ,  Tsung-Ping Hsu ,  Chung-Cheng Chou ,  ShangShi Wu

IPC: B21D53/76 ,  B41J2/04

CPC classification number: B41J2/14137 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49401

Abstract: A fluid injector and method of manufacturing the same. The fluid injector comprises a base, a first through hole, a bubble generator, a passivation layer, and a metal layer. The base includes a chamber and a surface. The first through hole communicates with the chamber, and is disposed in the base. The bubble generator is disposed on the surface near the first through hole, and is located outside the chamber. The passivation layer is disposed on the surface. The metal layer defines a second through hole, and is disposed on the passivation layer outside the chamber. The second through hole communicates with the first through hole.

Abstract translation: 一种流体注射器及其制造方法。 流体注射器包括底座，第一通孔，气泡发生器，钝化层和金属层。 底座包括一个腔室和一个表面。 第一通孔与腔室连通，并设置在基座中。 气泡发生器设置在靠近第一通孔的表面上，并且位于室外。 钝化层设置在表面上。 金属层限定第二通孔，并且设置在室外的钝化层上。 第二通孔与第一通孔连通。

公开(公告)号：US20090040620A1

公开(公告)日：2009-02-12

申请号：US12035487

申请日：2008-02-22

Applicant: Chen Peng ,  Fung-Hsu Wu ,  Chung-Cheng Chou ,  Wai Wang ,  Long Hsu ,  Cheng-Hsien Liu

Inventor： Chen Peng ,  Fung-Hsu Wu ,  Chung-Cheng Chou ,  Wai Wang ,  Long Hsu ,  Cheng-Hsien Liu

IPC: G02B27/14 ,  B29C65/48 ,  B29D11/00 ,  C23C14/34 ,  C23C16/44 ,  B05D3/12

CPC classification number: G02B21/32 ,  B29C65/48 ,  B29C65/4825 ,  B29C65/4855 ,  B29C65/52 ,  B29C65/521 ,  B29C66/45 ,  B29C66/54 ,  B29K2025/00 ,  B29K2033/12 ,  B29K2067/00 ,  B29K2069/00 ,  B29K2105/0008 ,  B29K2305/02 ,  B29K2305/10 ,  B29K2305/14 ,  B29K2995/0026 ,  B29K2995/003 ,  B29L2009/00 ,  B29L2009/003 ,  B29L2031/756 ,  B29L2031/7728 ,  C23C14/046 ,  C23C14/086 ,  C23C14/205 ,  C23C14/5886 ,  G02B5/0808 ,  Y10T156/10

Abstract: A disk structure is disposed in an optical tweezers device including a light source for producing incident laser light. The disk structure includes a first substrate, a second substrate and a reflective layer. The second substrate is disposed with respect to the first substrate. One of the first substrate and the second substrate has at least one flow path. The reflective layer, which is adhered to the second substrate, is disposed between the first substrate and the second substrate. After the incident laser light passes through the first substrate and then reaches the reflective layer, the incident laser light is reflected back as reflective laser light by the reflective layer to form reflective laser light. A tweezers light field is formed in the flow path by both the reflective laser light and the incident laser light.

Abstract translation: 盘结构设置在包括用于产生入射激光的光源的光学镊子装置中。 盘结构包括第一衬底，第二衬底和反射层。 第二基板相对于第一基板设置。 第一衬底和第二衬底中的一个具有至少一个流动路径。 附着在第二基板上的反射层设置在第一基板和第二基板之间。 在入射激光通过第一衬底然后到达反射层之后，入射的激光被反射层反射回作为反射激光，形成反射激光。 通过反射激光和入射激光两者在流路中形成镊子光场。

公开(公告)号：US20080225616A1

公开(公告)日：2008-09-18

申请号：US11684803

申请日：2007-03-12

Applicant: Hank Cheng ,  Chen-Hui Hsieh ,  Chung-Cheng Chou

Inventor： Hank Cheng ,  Chen-Hui Hsieh ,  Chung-Cheng Chou

IPC: G11C7/00

CPC classification number: G11C11/406 ,  G11C11/4091 ,  G11C11/4094 ,  G11C2211/4065

Abstract: The disclosure generally relates to a method and apparatus for decreasing the frequency of refreshing a memory cell in communication with a word line and a bit line. A method according to one embodiment includes: providing a DRAM circuit having a memory cell, a sense amplifier including a pre-charge circuit connected to a first voltage source and a back-to-back inverter including a first NMOS transistor having a source, a second NMOS transistor having a source, a first PMOS transistor having a source and a second PMOS transistor having a source; maintaining the voltage of the sources of the first and second PMOS transistors at a first voltage during normal operation; and raising the voltage of the sources of the first and second PMOS transistors from the first voltage to a second voltage during a refresh operation.

Abstract translation: 本公开一般涉及用于降低与字线和位线通信的刷新存储器单元的频率的方法和装置。 根据一个实施例的方法包括：提供具有存储单元的DRAM电路，包括连接到第一电压源的预充电电路的读出放大器和包括具有源极的第一NMOS晶体管的背对背反相器， 具有源极的第二NMOS晶体管，具有源极的第一PMOS晶体管和具有源极的第二PMOS晶体管; 在正常操作期间将第一和第二PMOS晶体管的源极的电压保持在第一电压; 以及在刷新操作期间将第一和第二PMOS晶体管的源极的电压从第一电压提高到第二电压。

公开(公告)号：US20080186801A1

公开(公告)日：2008-08-07

申请号：US12014813

申请日：2008-01-16

Applicant: Cheng-Hsien Liu ,  Long Hsu ,  Chih-Ming Cheng ,  Sheng-Hung Chiu ,  Wai William Wang ,  Chung-Cheng Chou

Inventor： Cheng-Hsien Liu ,  Long Hsu ,  Chih-Ming Cheng ,  Sheng-Hung Chiu ,  Wai William Wang ,  Chung-Cheng Chou

IPC: B01F13/00 ,  B01F3/08 ,  B01F15/02 ,  F04B17/00

CPC classification number: B01F13/0059 ,  B01F5/10 ,  B01F11/0071 ,  F04B17/00 ,  F04B19/006 ,  F04B19/24

Abstract: A bubble micro-pump includes a first component, a second component and a bubble-generating unit. The first component includes a flow path having a first area and a second area. The second component above the first component has a first roughness surface and a second roughness surface. The first roughness surface opposite the first area has a first roughness factor, and the second roughness surface opposite the second area has a second roughness factor smaller than the first roughness factor. The bubble-generating unit on the first component generates bubble in the first area and the second area when a fluid fills the vacancy between the first component and the second component. Due to the difference in roughness factor, the backfilling velocity of the fluid in the first area is faster than that in the second area when the bubble starts to vanish, such that the fluid is driven to flow.

Abstract translation: 气泡微型泵包括第一部件，第二部件和气泡发生单元。 第一部件包括具有第一区域和第二区域的流动路径。 第一部件上方的第二部件具有第一粗糙度表面和第二粗糙度表面。 与第一区域相对的第一粗糙表面具有第一粗糙度因子，并且与第二区域相对的第二粗糙度表面具有小于第一粗糙度因子的第二粗糙度因子。 当第一部件和第二部件之间的空隙充满时，第一部件上的气泡发生单元在第一区域和第二区域中产生气泡。 由于粗糙度因子的差异，当气泡开始消失时，第一区域中的流体的回填速度比第二区域的回填速度快，使得流体被驱动流动。