Abstract:
An image sensor package includes a first substrate, an image sensor chip, a processing chip and a plurality of passive elements. The first substrate has a supporting surface and a bottom surface opposite to the supporting surface. The image sensor chip is disposed on the supporting surface and electrically connected to the first substrate. The image sensor chip package further includes a second substrate. The processing chip and the passive elements are mounted on the second substrate and electrically connected to the second substrate. The bottom surface of the first substrate defines a cavity for receiving the second substrate, the processing chip and the passive elements therein.
Abstract:
An image sensor package includes an image sensor chip, a sidewall, an encapsulation glass, conductive material, and a plurality of solder balls. The image sensor chip comprises a photosensitive area, a non-photosensitive area surrounding the photosensitive area, and a plurality of bonding pads formed on the non-photosensitive area. The sidewall is located on the non-photosensitive are and defines a plurality of first through holes aligned with and corresponding to the bonding pads. The encapsulation glass is located on the sidewall. A plurality of solder balls are formed on the encapsulation glass aligned with the bonding pads, respectively. The encapsulation glass defines a plurality of second through holes each corresponding to a bonding pad and a corresponding solder ball. The image sensor package further comprises a conductive material through which the first and second through holes penetrate.
Abstract:
Dialysis treatment devices and methods for removing urea from dialysis waste streams are provided. In a general embodiment, the present disclosure provides a dialysis treatment device including a first cell having a first electrodialysis unit, a second cell having at least one of a urease compartment and a sorbent compartment and in fluid communication with the first cell, and a third cell having a second electrodialysis unit and in fluid communication with the second cell.
Abstract:
Enhanced dynamic range requires more than 8 bit representation for single color components of pixels. For this purpose, normal color resolution images and high color resolution images are available. Backward compatibility can be achieved by a layered approach using a color enhancement layer, and a conventional image as color base layer. Both have same spatial and temporal resolution. Encoding of the color enhancement layer uses prediction and residual. A methods for optimized color enhancement prediction is disclosed. Color bit depth prediction is done by constructing a polynomial that approximates for all pixels of one color component of a block the color enhancement layer from the color base layer. A predicted version of the high color resolution image and a residual are generated and updated by a residual. The coefficients are compressed and added as metadata to the data stream.
Abstract:
A backlight module includes a frame, a reflective sheet, a light guide plate, a light source, and an optical film set. The frame defines an accommodation space, and the reflective sheet is disposed in the accommodation space. The light guide plate is disposed in the accommodation space and on one surface of the reflective sheet. The optical film set is disposed one side of the light guide plate opposite the reflective sheet. The reflective sheet is hollowed out at a position overlapping the light source to form at least one opening so as to reduce light halos.
Abstract:
A method for peritoneal dialysis treatment includes (i) predicting results of a plurality of patient therapy outcomes for a plurality of different mixed dextrose level dialysis solutions; (ii) selecting one of the mixed dextrose level solutions for a patient based on the results; and (iii) performing at least one therapy using different unmixed dextrose level solutions that combine to simulate a like cumulative concentration that would be achieved using the selected mixed dextrose level solution.
Abstract:
A method for fabricating the memory structure includes: providing a substrate having a pad, forming an opening in the pad, forming a first spacer on a sidewall of the opening, filling the opening with a sacrificial layer, removing the first spacer and exposing a portion of the substrate, removing the exposed substrate to define a first trench and a second trench, removing the sacrificial layer to expose a surface of the substrate to function as a channel region, forming a first dielectric layer on a surface of the first trench, a surface of the second trench and a surface of the channel region, filling the first trench and the second trench with a first conductive layer, forming a second dielectric layer on a surface of the first conductive layer and the surface of the channel region, filling the opening with a second conductive layer, and removing the pad.
Abstract:
An exemplary image sensor package includes a substrate, an imaging area, a circuit layer and two passive components. The substrate has a first surface and a second surface, which are opposite to each other. An image sensing area is formed on the first surface of the substrate and a circuit layer is formed on the second surface of the substrate. The passive components opposite to the image sensing area are soldered to the circuit layer of the second surface.
Abstract:
A chip package (200) includes a carrier (20), a chip (22), a second conductive means (26) and a transparent cover (28). The carrier (20) includes a base (24). The chip is mounted on the base and has an active area (222). The second conductive means electronically connects the chip with the conductive means. The first adhesive means is applied around the active area of the chip. The transparent cover is mounted to the base of the carrier. The cover is adhered with the first adhesive means so as to define a sealing space (32) for sealing the active area of the chip therein. It can be seen that the active area of the chip is sufficiently protected from pollution by the small volume of the sealing space.
Abstract:
A peritoneal dialysis flow control device in one embodiment includes: (i) a first cap including a first medical fluid line connection and a second medical fluid line connection; (ii) a gasket mated with the first cap where the gasket defines a first aperture in fluid communication with a first port and a second aperture in fluid communication with a second port; and (iii) a second cap including a third medical fluid line connection where the second cap is sealed rotatably to the gasket.