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公开(公告)号:US10510547B2
公开(公告)日:2019-12-17
申请号:US16120800
申请日:2018-09-04
Applicant: Applied Materials, Inc.
Inventor: Susmit Singha Roy , Yingli Rao , Srinivas Gandikota
IPC: H01L21/285 , H01L21/321 , C23C16/34 , C23C16/06 , H01L27/115
Abstract: Embodiments described herein relate to methods and materials for fabricating semiconductor device structures. In one example, a metal film stack includes a plurality of metal containing films and a plurality of metal derived films arranged in an alternating manner. In another example, a metal film stack includes a plurality of metal containing films which are modified into metal derived films. In certain embodiments, the metal film stacks are used in oxide/metal/oxide/metal (OMOM) structures for memory devices.
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公开(公告)号:US10319624B2
公开(公告)日:2019-06-11
申请号:US15621120
申请日:2017-06-13
Applicant: Applied Materials, Inc.
Inventor: Susmit Singha Roy , Yihong Chen , Kelvin Chan , Abhijit Basu Mallick , Srinivas Gandikota , Pramit Manna
IPC: H01L21/762 , H01L21/28 , H01L21/32 , H01L21/8234 , H01L29/43
Abstract: Methods comprising forming a film on at least one feature of a substrate surface are described. The film is expanded to fill the at least one feature and cause growth of the film from the at least one feature. Methods of forming self-aligned vias are also described.
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公开(公告)号:US10312137B2
公开(公告)日:2019-06-04
申请号:US15175880
申请日:2016-06-07
Applicant: Applied Materials, Inc.
IPC: H01L21/033 , H01L21/768 , H01L23/522 , H01L23/528 , H01L27/1157 , H01L27/11524 , H01L27/11556 , H01L27/11582
Abstract: Embodiments of the present disclosure provide an apparatus and methods for forming a hardmask layer that may be utilized to transfer patterns or features to a film stack with accurate profiles and dimension control for manufacturing three dimensional (3D) stacked semiconductor devices. In one embodiment, a method of forming a hardmask layer on a substrate includes forming a seed layer comprising boron on a film stack disposed on a substrate by supplying a seed layer gas mixture in a processing chamber, forming a transition layer comprising born and tungsten on the seed layer by supplying a transition layer gas mixture in the processing chamber, and forming a bulk hardmask layer on the transition layer by supplying a main deposition gas mixture in the processing chamber.
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公开(公告)号:US20180358260A1
公开(公告)日:2018-12-13
申请号:US16003827
申请日:2018-06-08
Applicant: Applied Materials, Inc.
Inventor: Susmit Singha Roy , Ziqing Duan , Abhijit Basu Mallick , Praburam Gopalraja
IPC: H01L21/768 , H01L21/311 , H01J37/32
CPC classification number: H01L21/7682 , H01J37/32357 , H01J37/32715 , H01L21/31122 , H01L21/76801 , H01L21/76807 , H01L21/76834 , H01L21/76843 , H01L21/76849 , H01L21/76871 , H01L21/76879 , H01L21/76883 , H01L21/76888 , H01L21/76897 , H01L23/53266
Abstract: A first metallization layer comprises a set of first conductive lines that extend along a first direction on a first dielectric layer on a substrate. Pillars are formed on recessed first dielectric layers and a second dielectric layer covers the pillars. A dual damascene etch provides a contact hole through the second dielectric layer and an etch removes the pillars to form air gaps.
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