公开(公告)号：US07696856B2

公开(公告)日：2010-04-13

申请号：US11709677

申请日：2007-02-23

Applicant: Yo Saito ,  Hitoshi Tanaka ,  Makoto Numata ,  Hiroyuki Sato ,  Goro Takeuchi

Inventor： Yo Saito ,  Hitoshi Tanaka ,  Makoto Numata ,  Hiroyuki Sato ,  Goro Takeuchi

IPC: H01C7/10

CPC classification number: H01C7/102 ,  H01C1/084 ,  H01C7/12

Abstract: A laminated chip varistor comprises a varistor body, first and second inner electrodes, a heat conductor, and first and second outer electrodes. The varistor body has first and second outer faces. The first and second inner electrodes are disposed in the varistor body so that at least portions thereof are opposing to each other. The first and second outer electrodes are formed on the first outer face, the first outer electrode being connected to the first inner electrode, and the second outer electrode being connected to the second inner electrode. The heat conductor is formed in the varistor body extending in a direction from the first outer face toward the second outer face with one end face thereof exposed on the first outer face and the other end face thereof exposed on the second outer face.

Abstract translation: 层压芯片变阻器包括变阻器体，第一和第二内部电极，热导体以及第一和第二外部电极。 压敏电阻体具有第一和第二外表面。 第一和第二内部电极设置在可变压敏电阻体中，使得其至少一部分彼此相对。 第一外电极和第二外电极形成在第一外表面上，第一外电极连接到第一内电极，第二外电极连接到第二内电极。 导热体形成在从第一外面朝向第二外面方向延伸的可变电阻体内，其一端面在第一外面露出，另一端面露出在第二外面。

公开(公告)号：US07688177B2

公开(公告)日：2010-03-30

申请号：US11702516

申请日：2007-02-06

Applicant: Yo Saito ,  Hiroyuki Sato ,  Hitoshi Tanaka ,  Makoto Numata

Inventor： Yo Saito ,  Hiroyuki Sato ,  Hitoshi Tanaka ,  Makoto Numata

IPC: H01C7/10

CPC classification number: H01C7/18 ,  H01C1/084 ,  H01L25/167 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A varistor comprises a varistor element body, first and second inner electrodes opposing each other, a first outer electrode connected to the first inner electrode physically and electrically, a second outer electrode connected to the second inner electrode physically and electrically, and an electrically insulating layer. The first and second inner electrodes are arranged within the varistor element body so as to have end portions exposed at two outer surfaces of the varistor element body. The first outer electrode is arranged on one of the two outer surfaces so as to cover a portion of the end portion of the first inner electrode exposed at the one outer surface. The second outer electrode is arranged on the one outer surface so as to cover a portion of the end portion of the second inner electrode exposed at the one outer surface. The electrically insulating layer is arranged on the one outer surface so as to cover a portion exposed from the first outer electrode in the end portion of the first inner electrode and a portion exposed from the second outer electrode in the end portion of the second inner electrode.

Abstract translation: 变阻器包括变阻器元件体，彼此相对的第一和第二内部电极，物理和电连接到第一内部电极的第一外部电极，物理和电连接到第二内部电极的第二外部电极，以及电绝缘层 。 第一和第二内部电极被布置在可变电阻元件主体内，使得端部暴露在可变电阻元件主体的两个外表面处。 第一外部电极布置在两个外表面中的一个上，以覆盖在一个外表面处暴露的第一内部电极的端部的一部分。 第二外部电极布置在一个外表面上，以覆盖在一个外表面处暴露的第二内部电极的端部的一部分。 电绝缘层布置在一个外表面上，以覆盖从第一内电极的端部中的第一外电极暴露的部分和从第二内电极的端部中的第二外电极露出的部分 。

公开(公告)号：US07683753B2

公开(公告)日：2010-03-23

申请号：US12076922

申请日：2008-03-25

Applicant: Naoyoshi Yoshida ,  Hitoshi Tanaka ,  Dai Matsuoka

Inventor： Naoyoshi Yoshida ,  Hitoshi Tanaka ,  Dai Matsuoka

IPC: H01C7/10

CPC classification number: H01C7/1006 ,  H01C7/112 ,  H01C7/18

Abstract: As for the voltage non-linear resistance element layer 2, sintered body (ceramics) having ZnO as main component is used. Said sintered body comprises Pr, Co, Ca and Na are added. Therefore, the ranges are 0.05 to 5.0 atm % of Pr, 0.1 to 20 atm % of Co, 0.01 to 5.0 atm % of Ca and 0.0001 to 0.0008 atm % of Na. When it is within the range, the capacitance changing rate at 85° C. with standard being 25° C. can be made to equal or less than 10%.

Abstract translation: 对于电压非线性电阻元件层2，使用以ZnO为主要成分的烧结体（陶瓷）。 所述烧结体包括Pr，Co，Ca和Na。 因此，Pr为0.05〜5.0atm％，Co为0.1〜20atm％，Ca为0.01〜5.0atm％，Na为0.0001〜0.0008atm。 当在该范围内时，可以将标准为25℃的85℃下的电容变化率设为等于或小于10％。

公开(公告)号：US07645981B2

公开(公告)日：2010-01-12

申请号：US11555350

申请日：2006-11-01

Applicant: Hitoshi Tanaka ,  Kunihiko Shimizu ,  Makio Oishi

Inventor： Hitoshi Tanaka ,  Kunihiko Shimizu ,  Makio Oishi

IPC: H04N5/225 ,  H01L31/0203

CPC classification number: H01L27/14618 ,  H01L2924/0002 ,  H04N5/2254 ,  H05K1/189 ,  H05K3/0058 ,  H05K2201/2009 ,  H05K2203/063 ,  H01L2924/00

Abstract: An image pickup device mounting structure includes an image pickup device, a reinforcing plate, and a flexible circuit board having at least one electrical component mounted thereon, wherein the reinforcing plate; the image pickup device and a part of the flexible circuit board are superimposed on each other, the reinforcing plate includes at least one cutout portion; and the electrical component is positioned on the part of the flexible circuit board and within the cutout portion.

Abstract translation: 图像拾取装置安装结构包括：图像拾取装置，加强板和安装有至少一个电气部件的柔性电路板，其中所述加强板; 图像拾取装置和柔性电路板的一部分彼此重叠，加强板包括至少一个切口部分; 并且电气部件位于柔性电路板的部分上并且位于切口部分内。

公开(公告)号：US20080238536A1

公开(公告)日：2008-10-02

申请号：US12052422

申请日：2008-03-20

Applicant: Koichiro HAYASHI ,  Hitoshi Tanaka

Inventor： Koichiro HAYASHI ,  Hitoshi Tanaka

IPC: G05F1/10

CPC classification number: G05F3/02 ,  G05F1/62 ,  G11C5/145 ,  G11C11/4074 ,  H02M3/07

Abstract: A supply voltage generating circuit that enables a reduction in chip area includes: a booster for outputting a boosted voltage upon generating the boosted voltage by charge pumping of a capacitor element; a power-supply step-down unit for stepping down voltage of an external power supply to a voltage within a breakdown-voltage range of the capacitor element, and applying the stepped-down voltage to the power supply of the booster; and a switch element for switching between application of the external power supply to the power supply of the booster directly or via the power-supply step-down unit. The booster comprises multiple stages of booster circuits. The thicknesses of gate oxide films of capacitor elements constituted by MOS transistors included in respective ones of the booster circuits are the same and are made smaller than the thickness of a gate oxide film of a MOS transistor included in a load circuit having the output of the booster at its power supply.

Abstract translation: 能够减小芯片面积的电源电压产生电路包括：用于通过电容器元件的电荷泵浦产生升压电压而输出升压电压的升压器; 电源降压单元，用于将外部电源的电压降低到电容器元件的击穿电压范围内的电压，并将降压电压施加到升压器的电源; 以及用于在直接或经由电源降压单元向外部电源施加到增压器的电源之间切换的开关元件。 升压器包括多级升压电路。 包括在各个升压电路中的MOS晶体管构成的电容器元件的栅极氧化膜的厚度相同，并且小于包括在具有输出的负载电路的负载电路中的MOS晶体管的栅极氧化膜的厚度 增压器在其电源。

公开(公告)号：US20080142374A1

公开(公告)日：2008-06-19

申请号：US11573746

申请日：2005-08-12

Applicant: Hisashi Iwama ,  Hiroaki Tanaka ,  Harunobu Kimura ,  Hitoshi Tanaka ,  Yutaka Hirota

Inventor： Hisashi Iwama ,  Hiroaki Tanaka ,  Harunobu Kimura ,  Hitoshi Tanaka ,  Yutaka Hirota

IPC: C25C1/12

CPC classification number: C25C7/007 ,  C25C7/02 ,  C25C7/08

Abstract: An apparatus for recovering a metal, which comprises a metal-recovering board (2) having an electrodeposition surface (2a, 2t) for the attachment of a metal component (R) precipitated from a solution and an insulating material (2b) formed around a pattern of the electrodeposition surface (2a, 2t). The metal-recovering board (2) is immersed in a metal-containing solution in an electrolytic treatment vessel (1), and thereby the metal in the solution is selectively precipitated on the electrodeposition surface (2a, 2t) and is converted to a bulk. The resultant metal bulk is scraped together for recovery with a blade (6) in a form as it is. The above apparatus for recovering a metal can be suitably used for recovering a metal in a solution in a state allowing easy reuse with good efficiency.

Abstract translation: 一种用于回收金属的装置，包括具有用于连接从溶液沉淀的金属组分（R）和绝缘材料（2b）的电沉积表面（2 a，2 t）的金属回收板（2） 形成在电沉积表面（2a，2t）的图案周围。 将金属回收板（2）浸渍在电解处理容器（1）中的含金属溶液中，从而将溶液中的金属选择性沉淀在电沉积面（2a，2t）上，并转化为 一大堆。 将所得到的金属体刮擦在一起，以原样形式用刀片（6）进行回收。 上述用于回收金属的装置可以适合用于在容易再利用的状态下以良好的效率回收溶液中的金属。

公开(公告)号：US07312172B2

公开(公告)日：2007-12-25

申请号：US10540395

申请日：2003-12-17

Applicant: Hiroshi Sasaki ,  Hitoshi Tanaka ,  Yasuo Niwa ,  Matsumi Watanabe ,  Tomoaki Nonaka

Inventor： Hiroshi Sasaki ,  Hitoshi Tanaka ,  Yasuo Niwa ,  Matsumi Watanabe ,  Tomoaki Nonaka

IPC: C04B35/465

CPC classification number: H01G4/10 ,  B32B18/00 ,  B32B2311/22 ,  C04B35/49 ,  C04B35/6262 ,  C04B35/6263 ,  C04B35/6264 ,  C04B35/63 ,  C04B35/638 ,  C04B35/64 ,  C04B2235/3206 ,  C04B2235/3208 ,  C04B2235/3213 ,  C04B2235/3217 ,  C04B2235/3224 ,  C04B2235/3225 ,  C04B2235/3227 ,  C04B2235/3229 ,  C04B2235/3239 ,  C04B2235/3251 ,  C04B2235/3256 ,  C04B2235/3258 ,  C04B2235/3262 ,  C04B2235/36 ,  C04B2235/6582 ,  C04B2235/6584 ,  C04B2235/663 ,  C04B2235/785 ,  C04B2235/786 ,  C04B2235/79 ,  C04B2235/96 ,  C04B2237/346 ,  C04B2237/348 ,  C04B2237/405 ,  C04B2237/704 ,  H01B3/12 ,  H01G4/1245 ,  Y10T428/24926

Abstract: A dielectric ceramic composition, comprising a main component including at least a dielectric oxide having a composition expressed by [(CaxSr1-x)O]m[(TiyZr1-y-zHfz)O2], a first subcomponent including a Mn oxide and/or an Al oxide and a glass component, wherein “m”, “x”, “y” and “z” indicating composition mole ratios in the formula included in the main component are in relationships of 0.90≦m≦1.04, preferably 1.005≦m≦1.025, 0.5≦x

Abstract translation: 一种电介质陶瓷组合物，其包含主要成分，该主要成分至少包括具有由[（Ca x Sr 1-x O）O] m表示的组成的介电氧化物， [（Ti y y z 1 1 y z H z z）O 2]，第一次要组分包括 Mn氧化物和/或Al氧化物和玻璃成分，其中表示主成分中所含的式中的组成摩尔比的“m”，“x”，“y”，“z”为0.90 <= m <= 1.04，优选1.005 <= m <= 1.025,0.5 <= x <1，优选0.6 <= x <= 0.9,0.01 <= y <= 0.10，优选0.02 <= y <0.07和0 < = 0.20，优选0

公开(公告)号：US20070223169A1

公开(公告)日：2007-09-27

申请号：US11717041

申请日：2007-03-13

Applicant: Yo Saito ,  Hiroyuki Sato ,  Hitoshi Tanaka ,  Makoto Numata ,  Goro Takeuchi

Inventor： Yo Saito ,  Hiroyuki Sato ,  Hitoshi Tanaka ,  Makoto Numata ,  Goro Takeuchi

IPC: H02H9/06

CPC classification number: H01C7/102 ,  H01C1/142 ,  H01C7/1006 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225

Abstract: A varistor comprises a varistor portion, a metal portion, and buffer portion. The varistor portion has a varistor element body exhibiting a nonlinear current-voltage characteristic and two electrode portions. The metal portion has a thermal conductivity higher than that of the varistor element body. The buffer portion is disposed between the varistor portion and metal portion so as to be bonded to each of the varistor portion and metal portion and mainly composed of glass. The two electrode portions are arranged in the varistor element body so as to be electrically insulated from each other while exposing at least a portion of each thereof from an outer surface of the varistor element body. The metal portion and varistor portion are joined firmly to each other. The heat transmitted to the varistor can efficiently be diffused from the metal portion.

Abstract translation: 变阻器包括变阻器部分，金属部分和缓冲部分。 变阻器部分具有非线性电流 - 电压特性的变阻器元件体和两个电极部分。 金属部分的导热系数高于可变电阻元件主体的导热率。 缓冲部分设置在可变压敏电阻部分和金属部分之间，以便结合到每个变阻器部分和金属部分上并且主要由玻璃组成。 两个电极部分布置在可变电阻元件主体中，使得它们彼此电绝缘，同时使其中的至少一部分从可变电阻元件主体的外表面露出。 金属部分和变阻器部分彼此牢固连接。 传递到变阻器的热量可以有效地从金属部分扩散。

公开(公告)号：US20070181829A1

公开(公告)日：2007-08-09

申请号：US11650234

申请日：2007-01-05

Applicant: Hitoshi Tanaka ,  Akio Yamada ,  Hiroshi Yasuda ,  Yoshihisa Ooae

Inventor： Hitoshi Tanaka ,  Akio Yamada ,  Hiroshi Yasuda ,  Yoshihisa Ooae

IPC: A61N5/00

CPC classification number: H01J37/3174 ,  B82Y10/00 ,  B82Y40/00 ,  H01J2237/045 ,  H01J2237/31761 ,  H01J2237/31776 ,  H01J2237/31788

Abstract: An electron-beam exposure system includes: an electron gun; a first mask having a first opening for shaping a beam of electrons; a second mask having a second opening for shaping the beam of electrons; a stencil mask disposed below the first mask and the second mask, the stencil mask having a plurality of collective figured openings each for shaping the beam of electrons; a paralleling lens for causing the beam of electrons, which has been transmitted in, and come out of, the stencil mask, to turn into a beam of electrons which travels approximately in parallel to the optical axis; and a swing-back mask deflector for swinging back the beam of electrons which has passed through the stencil mask. N2>N1 may be satisfied where 1/N1 denotes the reduction ratio of a pattern in the stencil mask to a pattern on the surface of the workpiece, and 1/N2 denotes the reduction ratio of a pattern in the first mask and a pattern in the second mask to a pattern on the surface of the workpiece.

Abstract translation: 电子束曝光系统包括：电子枪; 具有用于成形电子束的第一开口的第一掩模; 具有用于使电子束成形的第二开口的第二掩模; 设置在所述第一掩模和所述第二掩模下方的模板掩模，所述模版掩模具有多个用于使所述电子束成形的集合形状的开口; 用于使已经被传送到模板掩模中并从模板掩模出来的电子束的平行透镜转变成大致平行于光轴行进的电子束; 以及用于摆动穿过模板掩模的电子束的回摆掩模偏转器。 可以满足其中1 / N 1表示模板掩模中的图案与图案上的图案的缩小比率的N <2> N <1> 表示工件的表面，1 / N 2 <2>表示第一掩模中的图案和第二掩模中的图案与工件表面上的图案的缩小率。

公开(公告)号：US07093944B2

公开(公告)日：2006-08-22

申请号：US10675993

申请日：2003-10-02

Applicant: Hitoshi Tanaka

Inventor： Hitoshi Tanaka

IPC: G02B23/16

CPC classification number: G02B7/10 ,  G02B7/20 ,  G02B7/22

Abstract: A light shielding structure of a lens barrel including an inner ring and an outer ring, wherein the inner ring includes a through cutout portion, the light shielding structure including an inner flange wall provided with the inner ring; a first annular groove formed on an inner surface of the inner flange wall; a second annular groove formed on an inner peripheral surface of the outer ring; and a light shield ring, wherein the light shield ring includes a cylindrical portion centered about the optical axis, and an outer flange portion which extends radially outwards from a rear end of the cylindrical portion so that the cylindrical portion and the outer flange portion and inserted into the first and second annular grooves, respectively.

Abstract translation: 1.一种透镜镜筒的遮光结构，包括内圈和外圈，其中所述内圈包括通孔切口部分，所述遮光结构包括设置有所述内圈的内凸缘; 形成在所述内凸缘壁的内表面上的第一环形槽; 形成在所述外圈的内周面上的第二环状槽; 以及遮光环，其中所述遮光环包括以光轴为中心的圆筒部分和从所述圆筒部分的后端径向向外延伸的外凸缘部分，使得所述圆筒部分和所述外凸缘部分插入 分别进入第一和第二环形槽。