公开(公告)号：US11535509B2

公开(公告)日：2022-12-27

申请号：US16685902

申请日：2019-11-15

申请人： Advanced Semiconductor Engineering, Inc.

发明人： Wei-Wei Liu ,  Huei-Siang Wong ,  Lu-Ming Lai

IPC分类号： B81B7/00 ,  B81C1/00 ,  G01N33/00

摘要： A semiconductor package structure includes an electronic device having a first surface and an exposed region adjacent to the first surface; a dam disposed on the first surface and surrounding the exposed region of the electronic device; and a filter structure disposed on the dam.

公开(公告)号：US11527671B2

公开(公告)日：2022-12-13

申请号：US16732161

申请日：2019-12-31

申请人： Advanced Semiconductor Engineering, Inc.

发明人： Chi Sheng Tseng ,  Hui-Chung Liu ,  Ching-Han Huang

IPC分类号： H01L31/12 ,  H01L31/18 ,  H01L31/153

摘要： An optical package structure includes a substrate, an emitter, a first detector and a light-absorption material. The substrate has a first surface and a second surface opposite to the first surface, the substrate includes a via defining a third surface extending from the first surface to the second surface. The emitter is disposed on the first surface of the substrate. The first detector is disposed on the first surface and aligned with the via of the substrate. The light-absorption material is disposed on the third surface of the substrate.

公开(公告)号：US20220384208A1

公开(公告)日：2022-12-01

申请号：US17332854

申请日：2021-05-27

申请人： Advanced Semiconductor Engineering, Inc.

发明人： Chia-Pin CHEN ,  Chia Sheng TIEN ,  Wan-Ting CHIU ,  Chi Long TSAI ,  Cyuan-Hong SHIH ,  Yen Liang CHEN

IPC分类号： H01L21/48 ,  H01L23/00 ,  H01L25/00

摘要： A manufacturing method for manufacturing a package structure is provided. The manufacturing method includes: (a) providing a carrier having a top surface and a lateral side surface, wherein the top surface includes a main portion and a flat portion connecting the lateral side surface, and a first included angle between the main portion and the flat portion is less than a second included angle between the main portion and the lateral side surface; (b) forming an under layer on the carrier to at least partially expose the flat portion; and (c) forming a dielectric layer on the under layer and covering the exposed flat portion.

公开(公告)号：US11515270B2

公开(公告)日：2022-11-29

申请号：US17067561

申请日：2020-10-09

申请人： Advanced Semiconductor Engineering, Inc.

发明人： Yu-Lin Shih ,  Chih-Cheng Lee

IPC分类号： H01L23/66 ,  H01L23/49 ,  H01L23/538 ,  H01L21/683 ,  H01L21/48 ,  H01L21/56 ,  H01Q1/22 ,  H01Q1/40 ,  H01L23/31

摘要： An antenna package includes a conductive layer, an interconnection structure and an antenna. The interconnection structure is disposed on the conductive layer. The interconnection structure includes a conductive via and a first package body. The conductive via has a first surface facing the conductive layer, a second surface opposite to the first surface and a lateral surface extending from the first surface to the second surface. The first package body covers the lateral surface of the conductive via and exposes the first surface and the second surface of the conductive via. The first package body is spaced apart from the conductive layer. The antenna is electrically connected to the second surface of the conductive via.

公开(公告)号：US20220377161A1

公开(公告)日：2022-11-24

申请号：US17324958

申请日：2021-05-19

申请人： Advanced Semiconductor Engineering, Inc.

发明人： Yuanhao YU ,  Chung Ju YU ,  Jui-Hsien WANG ,  Chai-Chi LIN ,  Hong Jie CHEN

IPC分类号： H04M1/02 ,  H01L23/498 ,  H01L25/16

摘要： At least some embodiments of the present disclosure relate to a semiconductor device package. The semiconductor device package comprises a substrate, an antenna, and an active component. The antenna is disposed at least partially within the substrate. The active component is disposed on the substrate and electrically connected to the antenna. A location of the antenna is configured to be adjustable with respect to a location of the active component.

公开(公告)号：US11508655B2

公开(公告)日：2022-11-22

申请号：US16737817

申请日：2020-01-08

申请人： Advanced Semiconductor Engineering, Inc.

发明人： Yung-Shun Chang ,  Meng-Wei Hsieh ,  Teck-Chong Lee

IPC分类号： H01L23/522 ,  H01L21/56 ,  H01L21/768 ,  H01L23/31 ,  H01L23/00 ,  H01L23/528

摘要： A semiconductor package structure includes a semiconductor die and at least one pillar structure. The semiconductor die has an upper surface and includes at least one conductive pad disposed adjacent to the upper surface. The pillar structure is electrically connected to the conductive pad of the semiconductor die, and defines a recess portion recessed from a side surface of the pillar structure. A conductivity of the pillar structure is greater than a conductivity of the conductive pad.

公开(公告)号：US11508634B2

公开(公告)日：2022-11-22

申请号：US17063571

申请日：2020-10-05

申请人： Advanced Semiconductor Engineering, Inc.

发明人： Syu-Tang Liu ,  Min Lung Huang

IPC分类号： H01L23/31 ,  H01L23/552

摘要： A semiconductor package structure, an electronic device, and method for manufacturing the same are provided. The semiconductor package structure includes a wiring structure, a first electronic device, a second electronic device, and a protection material. The first electronic device is disposed on the wiring structure. The second electronic device is disposed on the wiring structure. The second electronic device defines a plurality of recesses on a first lateral side surface thereof. The protection material is disposed on the wiring structure and encapsulates the recesses of the second electronic device.

公开(公告)号：US20220367384A1

公开(公告)日：2022-11-17

申请号：US17321139

申请日：2021-05-14

申请人： Advanced Semiconductor Engineering, Inc.

发明人： You-Lung YEN ,  Bernd Karl APPELT ,  Kay Stefan ESSIG

IPC分类号： H01L23/00 ,  H01L23/31 ,  H01L23/495 ,  H01L21/56 ,  H01L23/433

摘要： A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a substrate, a semiconductor device, an encapsulant, a balance structure, and a warpage-resistant layer. The semiconductor device is disposed on the substrate. The encapsulant encapsulates the semiconductor device. The balance structure is on the semiconductor device and contacting the encapsulant. The warpage-resistant layer is between the semiconductor device and the balance structure. The encapsulant contacts a lateral surface of the warpage-resistant layer.

公开(公告)号：US20220367304A1

公开(公告)日：2022-11-17

申请号：US17317770

申请日：2021-05-11

申请人： Advanced Semiconductor Engineering, Inc.

发明人： Kuoching CHENG ,  Yuan-Feng CHIANG ,  Ya Fang CHAN ,  Wen-Long LU ,  Shih-Yu WANG

IPC分类号： H01L23/31 ,  H01L25/065 ,  H01L23/16 ,  H01L23/538 ,  H01L21/56

摘要： An electronic device package and a method for manufacturing an electronic device package are provided. The electronic device package includes electronic device structure which includes a first electronic device and a first encapsulant, a second electronic device, and a second encapsulant. The first encapsulant encapsulates the first electronic device. The second electronic device is adjacent to the electronic device structure. The second encapsulant encapsulates the electronic device structure and the second electronic device. A first extension line along a lateral surface of the first electronic device and a second extension line along a lateral surface of the first encapsulant define a first angle, the second extension line along the lateral surface of the first encapsulant and a third extension line along a lateral surface of the second electronic device define a second angle, and the first angle is different from the second angle.

公开(公告)号：US20220353619A1

公开(公告)日：2022-11-03

申请号：US17244885

申请日：2021-04-29

申请人： Advanced Semiconductor Engineering, Inc.

发明人： Chang-Lin YEH

IPC分类号： H04R19/02 ,  B81B7/00 ,  B81C1/00 ,  H04R1/02 ,  H04R7/04 ,  H04R31/00

摘要： A semiconductor package device and a method of manufacturing a semiconductor package device are provided. The semiconductor package device includes a substrate, a first electronic component, and an encapsulation layer. The substrate has a first surface, a second surface opposite to the first surface, and a first opening extending from the first surface to the second surface. The first electronic component is disposed on the first surface of the substrate. The encapsulation layer is formed on the second surface of the substrate. The encapsulation layer includes a chamber connected to the first opening, and a width of the first opening is smaller than a width of the chamber.