公开(公告)号：US20180003894A1

公开(公告)日：2018-01-04

申请号：US15201095

申请日：2016-07-01

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Yi-Min CHIN ,  Yung-Shun Chang ,  Mei-Ju Lu ,  Jia-Hao Zhang ,  Wen-Chi Hung

IPC: G02B6/12

CPC classification number: G02B6/12004 ,  G02B6/00 ,  G02B6/12002 ,  G02B6/122 ,  G02B6/423 ,  G02B6/4239 ,  G02B2006/12123 ,  G02B2006/12147

Abstract: A semiconductor device package includes a substrate and an optical device. The optical device includes a first portion extending into the substrate and not extending beyond a first surface of the substrate. The optical device further includes a second portion extending along the first surface of the substrate.

公开(公告)号：US11495572B2

公开(公告)日：2022-11-08

申请号：US16932693

申请日：2020-07-17

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Yung-Shun Chang ,  Teck-Chong Lee

IPC: H01L23/00 ,  H01L21/56

Abstract: A semiconductor package device includes a transparent carrier, a first patterned conductive layer, a second patterned conductive layer, and a first insulation layer. The transparent carrier has a first surface, a second surface opposite to the first surface and a third surface extended between the first surface and the second surface. The first patterned conductive layer is disposed on the first surface of the transparent carrier. The first patterned conductive layer has a first surface coplanar with the third surface of the transparent carrier. The second patterned conductive layer is disposed on the first surface of the transparent carrier and electrically isolated from the first patterned conductive layer. The first insulation layer is disposed on the transparent carrier and covers the first patterned conductive layer.

公开(公告)号：US11373967B2

公开(公告)日：2022-06-28

申请号：US16684353

申请日：2019-11-14

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Yung-Shun Chang ,  Teck-Chong Lee ,  Sheng-Wen Yang

IPC: H01L25/065 ,  H01L25/00 ,  H01L21/768 ,  H01L23/00 ,  H01L23/31

Abstract: A semiconductor device package includes a first semiconductor device; a second semiconductor device; and a first redistribution layer disposed on the first semiconductor device and having a side wall defining an opening that exposes the first semiconductor device. The side wall of the first redistribution layer has an average surface roughness (Ra) in a range up to 2 micrometers (μm).

公开(公告)号：US12176259B2

公开(公告)日：2024-12-24

申请号：US17542187

申请日：2021-12-03

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Yung-Shun Chang ,  Teck-Chong Lee

IPC: H01L23/31

Abstract: A semiconductor package structure includes a circuit pattern structure, an encapsulant and an anchoring structure. The encapsulant is disposed on the circuit pattern structure. The anchoring structure is disposed adjacent to an interface between the encapsulant and the circuit pattern structure, and is configured to reduce a difference between a variation of expansion of the encapsulant and a variation of expansion of the circuit pattern structure in an environment of temperature variation.

公开(公告)号：US11621220B2

公开(公告)日：2023-04-04

申请号：US17213006

申请日：2021-03-25

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Yung-Shun Chang ,  Chih-Pin Hung ,  Teck-Chong Lee ,  Chih-Yi Huang

IPC: H01L23/02 ,  H01L23/498 ,  H01L23/00 ,  H01L23/544 ,  H01L25/065 ,  H01L21/48 ,  H01L23/31

Abstract: An assembly structure and a method for manufacturing an assembly structure are provided. The assembly structure includes a wiring structure and a semiconductor element. The wiring structure includes at least one dielectric layer and at least one circuit layer in contact with the at least one dielectric layer, and defines an accommodating recess recessed from a top surface of the wiring structure. The wiring structure has a smooth surface extending from the top surface of the wiring structure to a surface of the accommodating recess. The semiconductor element is disposed in the accommodating recess.

公开(公告)号：US11515241B2

公开(公告)日：2022-11-29

申请号：US17203512

申请日：2021-03-16

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Yung-Shun Chang ,  Teck-Chong Lee

IPC: H05K1/02 ,  H01L23/498 ,  H01L21/48 ,  H01L21/683 ,  H05K1/11

Abstract: A semiconductor device package includes a first dielectric layer, a conductive pad and an electrical contact. The first dielectric layer has a first surface and a second surface opposite to the first surface. The conductive pad is disposed within the first dielectric layer. The conductive pad includes a first conductive layer and a barrier. The first conductive layer is adjacent to the second surface of the first dielectric layer. The first conductive layer has a first surface facing the first surface of the first dielectric layer and a second surface opposite to the first surface. The second surface of the first conductive layer is exposed from the first dielectric layer. The barrier layer is disposed on the first surface of the first conductive layer. The electrical contact is disposed on the second surface of the first conductive layer of the conductive pad.

公开(公告)号：US11276620B2

公开(公告)日：2022-03-15

申请号：US16730382

申请日：2019-12-30

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Yung-Shun Chang ,  Teck-Chong Lee

IPC: H01L23/31 ,  H01L23/00 ,  H01L25/16 ,  H01L23/498 ,  H01L21/48 ,  H01L21/56 ,  H01L23/538 ,  H01L23/367

Abstract: A package structure includes a wiring structure, at least one electronic device, a reinforcement structure, a plurality of conductive vias and an encapsulant. The wiring structure includes at least one dielectric layer and at least one circuit layer in contact with the dielectric layer. The electronic device is electrically connected to the wiring structure. The reinforcement structure is disposed on a surface of the wiring structure, and includes a thermoset material. The conductive vias is disposed in the reinforcement structure. The encapsulant covers the electronic device.

公开(公告)号：US10741523B2

公开(公告)日：2020-08-11

申请号：US16158294

申请日：2018-10-11

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Yung-Shun Chang ,  Teck-Chong Lee

IPC: H01L23/00 ,  H01L21/56

Abstract: A semiconductor package device includes a transparent carrier, a first patterned conductive layer, a second patterned conductive layer, and a first insulation layer. The transparent carrier has a first surface, a second surface opposite to the first surface and a third surface extended between the first surface and the second surface. The first patterned conductive layer is disposed on the first surface of the transparent carrier. The first patterned conductive layer has a first surface coplanar with the third surface of the transparent carrier. The second patterned conductive layer is disposed on the first surface of the transparent carrier and electrically isolated from the first patterned conductive layer. The first insulation layer is disposed on the transparent carrier and covers the first patterned conductive layer.

公开(公告)号：US09837352B2

公开(公告)日：2017-12-05

申请号：US15179683

申请日：2016-06-10

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Yung-Shun Chang ,  Chien-Hua Chen ,  Teck-Chong Lee

IPC: H01L29/00 ,  H01L23/522 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L23/498 ,  H01L21/60 ,  H01L23/00

CPC classification number: H01L23/5227 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/5223 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L24/97 ,  H01L2021/60022 ,  H01L2224/0401 ,  H01L2224/131 ,  H01L2224/16238 ,  H01L2224/81447 ,  H01L2224/97 ,  H01L2924/15311 ,  H01L2924/157 ,  H01L2924/15788 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2224/81

Abstract: A semiconductor device includes a substrate, at least one integrated passive device, a first redistribution layer, a second redistribution layer, and conductive vias. The at least one integrated passive device includes at least one capacitor disposed adjacent to a first surface of the substrate. The first redistribution layer is disposed adjacent to the first surface of the substrate. The second redistribution layer is disposed adjacent to a second surface of the substrate. The conductive vias extend through the substrate, and electrically connect the first redistribution layer and the second redistribution layer.

公开(公告)号：US11887928B2

公开(公告)日：2024-01-30

申请号：US17555227

申请日：2021-12-17

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Yung-Shun Chang ,  Sheng-Wen Yang ,  Teck-Chong Lee ,  Yen-Liang Huang

IPC: H01L23/522 ,  H01L23/12 ,  H01L23/31

CPC classification number: H01L23/5226 ,  H01L23/12 ,  H01L23/31

Abstract: A package structure is provided. The package structure includes an encapsulant and an interposer. The encapsulant has a top surface and a bottom surface opposite to the top surface. The interposer is encapsulated by the encapsulant. The interposer includes a main body, an interconnector, and a stop layer. The main body has a first surface and a second surface opposite to the first surface. The interconnector is disposed on the first surface and exposed from the top surface of the encapsulant. The stop layer is on the second surface, wherein a bottom surface of the stop layer is lower than the second surface.