公开(公告)号：US20210159077A1

公开(公告)日：2021-05-27

申请号：US17096444

申请日：2020-11-12

Applicant: ASM IP Holding B.V.

Inventor： Delphine Longrie ,  Shaoren Deng ,  Jan Willem Maes

IPC: H01L21/02 ,  H01L21/027 ,  H01L21/3213

Abstract: Methods for selectively forming a target film on a substrate comprising a first dielectric surface and a second metallic surface are disclosed. The methods may include: contacting the substrate with a plasma generated from a hydrogen containing gas, selectively forming a passivation film from vapor phase reactants on the first dielectric surface while leaving the second metallic surface free from the passivation film, and selectively depositing the target film from vapor phase reactants on the second metallic surface relative to the passivation film.

公开(公告)号：US20210134586A1

公开(公告)日：2021-05-06

申请号：US17064865

申请日：2020-10-07

Applicant: ASM IP HOLDING B.V.

Inventor： Jan Willem Maes ,  David Kurt de Roest ,  Oreste Madia

IPC: H01L21/02 ,  H01L21/311

Abstract: Methods for selectively depositing silicon oxycarbide (SiOC) thin films on a dielectric surface of a substrate relative to a metal surface without generating significant overhangs of SiOC on the metal surface are provided. The methods can include at least one plasma enhanced atomic layer deposition (PEALD) cycle including alternately and sequentially contacting the substrate with a silicon precursor, a first Ar and H2 plasma, a second Ar plasma and an etchant.

公开(公告)号：US10903113B2

公开(公告)日：2021-01-26

申请号：US16773064

申请日：2020-01-27

Applicant: ASM IP Holding B.V.

Inventor： Han Wang ,  Qi Xie ,  Delphine Longrie ,  Jan Willem Maes ,  David de Roest ,  Julian Hsieh ,  Chiyu Zhu ,  Timo Asikainen ,  Krzysztof Kachel ,  Harald Profijt

IPC: H01L21/768 ,  H01L21/02 ,  H01L21/311 ,  H01L23/532 ,  C23C16/455 ,  C23C16/04 ,  C23C16/34 ,  C23C16/56 ,  C23C16/00

Abstract: Methods are provided for selectively depositing Al and N containing material on a first conductive surface of a substrate relative to a second, dielectric surface of the same substrate. In some aspects, methods of forming an Al and N containing protective layer or etch stop layer for use in integrated circuit fabrication are provided.

公开(公告)号：US10854444B2

公开(公告)日：2020-12-01

申请号：US16773635

申请日：2020-01-27

Applicant: ASM IP Holding B.V.

Inventor： Suvi P. Haukka ,  Fu Tang ,  Michael E. Givens ,  Jan Willem Maes ,  Qi Xie

IPC: H01L29/267 ,  H01L21/02 ,  H01L29/778 ,  H01L21/28 ,  H01L29/66 ,  H01L29/22 ,  H01L29/78

Abstract: In some aspects, methods of forming a metal sulfide thin film are provided. According to some methods, a metal sulfide thin film is deposited on a substrate in a reaction space in a cyclical process where at least one cycle includes alternately and sequentially contacting the substrate with a first vapor-phase metal reactant and a second vapor-phase sulfur reactant. In some aspects, methods of forming a three-dimensional architecture on a substrate surface are provided. In some embodiments, the method includes forming a metal sulfide thin film on the substrate surface and forming a capping layer over the metal sulfide thin film. The substrate surface may comprise a high-mobility channel.

公开(公告)号：US10741394B2

公开(公告)日：2020-08-11

申请号：US16254841

申请日：2019-01-23

Applicant: ASM IP Holding B.V. ,  IMEC VZW ,  Katholieke Universiteit Leuven

Inventor： Jan Willem Maes ,  Werner Knaepen ,  Roel Gronheid ,  Arjun Singh

IPC: H01L21/00 ,  H01L21/033 ,  G03F7/00 ,  H01L21/02 ,  H01L21/027 ,  H01L21/32

Abstract: A method for forming a film with an annealing step and a deposition step is disclosed. The method comprises an annealing step for inducing self-assembly or alignment within a polymer. The method also comprises a selective deposition step in order to enable selective deposition on a polymer.

公开(公告)号：US10551741B2

公开(公告)日：2020-02-04

申请号：US16094119

申请日：2017-04-07

Applicant: ASM IP HOLDING B.V. ,  IMEC VZW

Inventor： Werner Knaepen ,  Jan Willem Maes ,  Maarten Stokhof ,  Roel Gronheid ,  Hari Pathangi Sriraman

IPC: G03F7/16 ,  H01L21/027 ,  H01L21/67 ,  H01L21/768 ,  H01L51/00 ,  H01L21/469 ,  H01L21/31 ,  B05D3/04 ,  B05D3/02

Abstract: A method of forming a directed self-assembled (DSA) layer on a substrate by: providing a substrate; applying a layer comprising a self-assembly material on the substrate; and annealing of the self-assembly material of the layer to form a directed self-assembled layer by providing a controlled temperature and gas environment around the substrate. The controlled gas environment comprises molecules comprising an oxygen element with a partial pressure between 10-2000 Pa.

公开(公告)号：US10453701B2

公开(公告)日：2019-10-22

申请号：US15486124

申请日：2017-04-12

Applicant: ASM IP Holding B.V.

Inventor： Eva E. Tois ,  Hidemi Suemori ,  Viljami J. Pore ,  Suvi P. Haukka ,  Varun Sharma ,  Jan Willem Maes ,  Delphine Longrie ,  Krzysztof Kachel

IPC: H01L21/311 ,  H01L21/768 ,  H01L21/02 ,  C23C16/04 ,  C23C16/455 ,  C23C16/56 ,  H01L21/033 ,  H01L21/32 ,  H01L21/3213

Abstract: Processes are provided herein for deposition of organic films. Organic films can be deposited, including selective deposition on one surface of a substrate relative to a second surface of the substrate. For example, polymer films may be selectively deposited on a first metallic surface relative to a second dielectric surface. Selectivity, as measured by relative thicknesses on the different layers, of above about 50% or even about 90% is achieved. The selectively deposited organic film may be subjected to an etch process to render the process completely selective. Processes are also provided for particular organic film materials, independent of selectivity. Masking applications employing selective organic films are provided. Post-deposition modification of the organic films, such as metallic infiltration and/or carbon removal, is also disclosed.

公开(公告)号：US10367080B2

公开(公告)日：2019-07-30

申请号：US15144506

申请日：2016-05-02

Applicant: ASM IP Holding B.V.

Inventor： Fu Tang ,  Qi Xie ,  Jan Willem Maes ,  Xiaoqiang Jiang ,  Michael Eugene Givens

IPC: H01L21/02 ,  H01L21/28 ,  H01L29/66

Abstract: A method for forming layers suitable for a V-NAND stack is disclosed. Specifically, the method may include multiple cycles for forming an oxide and a nitride in order to form an oxynitride layer.

公开(公告)号：US20190088555A1

公开(公告)日：2019-03-21

申请号：US15707786

申请日：2017-09-18

Applicant: ASM IP Holding B.V.

Inventor： Qi Xie ,  Chiyu Zhu ,  Kiran Shrestha ,  Pauline Calka ,  Oreste Madia ,  Jan Willem Maes ,  Michael Eugene Givens

IPC: H01L21/8238 ,  H01L29/49 ,  H01L27/092 ,  H01L29/51

Abstract: A method for forming a semiconductor device structure is disclosure. The method may include, depositing an NMOS gate dielectric and a PMOS gate dielectric over a semiconductor substrate, depositing a first work function metal over the NMOS gate dielectric and over the PMOS gate dielectric, removing the first work function metal over the PMOS gate dielectric, and depositing a second work function metal over the NMOS gate dielectric and over the PMOS gate dielectric. Semiconductor device structures including desired metal gate electrodes deposited by the methods of the disclosure are also disclosed.

公开(公告)号：US10141189B2

公开(公告)日：2018-11-27

申请号：US15394571

申请日：2016-12-29

Applicant: ASM IP Holding B.V.

Inventor： Harald Profijt ,  Qi Xie ,  Jan Willem Maes ,  David Kohen

IPC: H01L21/225 ,  H01L29/66 ,  H01L29/161 ,  H01L29/10 ,  H01L29/06 ,  H01L21/223 ,  H01L21/768 ,  H01L21/385

Abstract: In some embodiments, a compound semiconductor is formed by diffusion of semiconductor species from a source semiconductor layer into semiconductor material in a substrate. The source semiconductor layer may be an amorphous or polycrystalline structure, and provides a source of semiconductor species for later diffusion into the other semiconductor material. Advantageously, such a semiconductor layer may be more conformal than an epitaxially grown, crystalline semiconductor layer. As a result, this more conformal semiconductor layer acts as a uniform source of the semiconductor species for diffusion into the semiconductor material in the substrate. In some embodiments, an interlayer is formed between the source semiconductor layer and the substrate, and then the interlayer is trimmed before depositing the source semiconductor layer. In some other embodiments, the source semiconductor layer is deposited directly on the substrate, and has an amorphous or polycrystalline structure.