公开(公告)号：US20170025489A1

公开(公告)日：2017-01-26

申请号：US15168601

申请日：2016-05-31

Applicant: Apple Inc.

Inventor： Jae Won Choi ,  Shih Chang Chang ,  Young Bae Park ,  ZhiFeng Zhan ,  Chieh-Wei Chen ,  Tsung-Ting Tsai ,  Chin-Wei Lin ,  Paul S. Drzaic

IPC: H01L27/32 ,  H01L51/52

CPC classification number: H01L27/3258 ,  H01L27/1248 ,  H01L27/3246 ,  H01L51/5253

Abstract: A display may have an array of pixels formed from organic light-emitting diodes and thin-film transistor circuitry. A planarization layer may be interposed between the thin-film transistor circuitry and the organic light-emitting diodes. To protect the organic light-emitting diodes from photoactive compounds that may be outgassed from the planarization layer, an inorganic barrier layer may be interposed between the planarization layer and the organic light-emitting diodes. The inorganic barrier layer may be formed on top of and/or below a pixel definition layer that defines light-emitting zones for the organic light-emitting diodes. In another suitable arrangement, the inorganic barrier layer may itself define light-emitting zones and may be used in place of a polymer-based pixel definition layer. The inorganic barrier layer may include trenches in which the emissive material of the light-emitting diodes is formed.

Abstract translation: 显示器可以具有由有机发光二极管和薄膜晶体管电路形成的像素阵列。 平坦化层可以介于薄膜晶体管电路和有机发光二极管之间。 为了保护有机发光二极管免受可能从平坦化层脱气的光活性化合物，可以在平坦化层和有机发光二极管之间插入无机阻挡层。 无机阻挡层可以形成在限定有机发光二极管的发光区域的像素限定层的顶部和/或下方。 在另一合适的布置中，无机阻挡层本身可以限定发光区域，并且可以用来代替基于聚合物的像素限定层。 无机阻挡层可以包括其中形成发光二极管的发光材料的沟槽。

公开(公告)号：US20160275845A1

公开(公告)日：2016-09-22

申请号：US14687081

申请日：2015-04-15

Applicant: Apple Inc.

Inventor： Tsung-Ting Tsai ,  Chin-Wei Lin ,  Shih Chang Chang

IPC: G09G3/20 ,  G09G3/32

CPC classification number: G09G3/2018 ,  G09G3/2003 ,  G09G3/2014 ,  G09G3/2081 ,  G09G3/3233 ,  G09G3/3258 ,  G09G3/3266 ,  G09G2300/0819 ,  G09G2300/0852 ,  G09G2300/0861 ,  G09G2310/0251 ,  G09G2310/0286 ,  G09G2310/08 ,  G09G2320/0626 ,  G09G2320/064 ,  G09G2320/0666

Abstract: A display may have an array of pixels arranged in rows and columns. Display driver circuitry may load data into the pixels via data lines that extend along the columns. The display driver circuitry may include gate driver circuitry that supplies horizontal control signals to rows of the pixels. The horizontal control signals may include emission enable signals for controlling emission enable transistors and scan signals for controlling switching transistors. During an emission phase of operation for the display, the emission enable signal may be pulse-width modulated by the emission control gate driver circuits in the gate driver circuitry to control the output of the light-emitting diodes. The emission control gate driver circuits may be controlled using an emission start signal and a pair of two-phase clocks.

Abstract translation: 显示器可以具有排列成行和列的像素阵列。 显示驱动器电路可以通过沿列延伸的数据线将数据加载到像素中。 显示驱动器电路可以包括将水平控制信号提供给像素行的栅极驱动器电路。 水平控制信号可以包括用于控制发射使能晶体管的发射使能信号和用于控制开关晶体管的扫描信号。 在显示器的操作的发光阶段期间，发光使能信号可以由栅极驱动器电路中的发光控制栅极驱动电路进行脉冲宽度调制，以控制发光二极管的输出。 可以使用发射开始信号和一对两相时钟来控制发射控制栅极驱动器电路。

公开(公告)号：US20250037672A1

公开(公告)日：2025-01-30

申请号：US18919947

申请日：2024-10-18

Applicant: Apple Inc.

Inventor： Shinya Ono ,  Chin-Wei Lin ,  Zino Lee ,  Chun-Chieh Lin ,  Chen-Ming Chen

IPC: G09G3/3291 ,  G09G3/3266

Abstract: A display may include an array of pixels. Each pixel in the array includes an organic light-emitting diode coupled to a drive transistor, a data loading transistor, a first capacitor for storing data charge, and a second capacitor. During a data programming phase, the data loading transistor may be activated to load in a data value onto the first capacitor. After the data programming phase, the second capacitor may be configured to receive a lower voltage, which extends a threshold voltage sampling time for the pixel. Configured and operated in this way, the temperature luminance sensitivity of the display can be reduced.

公开(公告)号：US12207512B2

公开(公告)日：2025-01-21

申请号：US18513132

申请日：2023-11-17

Applicant: Apple Inc.

Inventor： Cheng-Ho Yu ,  Chin-Wei Lin ,  Shyuan Yang ,  Ting-Kuo Chang ,  Tsung-Ting Tsai ,  Warren S. Rieutort-Louis ,  Shih-Chang Chang ,  Yu Cheng Chen ,  John Z. Zhong

IPC: H10K59/131 ,  G06F3/044 ,  G09G3/3233 ,  G09G3/3266 ,  H10K59/10 ,  H10K59/40 ,  H10K59/88

Abstract: A display may have an array of pixels. Display driver circuitry may supply data and control signals to the pixels. Each pixel may have seven transistors, a capacitor, and a light-emitting diode such as an organic light-emitting diode. The seven transistors may receive control signals using horizontal control lines. Each pixel may have first and second emission enable transistors that are coupled in series with a drive transistor and the light-emitting diode of that pixel. The first and second emission enable transistors may be coupled to a common control line or may be separately controlled so that on-bias stress can be effectively applied to the drive transistor. The display driver circuitry may have gate driver circuits that provide different gate line signals to different rows of pixels within the display. Different rows may also have different gate driver strengths and different supplemental gate line loading structures.

公开(公告)号：US20250022423A1

公开(公告)日：2025-01-16

申请号：US18904525

申请日：2024-10-02

Applicant: Apple Inc.

Inventor： Chin-Wei Lin ,  Hung Sheng Lin ,  Shih Chang Chang ,  Shinya Ono

IPC: G09G3/3233 ,  G09G3/3266 ,  G09G3/3275 ,  H01L27/12 ,  H01L29/786

Abstract: A display may have an array of pixels each of which has a light-emitting diode such as an organic light-emitting diode. A drive transistor and an emission transistor may be coupled in series with the light-emitting diode of each pixel between a positive power supply and a ground power supply. The pixels may include first and second switching transistors. A data storage capacitor may be coupled between a gate and source of the drive transistor in each pixel. Signal lines may be provided in columns of pixels to route signals such as data signals, sensed drive currents from the drive transistors, and predetermined voltages between display driver circuitry and the pixels. The switching transistors, emission transistors, and drive transistors may include semiconducting-oxide transistors and silicon transistors and may be n-channel transistors or p-channel transistors.

公开(公告)号：US20240420643A1

公开(公告)日：2024-12-19

申请号：US18654541

申请日：2024-05-03

Applicant: Apple Inc.

Inventor： Hao-Lin Chiu ,  Chin-Wei Lin ,  Shinya Ono ,  Kyung Wook Kim ,  Szu-Hsien Lee ,  Pei-En Chang ,  Kwang Soon Park

IPC: G09G3/3266 ,  H01L27/12 ,  H01L29/786

Abstract: A driver circuit configured to output a control signal to a row of display pixels is provided. The driver circuit can include a first transistor having a drain terminal coupled to a first positive power supply line, a gate terminal, and a source terminal that is coupled to an output port of the driver circuit on which the control signal is generated and a second transistor having a drain terminal coupled to the output port of the driver circuit, a gate terminal, and a source terminal that is coupled to a first ground power supply line. The first and second transistors can be coupled to a plurality of transistors coupled between a second positive power supply line and a second ground power supply line, configured to receive one or more clocks signals, and at least some of which include bottom gate terminals.

公开(公告)号：US12148390B2

公开(公告)日：2024-11-19

申请号：US17962239

申请日：2022-10-07

Applicant: Apple Inc.

Inventor： Chin-Wei Lin ,  Shinya Ono ,  Jung Yen Huang

IPC: G09G3/3266 ,  G09G3/20 ,  G09G3/3233 ,  G09G3/3291

Abstract: A display pixel may include an organic light-emitting diode, one or more emission transistors, a drive transistor, a gate setting transistor, a data loading transistor, and an initialization transistor. The drive transistor may be implemented as a semiconducting-oxide transistor to mitigate threshold voltage hysteresis to improve first frame response at high refresh rates, to reduce undesired luminance jumps at low refresh rates, and to reduce image sticking. The gate setting transistor may also be implemented as a semiconducting-oxide transistor to reduce leakage at the gate terminal of the drive transistor. The initialization transistor may also be implemented as a semiconducting-oxide transistor so that it can be controlled using a shared emission signal to reduce routing complexity. The remaining transistors in the pixel may be implemented as p-type silicon transistors. Display pixels configured in this way can support in-pixel threshold voltage compensation and on-bias stress phase to further mitigate the hysteresis.

公开(公告)号：US20240127758A1

公开(公告)日：2024-04-18

申请号：US18322406

申请日：2023-05-23

Applicant: Apple Inc.

Inventor： Shinya Ono ,  Chin-Wei Lin ,  Chen-Ming Chen ,  Hassan Edrees

IPC: G09G3/3266

CPC classification number: G09G3/3266 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2300/0861 ,  G09G2310/0286 ,  G09G2310/0291 ,  G09G2310/08 ,  G09G2320/0247

Abstract: A display may include an array of pixels that receive control signals from a chain of gate drivers. The pixels can be formed using semiconducting oxide transistors, whereas the gate drivers can be formed using silicon transistor. Each gate driver may include a shift register subcircuit and an output buffer subcircuit. The shift register subcircuit may include a first set of transistors at least partially controlled by one or more shift register clock signals. The output buffer subcircuit may include a second set of transistors at least partially controlled by one or more output buffer clock signals. The output buffer clock signals can toggle independently from the shift register clock signals. Operated in this way, the shift register clock signals can have pulse widths optimized for stability while the output buffer clock signals can have pulse widths optimized for speed.

公开(公告)号：US20240127754A1

公开(公告)日：2024-04-18

申请号：US18532835

申请日：2023-12-07

Applicant: Apple Inc.

Inventor： Chin-Wei Lin ,  Hung Sheng Lin ,  Shih Chang Chang ,  Shinya Ono

IPC: G09G3/3233 ,  G09G3/3266 ,  G09G3/3275 ,  H01L27/12 ,  H01L29/786

CPC classification number: G09G3/3233 ,  G09G3/3266 ,  G09G3/3275 ,  H01L27/1225 ,  H01L29/78651 ,  H01L29/7869 ,  G09G2300/0842 ,  G09G2300/0861 ,  G09G2310/0202 ,  G09G2320/0295 ,  G09G2320/043

Abstract: A display may have an array of pixels each of which has a light-emitting diode such as an organic light-emitting diode. A drive transistor and an emission transistor may be coupled in series with the light-emitting diode of each pixel between a positive power supply and a ground power supply. The pixels may include first and second switching transistors. A data storage capacitor may be coupled between a gate and source of the drive transistor in each pixel. Signal lines may be provided in columns of pixels to route signals such as data signals, sensed drive currents from the drive transistors, and predetermined voltages between display driver circuitry and the pixels. The switching transistors, emission transistors, and drive transistors may include semiconducting-oxide transistors and silicon transistors and may be n-channel transistors or p-channel transistors.

公开(公告)号：US11823621B2

公开(公告)日：2023-11-21

申请号：US17576619

申请日：2022-01-14

Applicant: Apple Inc.

Inventor： Chin-Wei Lin ,  Shyuan Yang ,  Chuang Qian ,  Abbas Jamshidi Roudbari ,  Ting-Kuo Chang

IPC: G09G3/32 ,  G09G3/3225 ,  G09G3/3233

CPC classification number: G09G3/3225 ,  G09G3/3233 ,  G09G2300/043 ,  G09G2300/0417 ,  G09G2300/0819 ,  G09G2300/0861 ,  G09G2310/0262 ,  G09G2310/0297 ,  G09G2310/06 ,  G09G2310/061 ,  G09G2320/0214 ,  G09G2320/0242 ,  G09G2320/0247 ,  G09G2320/0252 ,  G09G2320/043 ,  G09G2320/045 ,  G09G2320/064 ,  G09G2340/0435

Abstract: A display may have an array of organic light-emitting diode display pixels operating at a low refresh rate. Each display pixel may have six thin-film transistors and one capacitor. One of the six transistors may serve as the drive transistor and may be compensated using the remaining five transistors and the capacitor. One or more on-bias stress operations may be applied before threshold voltage sampling to mitigate first frame dimming. Multiple anode reset and on-bias stress operations may be inserted during vertical blanking periods to reduce flicker and maintain balance and may also be inserted between successive data refreshes to improve first frame performance. Two different emission signals controlling each pixel may be toggled together using a pulse width modulation scheme to help provide darker black levels.