公开(公告)号：US20070077909A1

公开(公告)日：2007-04-05

申请号：US11327955

申请日：2006-01-09

申请人： Michael Kappes ,  Arya Behzad

发明人： Michael Kappes ,  Arya Behzad

IPC分类号： H04B1/28 ,  H04M1/00

CPC分类号： H03F1/26 ,  H03F3/24 ,  H03F3/45188 ,  H03F2200/372 ,  H03F2200/453 ,  H03F2203/45732

摘要： A multi-stage amplifier includes first and second amplification stages and a loading stage, all of which generate flicker noise. A degeneration block is operably disposed between circuit common and the loading stage wherein the degeneration block is operable to reduce flicker noise generated by at least one of the loading stage, the first amplification stage and the second amplification stage. The degeneration block further includes at least one active MOSFET operably biased in a linear region to provide a specified resistive value and coupled to receive and conduct the common mode portion of the intermediate stage output signal based upon a gate terminal bias signal. A degeneration block amplifier is operable to generate a replica device bias signal wherein the replica device is operable to set the gate terminal bias signal for the at least one active MOSFET based upon the replica device bias signal.

摘要翻译： 多级放大器包括第一和第二放大级和负载级，所有这些都产生闪烁噪声。 退化块可操作地设置在电路公共端和负载级之间，其中退化块可操作以减少由负载级，第一放大级和第二级放大级中的至少一个产生的闪烁噪声。 退化块还包括至少一个有源MOSFET，其可操作地偏置在线性区域中以提供规定的电阻值，并耦合以基于栅极端子偏置信号接收和导通中间级输出信号的共模部分。 退化块放大器可操作以产生复制器件偏置信号，其中复制器件可操作以基于复制器件偏置信号为至少一个有源MOSFET设置栅极端子偏置信号。

公开(公告)号：US20070004357A1

公开(公告)日：2007-01-04

申请号：US11264392

申请日：2005-11-01

申请人： Adedayo Ojo ,  Arya Behzad

发明人： Adedayo Ojo ,  Arya Behzad

IPC分类号： H04B17/00 ,  H04B1/28

CPC分类号： H04B17/318

摘要： An integrated circuit radio transceiver and method therefor comprises a receiver front end that further includes a plurality of in-phase and quadrature phase receive processing block operable at first and second frequency bands wherein each of the receive processing blocks defines an ingoing signal path and further includes a plurality of filtering and amplification blocks disposed within the corresponding ingoing signal path, a plurality of RSSI blocks coupled to receive an ingoing analog signal from a corresponding plurality of nodes disposed throughout the ingoing signal path, each of the plurality of received signal strength indicator blocks producing a signal strength indication, and wherein a baseband processor is operable to receive a selected signal strength indication and to produce at least one gain setting to at least one amplification block within the in-phase or quadrature phase receive processing blocks. In operation, the baseband processor receive a signal strength indication from each RSSI block to determine a total amount of gain and appropriate gain distribution within the receive signal path.

摘要翻译： 一种集成电路无线电收发机及其方法包括接收器前端，其还包括在第一和第二频带处可操作的多个同相和正交相位接收处理块，其中每个接收处理块定义入轨信号路径，并且还包括 多个滤波和放大块，布置在相应的加入信号路径内，多个RSSI块被耦合以接收来自设置在整个输入信号路径上的相应多个节点的输入模拟信号，多个接收信号强度指示块 产生信号强度指示，并且其中基带处理器可操作以接收所选择的信号强度指示并且产生至少一个增益设置到同相或正交相位接收处理块内的至少一个放大块。 在操作中，基带处理器从每个RSSI块接收信号强度指示，以确定接收信号路径内的增益总量和合适的增益分布。

公开(公告)号：US20060223473A1

公开(公告)日：2006-10-05

申请号：US11184423

申请日：2005-07-19

申请人： Arya Behzad ,  Hung-Ming Chien

发明人： Arya Behzad ,  Hung-Ming Chien

IPC分类号： H04B1/06

CPC分类号： H03L7/18 ,  H03L7/0802 ,  H03L7/0891

摘要： A phase locked loop includes a detection module, a control conversion module, a controlled oscillation module, a divider module, and a power distribution module. The detection module is operably coupled to produce a difference signal based on a difference between a reference oscillation and a feedback oscillation. The control conversion module is operably coupled to convert the difference signal into a control signal. The controlled oscillation module is operably coupled to produce an output oscillation based on the control signal. The divider module is operably coupled to produce the feedback oscillation based on the output oscillation. The power distribution module is operably coupled to receive a supply voltage and to provide an individual supply voltage to at least one of the detection module, the control conversion module, the controlled oscillation module, and the divider module to optimize at least one of performance and power consumption of the phase locked loop.

摘要翻译： 锁相环包括检测模块，控制转换模块，受控振荡模块，分频模块和配电模块。 检测模块可操作地耦合以基于参考振荡和反馈振荡之间的差产生差分信号。 控制转换模块可操作地耦合以将差分信号转换成控制信号。 受控振荡模块可操作地耦合以基于控制信号产生输出振荡。 分压器模块可操作地耦合以基于输出振荡产生反馈振荡。 功率分配模块可操作地耦合以接收电源电压并且向检测模块，控制转换模块，受控振荡模块和分频器模块中的至少一个提供单独的电源电压，以优化性能和 锁相环的功耗。

公开(公告)号：US20060223458A1

公开(公告)日：2006-10-05

申请号：US11168831

申请日：2005-06-28

申请人： Arya Behzad

发明人： Arya Behzad

IPC分类号： H04B1/40

CPC分类号： H04B1/406

摘要： A Radio Frequency (RF) transceiver Integrated Circuit (IC) includes a first RF transceiver group, a first baseband section, a second RF transceiver group, a second baseband section, local oscillation circuitry, and local oscillation distribution circuitry. The first baseband section communicatively couples to the first RF transceiver group. The second RF transceiver group resides in substantial symmetry with the first RF transceiver group about a center line of symmetry of the RF transceiver IC. The second baseband section communicatively coupled to the second RF transceiver group. The local oscillation distribution circuitry operably couples to the local oscillation generation circuitry, to the first RF transceiver group, and to the second RF transceiver group. The second baseband section may reside in substantial symmetry with the first baseband section about the center line of symmetry of the RF transceiver IC.

公开(公告)号：US20060220748A1

公开(公告)日：2006-10-05

申请号：US11446662

申请日：2006-06-05

申请人： Arya Behzad

发明人： Arya Behzad

IPC分类号： H03F1/22

CPC分类号： H03F1/0266 ,  H03F1/0205 ,  H03F1/22 ,  H03F1/223 ,  H03F3/24 ,  H03F3/45188 ,  H03F2200/372 ,  H03F2200/435 ,  H03F2203/45288

摘要： A power amplifier power amplifier includes a transconductance stage and a cascode stage. The transconductance stage that is operable to receive an input voltage signal and to produce an output current signal. The transconductance stage includes a first Metal Oxide Silicon (MOS) transistor having a first gate oxide thickness and a first channel length. The cascode stage communicatively couples to the transconductance stage and is operable to receive the output current signal and to produce an output voltage signal based thereupon. The cascode stage includes a second MOS transistor having a second gate oxide thickness and a second channel length.

摘要翻译： 功率放大器功率放大器包括跨导级和共源共栅级。 跨导级，其可操作以接收输入电压信号并产生输出电流信号。 跨导级包括具有第一栅极氧化物厚度和第一沟道长度的第一金属氧化物硅（MOS）晶体管。 共源共栅级通信耦合到跨导级并且可操作以接收输出电流信号并且基于此产生输出电压信号。 共射共栅级包括具有第二栅极氧化物厚度和第二沟道长度的第二MOS晶体管。

公开(公告)号：US20060202755A1

公开(公告)日：2006-09-14

申请号：US11420406

申请日：2006-05-25

申请人： Arya Behzad ,  Klaas Bult ,  Ramon Gomez ,  Chi-Hung Lin ,  Tom Kwan ,  Oscar Agazzi ,  John Creigh ,  Mehdi Hatamian ,  David Kruse ,  Arthur Abnous ,  Henry Samueli

发明人： Arya Behzad ,  Klaas Bult ,  Ramon Gomez ,  Chi-Hung Lin ,  Tom Kwan ,  Oscar Agazzi ,  John Creigh ,  Mehdi Hatamian ,  David Kruse ,  Arthur Abnous ,  Henry Samueli

IPC分类号： H03F3/68

CPC分类号： H03F1/32 ,  H03F3/347 ,  H03F3/505 ,  H03F2200/211 ,  H03F2200/252 ,  H03F2200/421 ,  H03F2200/513 ,  H03G1/0088 ,  H03G3/001 ,  H03G3/3036 ,  H03G3/3052 ,  H03G5/10 ,  H03H11/245

摘要： Circuitry to remove switches from signal paths in integrated circuit programmable gain attenuators Programmable gain attenuators and programmable gain amplifiers commonly switch between signal levels using semi-conductor switches. Such switches may introduce non-linearities in the signal, By isolating the switches from the signal path linearity of the PGA can be improved.

摘要翻译： 电路从集成电路可编程增益衰减器中的信号路径中去除开关可编程增益衰减器和可编程增益放大器通常使用半导体开关在信号电平之间切换。 这种开关可能在信号中引入非线性。通过将开关与信号路径隔离，可以提高PGA的线性度。

公开(公告)号：US20060131701A1

公开(公告)日：2006-06-22

申请号：US11353910

申请日：2006-02-13

申请人： Arya Behzad

发明人： Arya Behzad

IPC分类号： H01L39/00

CPC分类号： H03F3/191 ,  H01L23/36 ,  H01L23/3677 ,  H01L23/49838 ,  H01L23/66 ,  H01L24/48 ,  H01L24/49 ,  H01L2223/6611 ,  H01L2224/32188 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48253 ,  H01L2224/48257 ,  H01L2224/49111 ,  H01L2224/49112 ,  H01L2224/49113 ,  H01L2224/49171 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01033 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19105 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H03D7/1441 ,  H03D7/1458 ,  H03D7/1483 ,  H03D2200/0043 ,  H03F1/565 ,  H03F3/45188 ,  H03F2200/111 ,  H03F2200/372 ,  H03F2203/45638 ,  H03F2203/45704 ,  H03F2203/45726 ,  H03F2203/45728 ,  H03F2203/7209 ,  H03J5/244 ,  H03J2200/10 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

摘要： A Radio Frequency (RF) device includes a semi conductive die and a package in which the semi conductive die mounts. The semi conductive die includes a first portion of an RF circuit and a plurality of die pads formed thereon. The package includes a heat slug upon which the semi conductive die resides, a plurality of package pins, a plurality of bond wires, a downbond rail, and a plurality of downbonds. Each of the bond wires couples between a corresponding die pad and a corresponding package pin. The downbond rail couples to the heat slug. At least one downbond couples between a die pad corresponding to the first portion of the RF circuit and a respective location on the downbond rail, serves as an inductor for a second portion of the RF circuit, may include a plurality of downbonds coupled in parallel, and has a length and/or a diameter selected to provide a desired inductance.

公开(公告)号：US20060057999A1

公开(公告)日：2006-03-16

申请号：US11167528

申请日：2005-06-27

申请人： Arya Behzad ,  C. Lee

发明人： Arya Behzad ,  C. Lee

IPC分类号： H04B1/26 ,  H04B15/00

CPC分类号： H03D7/1441 ,  H03D7/1458 ,  H03D7/165 ,  H03D2200/0025 ,  H03D2200/0047

摘要： An offset cancellation scheme in which offset cancellation current is sourced into one differential branch of a driver circuit and sinked from the opposite differential branch. The source/sink arrangement allows for offset cancellation current to be introduced into the circuit, but the overall total average current remains substantially unchanged. When used in an I and Q mixer circuits, the offsets may be canceled without generating an I/Q imbalance in the I and Q mixers.

公开(公告)号：US20050088241A1

公开(公告)日：2005-04-28

申请号：US10971506

申请日：2004-10-22

申请人： Arya Behzad

发明人： Arya Behzad

IPC分类号： H01L23/36 ,  H01L23/48 ,  H01L23/50 ,  H01L23/60 ,  H01L23/66 ,  H01L27/02 ,  H03F3/14

CPC分类号： H01L27/0255 ,  H01L23/36 ,  H01L23/3677 ,  H01L23/50 ,  H01L23/60 ,  H01L23/66 ,  H01L24/48 ,  H01L24/49 ,  H01L2223/6611 ,  H01L2224/32188 ,  H01L2224/48091 ,  H01L2224/48237 ,  H01L2224/49113 ,  H01L2924/00014 ,  H01L2924/01015 ,  H01L2924/01033 ,  H01L2924/14 ,  H01L2924/19042 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2224/45099 ,  H01L2224/05599

摘要： A circuit includes a plurality of circuit components formed on a semi conductive substrate die and a bond wire. The plurality of circuit components include at least one active component that operates on an information signal, a tuning node coupled to the at least one active component, an Electro Static Discharge (ESD) protection inductor, and a chip pad. The chip pad couples to the tuning node. The ESD protection inductor communicatively couples between the tuning node and a rail formed on the semi conductive substrate die. The ESD protection inductor provides ESD protection prior to packaging of the semi conductive substrate die or in some cases prior to the installation of the packaged die on a PC board or the equivalent. The bond wire couples between the chip pad and a package pad and serves as a tuning inductor for the circuit.

摘要翻译： 电路包括形成在半导体基板芯片和接合线上的多个电路部件。 所述多个电路部件包括对信息信号进行操作的至少一个有源部件，耦合到所述至少一个有源部件的调谐节点，静电放电（ESD）保护电感器和芯片焊盘。 芯片焊盘耦合到调谐节点。 ESD保护电感器在调谐节点和形成在半导电衬底裸片上的导轨之间通信地耦合。 ESD保护电感器在封装半导体衬底裸片之前或在某些情况下，在将封装的裸片安装在PC板或等效电路之前提供ESD保护。 接合线耦合在芯片焊盘和封装焊盘之间，并用作电路的调谐电感器。

公开(公告)号：US20050088204A1

公开(公告)日：2005-04-28

申请号：US10973705

申请日：2004-10-26

申请人： Arya Behzad

发明人： Arya Behzad

IPC分类号： H03D7/14 ,  H03K5/22

CPC分类号： H03D7/1441 ,  H03D7/1458 ,  H03D7/1466 ,  H03D2200/0033 ,  H03D2200/0043 ,  H03D2200/0088

摘要： An RF communications system includes a transmit node for transmitting an RF information signal and a receive node for receiving the transmitted RF information signal. The receive node includes a passive mixer coupled to an amplifier for producing an IF or baseband differential mixer output signal as a function of a LO drive signal. The passive mixer having a first plurality of transistors of a first polarity type arranged in a ring configuration and a second plurality of transistors of a second polarity type, wherein each of second plurality of transistors is coupled to one of the first plurality of transistors.