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    Semiconductor device and semiconductor device manufacturing method
    123.
    发明授权
    Semiconductor device and semiconductor device manufacturing method 有权

    公开(公告)号：US11296233B2

    公开(公告)日：2022-04-05

    申请号：US16962558

    申请日：2019-02-01

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Shunpei Yamazaki ,  Katsuaki Tochibayashi ,  Kensuke Yoshizumi

    IPC: H01L27/00 ,  H01L29/00 ,  H01L29/786 ,  H01L29/423 ,  H01L29/51

    Abstract: A semiconductor device having favorable electrical characteristics can be provided. The semiconductor device having favorable electrical characteristics is provided. The semiconductor device has a structure including a first metal oxide layer including a first region, and a second region and a third region in which phosphorus, boron, aluminum, or magnesium is added and between which the first region is sandwiched; a conductive layer which overlaps with the first region; a first insulating layer which covers a side surface and a bottom surface of the conductive layer; a second metal oxide layer which covers a side surface and a bottom surface of the first insulating layer and is in contact with a top surface of the first region; a second insulating layer in contact with a top surface of the second region and a top surface of the third region and in contact with a side surface of the second metal oxide layer; a third insulating layer positioned over the second insulating layer and in contact with a side surface of the second metal oxide layer; a fourth insulating layer positioned over the third insulating layer and in contact with a side surface of the second metal oxide layer; a fifth insulating layer in contact with a top surface of the conductive layer, a top surface of the first insulating layer, a top surface of the second metal oxide layer, and a top surface of the fourth insulating layer.

    Liquid crystal display device
    125.
    发明授权
    Liquid crystal display device 有权

    公开(公告)号：US11289031B2

    公开(公告)日：2022-03-29

    申请号：US17191807

    申请日：2021-03-04

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Shunpei Yamazaki ,  Jun Koyama ,  Hiroyuki Miyake ,  Kouhei Toyotaka

    IPC: G09G3/34 ,  G09G3/36 ,  G09G3/20

    Abstract: A liquid crystal display device comprising a backlight and a pixel portion including first to 2n-th scan lines, wherein, in a first case of expressing a color image, first pixels controlled by the first to n-th scan lines are configured to express a first image using at least one of first to third hues supplied in a first rotating order, and second pixels controlled by the (n+1)-th to 2n-th scan lines are configured to express a second image using at least one of the first to third hues supplied in a second rotating order, wherein, in a second case of expressing a monochrome image, the first and second pixels controlled by the first to 2n-th scan lines are configured to express the monochrome image by external light reflected by the reflective pixel electrode, and wherein the first rotating order is different from the second rotating order.

    Semiconductor Device and Manufacturing Method Thereof
    128.
    发明申请
    Semiconductor Device and Manufacturing Method Thereof 有权

    公开(公告)号：US20220077323A1

    公开(公告)日：2022-03-10

    申请号：US17528471

    申请日：2021-11-17

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Shunpei Yamazaki

    IPC: H01L29/786 ,  G06K19/077 ,  H01L27/105 ,  H01L27/12 ,  H04W88/02 ,  H01L29/423 ,  H01L29/66 ,  H01L27/146

    Abstract: A minute transistor is provided. A transistor with low parasitic capacitance is provided. A transistor having high frequency characteristics is provided. A semiconductor device including the transistor is provided. The semiconductor device includes an oxide semiconductor; a second insulator; a first conductor and a first insulator that are embedded in the second insulator; a second conductor; a third conductor; and a third insulator covering the oxide semiconductor. The oxide semiconductor includes a region where an angle formed between a plane that is parallel to a bottom surface of the oxide semiconductor and the side surface of the oxide semiconductor is greater than or equal to 30° and less than or equal to 60°.

    Semiconductor device and method for manufacturing semiconductor device
    129.
    发明授权
    Semiconductor device and method for manufacturing semiconductor device 有权

    公开(公告)号：US11264511B2

    公开(公告)日：2022-03-01

    申请号：US16968796

    申请日：2019-02-19

    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

    Inventor： Shunpei Yamazaki ,  Haruyuki Baba ,  Shiori Murayama

    IPC: H01L29/786 ,  H01L27/105 ,  H01L27/12 ,  H01L29/24 ,  H01L21/02 ,  H01L29/66

    Abstract: A semiconductor device with high on-state current is provided.
    The semiconductor device includes a transistor. The transistor includes a first insulator; a first oxide over the first insulator; a second oxide over the first oxide; a third oxide; a first conductor and a second conductor over the second oxide; a second insulator; a third conductor; a fourth insulator over the first conductor and the second conductor; and a third insulator over the fourth insulator. An opening reaching the second oxide is provided in the third insulator and the fourth insulator. The third oxide is positioned to cover an inner wall of the opening. The second insulator is positioned to cover the inner wall of the opening with the third oxide therebetween. The third conductor is positioned to fill the opening with the third oxide and the second insulator therebetween. In the channel length direction of the transistor, an angle formed by a bottom surface of the first insulator and a side surface of the first conductor facing the second conductor is smaller than 90°.

    Addition method, semiconductor device, and electronic device
    130.
    发明授权
    Addition method, semiconductor device, and electronic device 有权

    公开(公告)号：US11262981B2

    公开(公告)日：2022-03-01

    申请号：US16649948

    申请日：2018-11-05

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Shunpei Yamazaki ,  Hajime Kimura ,  Takahiro Fukutome

    IPC: G06F7/499 ,  G06F7/501 ,  G06F7/57 ,  G06F9/30

    Abstract: An adder circuit inhibiting overflow is provided. A first memory, a second memory, a third memory, and a fourth memory are included. A step of supplying first data with a sign to the first memory and supplying the first data with a positive sign stored in the first memory, to the second memory; a step of supplying the first data with a negative sign stored in the second memory, to the third memory; a step of generating second data by adding the first data with a positive sign stored in the second memory and the first data with a negative sign stored in the third memory; and a step of storing the second data in the fourth memory are included. When the second data stored in the fourth memory are all second data with a positive sign or all second data with a negative sign, all the second data stored in the fourth memory are added.

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