公开(公告)号：US08953290B2

公开(公告)日：2015-02-10

申请号：US13955112

申请日：2013-07-31

Applicant: STMicroelectronics (Tours) SAS

Inventor： Olivier Ory ,  Eric Laconde

IPC: H02H9/00 ,  H01L23/62 ,  H01L27/02

CPC classification number: H01L23/62 ,  H01L27/0255 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A device for protecting an integrated circuit against overvoltages, the device being formed inside and on top of a semiconductor substrate of a first conductivity type and including: a capacitor including a well of the second conductivity type penetrating into the substrate and trenches with insulated walls formed in the well and filled with a conductive material; and a zener diode formed by the junction between the substrate and the well.

Abstract translation: 一种用于保护集成电路免受过电压的装置，该装置形成在第一导电类型的半导体衬底的内部和顶部，并且包括：电容器，包括穿透到衬底中的第二导电类型的阱和形成有绝缘壁的沟槽 在井中充满导电材料; 以及由衬底和阱之间的接合部形成的齐纳二极管。

公开(公告)号：US20140370373A1

公开(公告)日：2014-12-18

申请号：US14475018

申请日：2014-09-02

Applicant: STMicroelectronics (Tours) SAS

Inventor： Patrick Hougron

IPC: B29C45/14 ,  B29D99/00 ,  H01M2/02

CPC classification number: B29C45/14336 ,  B29D99/0053 ,  B29L2031/3468 ,  H01M2/0207 ,  H01M2/0212 ,  H01M2/0215 ,  H01M2/026 ,  H01M2/0267 ,  H01M2/027 ,  H01M2/0275 ,  H01M2/0277 ,  H01M2/0404 ,  H01M10/0404 ,  H01M10/0436 ,  H01M2220/30

Abstract: A method for encapsulating a device, such as an battery, having two opposite and parallel main faces and a peripheral edge, wherein one main face includes an electrical contact zone, includes the steps of retaining the device within an injection chamber of a mold and injecting encapsulation material into the injection chamber to overmold an encapsulation block on the device. The injection chamber is configured to hold a portion of the device, adjacent its peripheral edge, so as to center the device within the injection chamber. The mold includes centering structures that at least partially cover the electrical contact zone. Opposite positioning studs protrude into the injection chamber and bear on the opposite main faces of the device. The resulting packaged device includes an overmolded encapsulation block enveloping the device except for portions covered by the centering structure.

Abstract translation: 一种用于封装诸如电池的装置的方法，其具有两个相对并且平行的主面和周边边缘，其中一个主面包括电接触区，包括以下步骤：将所述装置保持在模具的注射室内并注射 封装材料进入注射室以覆盖设备上的封装块。 注射室被构造成保持装置的一部分邻近其周边边缘，以使装置在注射室内居中。 模具包括至少部分地覆盖电接触区域的定心结构。 相对的定位柱突出到注射室中，并承载在装置的相对的主面上。 所得到的封装装置包括包覆成型的封装块，其包围该装置，除了由对中结构覆盖的部分。

公开(公告)号：US08912566B2

公开(公告)日：2014-12-16

申请号：US13658670

申请日：2012-10-23

Applicant: Yannick Hague

Inventor： Yannick Hague

IPC: H01L29/66 ,  H01L29/747 ,  H01L29/74 ,  H01L29/06

CPC classification number: H01L29/747 ,  H01L29/0638 ,  H01L29/0692 ,  H01L29/7428

Abstract: A gate amplification triac including in a semiconductor substrate of a first conductivity type a vertical triac and a lateral bipolar transistor having its emitter connected to the triac gate, its base connected to a control terminal, and its collector connected to a terminal intended to be connected to a first reference voltage, the main terminal of the triac on the side of the transistor being intended to be connected to a second reference voltage, the transistor being formed in a first well of the second conductivity type and the triac comprising on the transistor side a second well of the second conductivity type, the first and second wells being formed so that the substrate-well breakdown voltage of the transistor is greater than the substrate-well breakdown voltage of the triac by at least the difference between the first and second reference voltages.

Abstract translation: 一种栅极放大三端双向可控硅开关元件，包括在第一导电类型的半导体衬底中的垂直三端双向可控硅开关元件和横向双极晶体管，其发射极连接到三端双向可控硅开关栅极，其基极连接到控制端子，并且其集电极连接到要连接的端子 在第一参考电压下，晶体管侧面上的三端双向可控硅开关的主端子将被连接到第二参考电压，晶体管形成在第二导电类型的第一阱中，并且三端双向可控硅开关元件包括在晶体管侧 第二导电类型的第二阱，第一阱和第二阱形成为使得晶体管的衬底井击穿电压大于三端双向可控硅开关元件的衬底 - 阱击穿电压至少第一和第二参考点之间的差值 电压。

公开(公告)号：US08878494B2

公开(公告)日：2014-11-04

申请号：US13303925

申请日：2011-11-23

Applicant: Frédéric Cantin ,  Nicolas Debeaupte

Inventor： Frédéric Cantin ,  Nicolas Debeaupte

IPC: H01M10/44 ,  H01M10/46 ,  H02H7/18 ,  H02J7/00 ,  H02H3/24

CPC classification number: H02H7/18 ,  H02H3/24 ,  H02J7/0031

Abstract: A method for protecting a thin-layer battery, including the steps of: periodically operating the battery at a forced discharge current, which is a function of temperature; and disconnecting the battery as soon as the voltage across it reaches a threshold, said threshold being greater than its critical voltage for a maximum discharge current under a maximum temperature.

Abstract translation: 一种用于保护薄层电池的方法，包括以下步骤：以强度放电电流周期性地操作电池，该强制放电电流是温度的函数; 并且一旦所述电池的电压达到阈值，则断开所述电池，所述阈值大于其在最大温度下的最大放电电流的临界电压。

公开(公告)号：US08797121B2

公开(公告)日：2014-08-05

申请号：US13228178

申请日：2011-09-08

Applicant: Hilal Ezzeddine ,  Claire Laporte

Inventor： Hilal Ezzeddine ,  Claire Laporte

IPC: H01P5/12 ,  H01P3/08

CPC classification number: H01P5/185 ,  H01L2224/16245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00014

Abstract: A distributed coupler including a first line intended to convey a radio signal between its two ends and a second line intended to sample, by coupling, part of the signal, wherein: one of the lines is formed on an insulating substrate; and the other line is formed in a lead frame supporting the substrate, one line being above the other.

Abstract translation: 一种分布式耦合器，包括用于在其两端之间传送无线电信号的第一线和用于通过耦合所述信号的一部分来采样的第二线，其中：所述线中的一条形成在绝缘基板上; 并且另一条线形成在支撑基板的引线框架中，一条线在另一条线之上。

公开(公告)号：US08785970B2

公开(公告)日：2014-07-22

申请号：US13104254

申请日：2011-05-10

Applicant: Samuel Menard

Inventor： Samuel Menard

IPC: H01L29/66

CPC classification number: H01L29/747 ,  H01L29/1012 ,  H01L29/66386 ,  H01L29/872

Abstract: A bidirectional switch controllable by a voltage between its gate and rear electrode and including an N-type semiconductor substrate surrounded with a P-type well; on the front surface side, a P-type well in which is formed a first N-type region; on the rear surface side, a P-type layer in which is formed a second N-type region. The well is doped to less than 1016 at./cm3, the exposed surfaces of this well being heavily P-type doped. At least a third P-type region, of same doping level as the well, is formed on the front surface side in the substrate, and contains at least a fourth N-type region of a doping level lower than 1017 at./cm3, on which is formed a Schottky contact.

Abstract translation: 双向开关，其栅极和后电极之间的电压可控，并且包括用P型阱包围的N型半导体衬底; 在前表面侧形成有P型阱，其中形成有第一N型区域; 在后表面侧形成有形成第二N型区域的P型层。 该阱被掺杂到小于1016at./cm3，该阱的暴露表面是重P型掺杂的。 至少在衬底的前表面侧形成与阱相同的掺杂水平的第三P型区域，并且至少含有低于1017at./cm3的掺杂水平的第四N型区域， 其上形成肖特基接触。

公开(公告)号：US08784511B2

公开(公告)日：2014-07-22

申请号：US12877344

申请日：2010-09-08

Applicant: Pierre Bouillon

Inventor： Pierre Bouillon

IPC: H01M10/04 ,  H01M4/04

CPC classification number: H01M10/0436 ,  H01M4/0421 ,  H01M4/0423 ,  H01M4/525 ,  H01M4/5815 ,  H01M4/661 ,  H01M10/0525 ,  H01M10/0562 ,  H01M10/0585 ,  H01M2010/0495 ,  Y10T29/49108

Abstract: A method for forming a lithium-ion type battery including the steps of forming, over an at least locally conductive substrate, an insulating layer having a through opening; successively and conformally depositing a stack comprising a cathode collector layer, a cathode layer, an electrolyte layer, and an anode layer, this stack having a thickness smaller than the thickness of the insulating layer; forming, over the structure, an anode collector layer filling the space remaining in the opening; and planarizing the structure to expose the upper surface of the insulating layer.

Abstract translation: 一种形成锂离子型电池的方法，包括以下步骤：在至少局部导电的衬底上形成具有通孔的绝缘层; 依次共形沉积包括阴极集电体层，阴极层，电解质层和阳极层的叠层，该堆叠的厚度小于绝缘层的厚度; 在结构上形成填充剩余在开口中的空间的阳极收集层; 并且平坦化结构以暴露绝缘层的上表面。

公开(公告)号：US08704270B2

公开(公告)日：2014-04-22

申请号：US13210830

申请日：2011-08-16

Applicant: Samuel Menard ,  Yannick Hague

Inventor： Samuel Menard ,  Yannick Hague

IPC: H01L29/66

CPC classification number: H01L29/66121 ,  H01L23/62 ,  H01L29/87 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A Shockley diode including: a vertical stack of first to fourth layers of alternated conductivity types between first and second electrodes; a recess formed in the fourth layer and extending vertically to penetrate into the second layer; a first region of same conductivity type as the second layer but of greater doping level, extending at the bottom of the recess in the second layer; and a second region of same conductivity type as the third layer but of greater doping level, extending along the lateral walls of the recess and connecting the first region to the fourth layer.

Abstract translation: 一种Shockley二极管，包括：在第一和第二电极之间的交替导电类型的第一至第四层的垂直堆叠; 形成在第四层中并垂直延伸以渗入第二层的凹陷; 与第二层相同的导电类型的第一区域，但具有较大的掺杂水平的第一区域，在第二层的凹槽的底部延伸; 以及与所述第三层相同的导电类型的第二区域，但具有较大的掺杂水平，沿所述凹槽的侧壁延伸并将所述第一区域连接到所述第四层。

公开(公告)号：US20140021872A1

公开(公告)日：2014-01-23

申请号：US14032561

申请日：2013-09-20

Applicant: STMicroelectronics (Tours) SAS

Inventor： Laurent Gonthier ,  Antoine Passal

IPC: H05B33/08

CPC classification number: H05B33/0818 ,  H05B33/0815 ,  H05B39/044 ,  Y02B20/19 ,  Y02B20/348

Abstract: A circuit capable of receiving, in series with at least one light-emitting diode, a rectified A.C. voltage, comprising: a first gate turn-off thyristor connected to first and second terminals of the circuit; and a control circuit for turning off the first thyristor when the voltage between the first and second terminals exceeds a threshold.

Abstract translation: 一种能够与至少一个发光二极管串联接收整流的交流电压的电路，包括：连接到电路的第一和第二端子的第一栅极截止晶闸管; 以及用于当第一和第二端子之间的电压超过阈值时关闭第一晶闸管的控制电路。

公开(公告)号：US20130320395A1

公开(公告)日：2013-12-05

申请号：US13901494

申请日：2013-05-23

Applicant: Universite Francois Rabelais ,  STMicroelectronics (Tours) SAS

Inventor： Samuel Menard ,  Gaël Gautier

IPC: H01L29/74

CPC classification number: H01L29/74 ,  H01L29/0646 ,  H01L29/0649 ,  H01L29/0661 ,  H01L29/66386 ,  H01L29/747

Abstract: A vertical power component including: a silicon substrate of a first conductivity type; on the side of a lower surface of the substrate supporting a single electrode, a lower layer of the second conductivity type; and on the side of an upper surface of the substrate supporting a conduction electrode and a gate electrode, an upper region of the second conductivity type, wherein the component periphery includes, on the lower surface side, a porous silicon insulating ring penetrating into the substrate down to a depth greater than that of the lower layer.

Abstract translation: 一种垂直功率分量，包括：第一导电类型的硅衬底; 在支撑单个电极的基板的下表面侧，具有第二导电类型的下层; 并且在支撑导电电极和栅电极的基板的上表面侧，具有第二导电类型的上部区域，其中，所述元件周边在下表面上包括穿入基板的多孔硅绝缘环 下降到比下层更深的深度。