公开(公告)号：US06754387B1

公开(公告)日：2004-06-22

申请号：US09666689

申请日：2000-09-21

Applicant: Rajendra Kumar Bera

Inventor： Rajendra Kumar Bera

IPC: G06K900

CPC classification number: G06K9/48

Abstract: A method for processing information about a polygonal pattern in the context of pattern recognition in a computer environment, the method comprising the steps of: (a) taking the corners of the pattern in turn in order from a first of the corners through the last of the corners, forming a first ordered sequence M of values representing the respective scalar distances between each corner of the polygonal pattern and each other corner, the sequence including (i) the distances between said first of said corners and each other corner in turn and (ii) taking each other corner in turn, the distances between that other corner and each other corner starting with the said first corner, and (iii) including at appropriate positions in the sequence zero values to correspond to the distance between each corner and itself; (b) re-ordering the values of said first sequence M to form a second ordered sequence P1 comprising a set of values p1 which includes for each corner starting with said first corner, values in a series starting with and including the said zero value for that corner and including the other values for that corner in one direction through, the order in which they appear in said first sequence; and (c) converting said values in the second ordered sequence P1 to respective equal-length character strings representative of the values.

Abstract translation: 一种用于在计算机环境中在模式识别的上下文中处理关于多边形图案的信息的方法，所述方法包括以下步骤：（a）依次从第一个角落到最后一个角落 形成角度，形成表示多边形图案的每个角和彼此角之间的相应标量距离的值的第一有序序列M，该序列包括（i）所述第一角和第二角之间的距离，以及（ ii）依次采取彼此的角落，从所述第一角开始的另一角和彼此的角度之间的距离，以及（iii）在序列零值中的适当位置处包括对应于每个角与自身之间的距离; （b）重新排序所述第一序列M的值以形成包括一组值p1的第二有序序列P1，所述值p1包括对于从所述第一角开始的每个角， 一个起始于并包括该角的所述零值的系列的值，并且包括在一个方向上的该角的其他值，它们出现在所述第一个序列中的顺序; 以及（c）将所述第二有序序列P1中的值转换为表示所述值的相应的等长字符串。

公开(公告)号：US06678790B1

公开(公告)日：2004-01-13

申请号：US08871295

申请日：1997-06-09

Applicant: Rajendra Kumar

Inventor： Rajendra Kumar

IPC: G06F1206

CPC classification number: G06F12/0802 ,  G06F2212/2515 ,  G06F2212/601

Abstract: An integrated circuit having a memory which is reconfigurable as a main memory or as a cache. The integrated circuit may be a microprocessor chip with a memory that is reconfigurable to operate as an on-chip main memory or as an on-chip cache. Alternatively, the integrated circuit may be a stand-alone memory chip that is reconfigurable to operate as a main memory or as a cache.

Abstract translation: 具有可重新配置为主存储器或高速缓存的存储器的集成电路。 集成电路可以是具有可重新配置以作为片上主存储器或作为片上高速缓存操作的存储器的微处理器芯片。 或者，集成电路可以是可重新配置以用作主存储器或高速缓存的独立存储器芯片。

公开(公告)号：US06378029B1

公开(公告)日：2002-04-23

申请号：US09295668

申请日：1999-04-21

Applicant: Padmanabha I. Venkitakrishnan ,  Gopalakrishnan Janakiraman ,  Tsen-Gong Jim Hsu ,  Rajendra Kumar

Inventor： Padmanabha I. Venkitakrishnan ,  Gopalakrishnan Janakiraman ,  Tsen-Gong Jim Hsu ,  Rajendra Kumar

IPC: G06F1300

CPC classification number: G06F13/4243

Abstract: A distributed shared memory multi-processor system includes a System Control Unit (SCU) which is made up of a system control unit address section (SCUA) and system control unit data sections (SCUDs). The SCU is scalable by dividing the control and data flow functions of the SCU, and then parallelizing the data path. This allows the number of processors in the system to be increased or higher performance processors to be added by increasing the number of SCUDs and reprogramming crossbar switches incorporated in the SCUA and SCUDs. This results in the overall increase of the multi-processor system performance.

Abstract translation: 分布式共享存储器多处理器系统包括由系统控制单元地址部分（SCUA）和系统控制单元数据部分（SCUD）组成的系统控制单元（SCU）。 通过划分SCU的控制和数据流功能，然后并行化数据路径，SCU是可扩展的。 这样就可以通过增加SCUD和SCUA中SCUD和SCU的重新编程交叉开关来增加系统中的处理器数量或增加性能处理器。 这导致多处理器系统性能的总体增长。

公开(公告)号：US06359003B1

公开(公告)日：2002-03-19

申请号：US09719189

申请日：2000-12-08

Applicant: Rajendra Kumar Joshi ,  Hans-Peter Strebel

Inventor： Rajendra Kumar Joshi ,  Hans-Peter Strebel

IPC: A61K31225

CPC classification number: A61K31/225 ,  A61K2300/00

Abstract: The invention relates to the use of certain fumaric acid monoalkyl esters as salts or a free acid either alone or in combination with a dialkyl fumarate for producing pharmaceutical preparations for use in transplantation medicine, especially for treating, alleviating or suppressing host-versus-graft reactions. For this purpose, the fumaric acid monoalkyl esters may be used in combination with preparations conventionally used in transplantation medicine and immuno suppressives, especially such as cyclosporines.

Abstract translation: 本发明涉及某些富马酸单烷基酯作为盐或游离酸单独使用或与富马酸二烷基酯组合用于制备用于移植药物的药物制剂，特别是用于治疗，减轻或抑制宿主对移植物反应 。 为此，富马酸单烷基酯可以与常规用于移植医学和免疫抑制剂，特别是环孢菌素的制剂组合使用。

公开(公告)号：US06355676B1

公开(公告)日：2002-03-12

申请号：US09743978

申请日：2001-01-17

Applicant: Rajendra Kumar Joshi ,  Hans-Peter Strebel

Inventor： Rajendra Kumar Joshi ,  Hans-Peter Strebel

IPC: A61K31315

CPC classification number: A61K31/22 ,  A61K9/2054 ,  A61K9/2059 ,  A61K9/2866 ,  A61K9/4858 ,  A61K2300/00

Abstract: The present invention relates to the use of one or more salts of fumaric acid monoalkyl esters of the general formula optionally in admixture with dialkyl fumarate of the formula wherein A is a bivalent cation from the series consisting of Ca, Mg, Zn or Fe or a monovalent cation from the series Li, Na or K, respectively, and n denotes the numeral 1 or 2 depending on the type of cation, and, optionally, commonly used pharmaceutical excipients and vehicles for preparing a pharmaceutical composition in the form of micro-tablets or micro-pellets for the treatment of psoriatic arthritis, neurodermatitis, psoriasis and enteritis regionalis Crohn.

Abstract translation: 本发明涉及通式1的富马酸单烷基酯的一种或多种盐与马来酰亚胺的富马酸二烷基酯的混合物的使用A是由Ca，Mg，Zn或Fe组成的一系列的二价阳离子或一价阳离子 分别为Li，Na或K系列，n为取决于阳离子类型的数字1或2，以及任选的通常使用的药物赋形剂和载体，用于制备微片或微型形式的药物组合物 用于治疗牛皮癣关节炎，神经性皮炎，牛皮癣和肠炎的小肠 - 克罗恩病。

公开(公告)号：US6072401A

公开(公告)日：2000-06-06

申请号：US950212

申请日：1997-10-14

Applicant: Rajendra Kumar

Inventor： Rajendra Kumar

IPC: G04G11/00 ,  G04G19/00 ,  H04B1/40 ,  H04M1/65 ,  H04M1/656 ,  H04Q19/02

CPC classification number: G04G11/00 ,  G04G19/00 ,  H04M1/6505 ,  H04M1/656 ,  H04M1/72502

Abstract: A portable device (10) for selective message recordation and playback and scheduling includes a portable unit (11) and an optional homebase station (12). Portable unit (11) includes a housing (15), unit controller (20), tactile input mechanism (40), audio processor (60) and video processor (80). Portable unit (11) allows textual, audible and visual message inputs and their selective playback based on time or other preselected textual, audible or visual stimulus. A selectively detachable stylus (51) may be removed to engage a touch panel (50) for making operational selections and entering information. Optional homebase station (12) may include a variety of features for supporting and supplementing those of handheld unit (11), such as a floppy drive (112) message memory, input keys (114), a battery charging circuit (115) and an external communication circuit (117).

Abstract translation: 用于选择性消息记录和回放和调度的便携式设备（10）包括便携式单元（11）和可选的本地基站（12）。 便携式单元（11）包括壳体（15），单元控制器（20），触觉输入机构（40），音频处理器（60）和视频处理器（80）。 便携式单元（11）允许基于时间或其他预选的文本，声音或视觉刺激的文本，声音和视觉信息输入及其选择性播放。 可以移除可选择性地拆卸的触笔（51）以接合用于进行操作选择和输入信息的触摸面板（50）。 可选的本地基站（12）可以包括用于支持和补充手持单元（11）的各种特征，诸如软盘驱动器（112）消息存储器，输入键（114），电池充电电路（115）和 外部通信电路（117）。

公开(公告)号：US5737750A

公开(公告)日：1998-04-07

申请号：US762539

申请日：1996-12-09

Applicant: Rajendra Kumar ,  Paul Gene Emerson

Inventor： Rajendra Kumar ,  Paul Gene Emerson

IPC: G06F9/38 ,  G06F12/08

CPC classification number: G06F9/3804 ,  G06F12/0848

Abstract: A cache memory which is partitioned during write operations into several regions in a programmable or adaptive manner is disclosed. Each region is used to store a different type of data. The partitioning of the cache memory has no effect during read operations. The partitioning can be achieved dynamically for improved optimization. The partitioned cache is particularly suited for an instruction cache wherein one of the regions stores sequential instructions and another region stores branch target instructions. However, the partitioned cache is also useful for a data cache.

Abstract translation: 公开了一种以可编程或自适应方式在写入操作期间划分成若干区域的缓存存储器。 每个区域用于存储不同类型的数据。 高速缓冲存储器的分区在读取操作期间不起作用。 动态分割可以实现优化。 分区高速缓存特别适合于指令高速缓存，其中一个区域存储顺序指令，而另一区域存储分支目标指令。 但是，分区缓存对于数据高速缓存也是有用的。

公开(公告)号：US5638257A

公开(公告)日：1997-06-10

申请号：US699483

申请日：1996-08-19

Applicant: Rajendra Kumar ,  John W. Morrison, II

Inventor： Rajendra Kumar ,  John W. Morrison, II

IPC: G06F1/16 ,  H04M1/02 ,  H05K7/02

CPC classification number: H04M1/0225 ,  G06F1/1622 ,  G06F1/1626 ,  G06F1/1632 ,  G06F2200/1634 ,  H04M1/0231 ,  H04M2250/22

Abstract: A device (10) adding apparatus as a keyboard input to a handheld computer (12) lacking such input (such as pen computers and personal digital assistants) includes a keyboard (11) and a planar motion pivot mechanism (30). Planar motion pivot mechanism (30) includes a body (31) formed as a boot that encloses an end of the handheld computer (12), and a pivot pin (32). The user simply rotates keyboard (11) from a nonoperational position substantially covering the handheld computer display (14), to an operational position at substantially a right angle to the display (14).

Abstract translation: 将装置（10）作为键盘输入添加到缺少这种输入的手持式计算机（12）（诸如笔式计算机和个人数字助理）中的装置包括键盘（11）和平面运动枢转机构（30）。 平面运动枢转机构（30）包括形成为围绕手持式计算机（12）的端部的引导件的主体（31）和枢轴销（32）。 用户简单地将键盘（11）从基本覆盖手持式计算机显示器（14）的非操作位置旋转到与显示器（14）基本成直角的操作位置。

公开(公告)号：US5548477A

公开(公告)日：1996-08-20

申请号：US379254

申请日：1995-01-27

Applicant: Rajendra Kumar ,  John W. Morrison, II

Inventor： Rajendra Kumar ,  John W. Morrison, II

IPC: G06F1/16 ,  H04M1/02 ,  H05K7/02

CPC classification number: H04M1/0225 ,  G06F1/1622 ,  G06F1/1626 ,  G06F1/1632 ,  G06F2200/1634 ,  H04M1/0231 ,  H04M2250/22

Abstract: A device (10) adding keyboard input to a handheld computer (12) lacking such input (such as pen computers and personal digital assistants) includes a keyboard (11) and a planar motion pivot mechanism (30). Planar motion pivot mechanism (30) includes a body (31) formed as a boot that encloses an end of the handheld computer (12), and a pivot pin (32). The user simply rotates keyboard (11) from a nonoperational position substantially covering the handheld computer display (14), to an operational position at substantially a right angle to the display (14).

Abstract translation: 将键盘输入添加到缺少这样的输入的手持式计算机（12）（例如笔式计算机和个人数字助理）的设备（10）包括键盘（11）和平面运动枢转机构（30）。 平面运动枢转机构（30）包括形成为围绕手持式计算机（12）的端部的引导件的主体（31）和枢轴销（32）。 用户简单地将键盘（11）从基本覆盖手持式计算机显示器（14）的非操作位置旋转到与显示器（14）基本成直角的操作位置。

公开(公告)号：US5513363A

公开(公告)日：1996-04-30

申请号：US293862

申请日：1994-08-22

Applicant: Rajendra Kumar ,  Paul G. Emerson

Inventor： Rajendra Kumar ,  Paul G. Emerson

IPC: G06F9/30 ,  G06F9/38 ,  G11C8/16 ,  G06F9/00

CPC classification number: G06F9/30141 ,  G06F9/3012 ,  G06F9/3875 ,  G11C8/16

Abstract: A scalable register file including first and second micro-register files organized in a pipelined fashion to minimize the access time of the register file where there are a large number of registers or multiple functional units. Interposed between the first and second micro-register files are a first plurality of pipeline registers for storing the register contents fetched from the first micro-register file during a first pipeline cycle. A second plurality of pipeline registers are coupled to the second micro-register files for storing the register contents fetched from the second micro-register file during a second pipeline stage and those registers being stored in the first plurality of pipeline registers. The first plurality of pipeline registers are coupled to the bit lines of the second micro-register file. Enable logic is coupled to each of the first plurality pipeline registers to selectively present the contents of the first plurality of pipeline register to the second plurality of pipeline registers if there were contents stored in a first pipeline register during the first pipeline cycle. Alternatively, a multiplexer can be used to present the register contents stored in the first plurality of pipeline registers to the second plurality of pipeline registers.

Abstract translation: 一种可扩展的寄存器文件，包括以流水线方式组织的第一和第二微寄存器文件，以最小化寄存器文件的存储时间，其中存在大量寄存器或多个功能单元。 介于第一和第二微寄存器文件之间的是第一多个流水线寄存器，用于存储在第一流水线循环期间从第一微寄存器文件获取的寄存器内容。 第二多个流水线寄存器耦合到第二微寄存器文件，用于存储在第二流水线级期间从第二微寄存器文件获取的寄存器内容，并且这些寄存器被存储在第一多个流水线寄存器中。 第一组多个流水线寄存器耦合到第二微寄存器堆的位线。 如果在第一流水线循环期间存在第一流水线寄存器中的内容，则启用逻辑被耦合到第一多个流水线寄存器中的每一个，以便有选择地将第一多个流水线寄存器的内容呈现给第二多个流水线寄存器。 或者，可以使用多路复用器将存储在第一多个流水线寄存器中的寄存器内容呈现给第二多个流水线寄存器。