Electronic Device Display With Charge Accumulation Tracker

    公开(公告)号:US20180366078A1

    公开(公告)日:2018-12-20

    申请号:US16113132

    申请日:2018-08-27

    Applicant: Apple Inc.

    Abstract: An electronic device may generate content that is to be displayed on a display. The display may have an array of liquid crystal display pixels for displaying image frames of the content. The image frames may be displayed with positive and negative polarities to help reduce charge accumulation effects. A charge accumulation tracker may analyze the image frames to determine when there is a risk of excess charge accumulation. The charge accumulation tracker may analyze information on gray levels, frame duration, and frame polarity. The charge accumulation tracker may compute a charge accumulation metric for entire image frames or may process subregions of each frame separately. When subregions are processed separately, each subregion may be individually monitored for a risk of excess charge accumulation.

    Electronic device display with charge accumulation tracker

    公开(公告)号:US10102815B2

    公开(公告)日:2018-10-16

    申请号:US15890517

    申请日:2018-02-07

    Applicant: Apple Inc.

    Abstract: An electronic device may generate content that is to be displayed on a display. The display may have an array of liquid crystal display pixels for displaying image frames of the content. The image frames may be displayed with positive and negative polarities to help reduce charge accumulation effects. A charge accumulation tracker may analyze the image frames to determine when there is a risk of excess charge accumulation. The charge accumulation tracker may analyze information on gray levels, frame duration, and frame polarity. The charge accumulation tracker may compute a charge accumulation metric for entire image frames or may process subregions of each frame separately. When subregions are processed separately, each subregion may be individually monitored for a risk of excess charge accumulation.

    INTRA-FRAME PREDICTION SYSTEMS AND METHODS
    138.
    发明申请

    公开(公告)号:US20170214912A1

    公开(公告)日:2017-07-27

    申请号:US15004479

    申请日:2016-01-22

    Applicant: Apple Inc.

    Abstract: System and method for improving operational efficiency of a video encoding pipeline, which includes a mode decision block that selects a luma intra-frame prediction mode used to encode a luma component of the source image data and a chroma reconstruction block that determines a first distortion expected to result in a first chroma transform block when each of a plurality of candidate chroma intra-frame prediction modes is implemented based on reconstructed image data, determines a second distortion expected to result in a second chroma transform block of the prediction unit when each of the plurality of candidate chroma intra-frame prediction modes is implemented based at least in part on the source image data, and selects a chroma intra-frame prediction mode used to encode a chroma component from the plurality of candidate chroma intra-frame prediction modes based at least in part on the first distortion and the second distortion.

    Data storage and access in block processing pipelines
    140.
    发明授权
    Data storage and access in block processing pipelines 有权
    块处理管道中的数据存储和访问

    公开(公告)号:US09571846B2

    公开(公告)日:2017-02-14

    申请号:US14039764

    申请日:2013-09-27

    Applicant: Apple Inc.

    CPC classification number: H04N19/423 H04N19/53

    Abstract: Block processing pipeline methods and apparatus in which reference data are stored to a memory according to tile formats to reduce memory accesses when fetching the data from the memory. When the pipeline stores reference data from a current frame being processed to memory as a reference frame, the reference samples are stored in macroblock sequential order. Each macroblock sample set is stored as a tile. Reference data may be stored in tile formats for luma and chroma. Chroma reference data may be stored in tile formats for chroma 4:2:0, 4:2:2, and/or 4:4:4 formats. A stage of the pipeline may write luma and chroma reference data for macroblocks to memory according to one or more of the macroblock tile formats in a modified knight's order. The stage may delay writing the reference data from the macroblocks until the macroblocks have been fully processed by the pipeline.

    Abstract translation: 块处理管道方法和装置,其中参考数据根据瓦片格式存储到存储器中,以在从存储器取出数据时减少存储器访问。 当流水线将正在处理的当前帧的参考数据存储为参考帧时,参考样本以宏块顺序存储。 每个宏块样本集被存储为一个图块。 参考数据可以以瓦片和色度的瓦片格式存储。 色度参考数据可以以瓦4:2:0,4:2:2和/或4:4:4格式的瓦片格式存储。 流水线的一个阶段可以根据改进的骑士顺序中的一个或多个宏块瓦片格式将宏块的亮度和色度参考数据写入存储器。 该阶段可以延迟从宏块写入参考数据,直到宏块已被管道完全处理。

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