公开(公告)号：US07795755B2

公开(公告)日：2010-09-14

申请号：US12222245

申请日：2008-08-06

Applicant: Isaac Y. Chen ,  Chien-Fu Tang

Inventor： Isaac Y. Chen ,  Chien-Fu Tang

IPC: H02J1/10

CPC classification number: H02J1/102 ,  Y10T307/549 ,  Y10T307/555

Abstract: A power converter system includes multiple converter modules connected to a share bus. Each of the converter modules mirrors the phase current of itself to provide a mirror current to the share bus, extracts an average current from the share bus, and compares the phase current of itself with the average current it extracts from the share bus to produce an output signal for modulation of the phase current of itself. Specifically, each of the converter modules is provided with a resistor connected to the share bus such that all the resistors are connected in parallel, and thus each of the resistors automatically receives an average current from the share bus.

Abstract translation: 电力转换器系统包括连接到共享总线的多个转换器模块。 每个转换器模块反映其自身的相电流以向共享总线提供镜电流，从共享总线提取平均电流，并将其自身的相电流与从共享总线提取的平均电流进行比较，以产生 输出信号，用于调制其自身的相电流。 具体地说，每个转换器模块设置有连接到共享总线的电阻器，使得所有电阻器并联连接，因此每个电阻器自动从共享总线接收平均电流。

公开(公告)号：US07768033B2

公开(公告)日：2010-08-03

申请号：US12385720

申请日：2009-04-17

Applicant: Liang-Pin Tai ,  Jing-Meng Liu ,  Hung-Der Su

Inventor： Liang-Pin Tai ,  Jing-Meng Liu ,  Hung-Der Su

IPC: H01L29/74 ,  H01L31/111

CPC classification number: H01L27/098 ,  H01L27/0744 ,  H01L29/7722 ,  H01L29/8083

Abstract: A single-chip common-drain JFET device comprises a drain, two gates and two source arranged such that two common-drain JFETs are formed therewith. Due to the two JFETs merged within a single chip, no wire bonding connection is needed therebetween, thereby without parasitic inductance and resistance caused by bonding wire, and therefore improving the performance and reducing the package cost. The single-chip common-drain JFET device may be applied in buck converter, boost converter, inverting converter, switch, and two-step DC-to-DC converter to improve their performance and efficiency. Alternative single-chip common-drain JFET devices are also provided for current sense or proportional current generation.

公开(公告)号：US07759695B2

公开(公告)日：2010-07-20

申请号：US12385717

申请日：2009-04-17

Applicant: Liang-Pin Tai ,  Jing-Meng Liu ,  Hung-Der Su

Inventor： Liang-Pin Tai ,  Jing-Meng Liu ,  Hung-Der Su

IPC: H01L29/74 ,  H01L31/111

CPC classification number: H01L27/098 ,  H01L27/0744 ,  H01L29/7722 ,  H01L29/8083

Abstract: A single-chip common-drain JFET device comprises a drain, two gates and two source arranged such that two common-drain JFETs are formed therewith. Due to the two JFETs merged within a single chip, no wire bonding connection is needed therebetween, thereby without parasitic inductance and resistance caused by bonding wire, and therefore improving the performance and reducing the package cost. The single-chip common-drain JFET device may be applied in buck converter, boost converter, inverting converter, switch, and two-step DC-to-DC converter to improve their performance and efficiency. Alternative single-chip common-drain JFET devices are also provided for current sense or proportional current generation.

Abstract translation: 单芯片公共漏极JFET器件包括漏极，两个栅极和两个源极，使得与其形成两个公共漏极JFET。 由于在单个芯片内合并的两个JFET，其间不需要引线接合连接，因此没有由接合线引起的寄生电感和电阻，因此提高性能并降低封装成本。 单片式公共漏极JFET器件可以应用于降压转换器，升压转换器，反相转换器，开关和两级DC-DC转换器，以提高其性能和效率。 还提供了用于电流感测或比例电流产生的替代单芯片公共漏极JFET器件。

公开(公告)号：US20100165685A1

公开(公告)日：2010-07-01

申请号：US12427164

申请日：2009-04-21

Applicant: Chih-Feng Huang ,  Kuo-Chin Chiu

Inventor： Chih-Feng Huang ,  Kuo-Chin Chiu

IPC: H02M7/217

CPC classification number: H02M1/36 ,  H01L27/085 ,  H02M3/33523

Abstract: A power transistor chip and an application circuit thereof has a junction field effect transistor to act as a start-up circuit of an AC/DC voltage converter. The start-up circuit can be turned off after the PWM circuit of the AC/DC voltage converter operates normally to conserve the consumption of the power. Besides, the junction field effect transistor is built in the power transistor chip. Because the junction field effect transistor is fabricated with the same manufacturing process as the power transistor, it is capable of simplifying the entire process and lowering the production cost due to no additional mask and manufacturing process.

Abstract translation: 功率晶体管芯片及其施加电路具有用作AC / DC电压转换器的启动电路的结型场效应晶体管。 在AC / DC电压转换器的PWM电路正常工作后，启动电路可以关闭，以节省功耗。 此外，结型场效应晶体管内置在功率晶体管芯片中。 由于结型场效应晶体管采用与功率晶体管相同的制造工艺制造，所以能够简化整个工艺并降低生产成本，因为不需要附加的掩模和制造工艺。

公开(公告)号：US20100129962A1

公开(公告)日：2010-05-27

申请号：US12693712

申请日：2010-01-26

Applicant: YU-LIN YANG

Inventor： YU-LIN YANG

IPC: H01L21/60

CPC classification number: H01L23/49575 ,  H01L23/49524 ,  H01L24/37 ,  H01L24/40 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/05554 ,  H01L2224/37599 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/49171 ,  H01L2224/73219 ,  H01L2224/84801 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/14 ,  Y10S257/923 ,  H01L2924/00 ,  H01L2224/37099

Abstract: An electronic package structure and method use a conductive strip to bond die-to-die, die-to-lead, chip carrier-to-lead, or lead-to-lead. A conductive strip may carry greater current than a bonding wire, and thus may replace several bonding wires. The bonding of the conductive strip may be carried out by an SMT process, and thus requires lower cost than wire bonding processes. A conductive strip may be bonded to more than two dice or leads to save more bonding wires. A conductive strip is stronger than a bonding wire, and thus lowers the possibility of being broken.

Abstract translation: 电子封装结构和方法使用导电条来将芯片到管芯，管芯到引线，芯片载体与引线或引线对引线接合。 导电带可以承载比接合线更大的电流，并且因此可以代替多个接合线。 导电带的接合可以通过SMT工艺进行，因此比引线键合工艺要低。 导电条可以结合到多于两个的骰子或导线上以节省更多的接合线。 导电条比接合线更强，从而降低破损的可能性。

公开(公告)号：US20100124801A1

公开(公告)日：2010-05-20

申请号：US12693719

申请日：2010-01-26

Applicant: YU-LIN YANG

Inventor： YU-LIN YANG

IPC: H01L21/60

CPC classification number: H01L23/49575 ,  H01L23/49524 ,  H01L24/37 ,  H01L24/40 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/05554 ,  H01L2224/37599 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/49171 ,  H01L2224/73219 ,  H01L2224/84801 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/14 ,  Y10S257/923 ,  H01L2924/00 ,  H01L2224/37099

Abstract: An electronic package structure and method use a conductive strip to bond die-to-die, die-to-lead, chip carrier-to-lead, or lead-to-lead. A conductive strip may carry greater current than a bonding wire, and thus may replace several bonding wires. The bonding of the conductive strip may be carried out by an SMT process, and thus requires lower cost than wire bonding processes. A conductive strip may be bonded to more than two dice or leads to save more bonding wires. A conductive strip is stronger than a bonding wire, and thus lowers the possibility of being broken.

公开(公告)号：US07656133B2

公开(公告)日：2010-02-02

申请号：US12385020

申请日：2009-03-30

Applicant: Chung-Lung Pai ,  Kwan-Jen Chu ,  Chun-Yen Huang ,  Jing-Meng Liu

Inventor： Chung-Lung Pai ,  Kwan-Jen Chu ,  Chun-Yen Huang ,  Jing-Meng Liu

IPC: H02J7/00

CPC classification number: H05B41/32 ,  H02M3/33507

Abstract: In a capacitor charger including a transformer having a primary winding connected with an input voltage and a secondary winding for transforming a primary current flowing through the primary winding to a secondary current flowing through the secondary winding, the primary current is adjusted according to a monitoring voltage varying with the input voltage, thereby prolonging the lifetime of the battery that provides the input voltage and improving the power efficiency of the battery.

Abstract translation: 在包括具有与输入电压连接的初级绕组的变压器的电容器充电器和用于将流过初级绕组的初级电流变换为流过次级绕组的次级电流的次级绕组的情况下，根据监视电压来调整初级电流 随着输入电压而变化，从而延长提供输入电压的电池的寿命并提高电池的功率效率。

公开(公告)号：US07535690B2

公开(公告)日：2009-05-19

申请号：US11518446

申请日：2006-09-11

Applicant: Cheng-Hsuan Fan ,  Chao-Hsuan Chuang ,  Hung-Che Chou ,  Ching-Hsiang Yang ,  Chih-Ping Tan

Inventor： Cheng-Hsuan Fan ,  Chao-Hsuan Chuang ,  Hung-Che Chou ,  Ching-Hsiang Yang ,  Chih-Ping Tan

IPC: H02H3/24 ,  H02H5/04

CPC classification number: H02H5/041 ,  H02H3/087 ,  H02H3/202

Abstract: For protecting a power system, two or three of over current, thermal and under voltage protection circuits are integrated as one protection circuit but operate independently, and one or more protection points thereof are adjusted dynamically in response to detected condition of the power system. Specifically, using voltage and current conditions in the power system to modify the over current protection and the thermal protection maximizes the performance of the power system and covers the process bias in the circuits.

Abstract translation: 为了保护电力系统，两个或三个过流，过热和欠压保护电路被集成为一个保护电路，但是独立操作，并且响应于电力系统的检测到的状态来动态地调整其一个或多个保护点。 具体来说，使用电力系统中的电压和电流条件修改过电流保护和热保护，最大限度地提高电力系统的性能，并覆盖电路中的过程偏置。

公开(公告)号：US07535032B2

公开(公告)日：2009-05-19

申请号：US11165028

申请日：2005-06-24

Applicant: Liang-Pin Tai ,  Jing-Meng Liu ,  Hung-Der Su

Inventor： Liang-Pin Tai ,  Jing-Meng Liu ,  Hung-Der Su

IPC: H01L29/74 ,  H01L31/111

CPC classification number: H01L27/098 ,  H01L27/0744 ,  H01L29/7722 ,  H01L29/8083

Abstract: A single-chip common-drain JFET device comprises a drain, two gates and two source arranged such that two common-drain JFETs are formed therewith. Due to the two JFETs merged within a single chip, no wire bonding connection is needed therebetween, thereby without parasitic inductance and resistance caused by bonding wire, and therefore improving the performance and reducing the package cost. The single-chip common-drain JFET device may be applied in buck converter, boost converter, inverting converter, switch, and two-step DC-to-DC converter to improve their performance and efficiency. Alternative single-chip common-drain JFET devices are also provided for current sense or proportional current generation.

Abstract translation: 单芯片公共漏极JFET器件包括漏极，两个栅极和两个源极，使得与其形成两个公共漏极JFET。 由于在单个芯片内合并的两个JFET，其间不需要引线接合连接，因此没有由接合线引起的寄生电感和电阻，因此提高性能并降低封装成本。 单片式公共漏极JFET器件可以应用于降压转换器，升压转换器，反相转换器，开关和两级DC-DC转换器，以提高其性能和效率。 还提供了用于电流感测或比例电流产生的替代单芯片公共漏极JFET器件。

公开(公告)号：US07518888B2

公开(公告)日：2009-04-14

申请号：US11415223

申请日：2006-05-02

Applicant: Kwan-Jen Chu ,  Chung-Lung Pai ,  Yuan-Huang Cheng ,  Jing-Meng Liu

Inventor： Kwan-Jen Chu ,  Chung-Lung Pai ,  Yuan-Huang Cheng ,  Jing-Meng Liu

IPC: H02M3/335 ,  H02M7/04

CPC classification number: H02M3/33507 ,  H02M2001/0009 ,  H02M2001/0038

Abstract: In a fly-back voltage converter that includes a transformer to transform a primary current to a secondary current and a switch serially coupled to the primary winding to switch the primary current in response to a control signal, a detection signal is produced by comparing the secondary current with two threshold values after the primary current is switched off to trigger the next on-time cycle of the switch. Once the secondary current is detected to be greater than a first threshold value, it is determined that the secondary current has been switched on, and until the secondary current is detected to be lower than a second threshold value, it is determined that the secondary current is to be switched off. The hysteresis range of the threshold values prevents error detection of the secondary current.

Abstract translation: 在包括将初级电流转换为次级电流的变压器和串联耦合到初级绕组的开关以响应于控制信号切换初级电流的反激式电压转换器中，通过比较次级 在初级电流关闭之后，具有两个阈值的电流触发开关的下一个导通时间周期。 一旦检测到二次电流大于第一阈值，则确定次级电流已经接通，并且直到检测到次级电流低于第二阈值，确定次级电流 要关掉 阈值的滞后范围可防止次级电流的错误检测。