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公开(公告)号：US20190319590A1
公开(公告)日：2019-10-17
申请号：US16452549
申请日：2019-06-26
Applicant: RichWave Technology Corp.
Inventor： Chih-Sheng Chen , Pei-Chuan Hsieh
Abstract: A predistorter has a first capacitor, a first bias input circuit, a second bias input circuit, a second capacitor and an impedance conversion circuit. A first end of the first capacitor is coupled to a first node of the amplifier. The impedance conversion circuit has a first resistor and a field-effect transistor (FET) and is used to perform an impedance conversion to provide a variable capacitance. A gate of the FET is coupled to an output end of the first bias input circuit, one of a source and a drain of the FET is coupled to a second end of the first capacitor and a first end of the first resistor, and another of the source and the drain of the FET is coupled to an output end of the second bias input circuit, first end of the second capacitor and a second end of the first resistor.
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公开(公告)号：US10447215B2
公开(公告)日：2019-10-15
申请号：US15862598
申请日：2018-01-04
Applicant: RICHWAVE TECHNOLOGY CORP.
Inventor： Chih-Sheng Chen , Chang-Yi Chen
Abstract: A current compensation circuit for providing a current to an amplifier circuit includes a first amplifier, a first transistor and a first bias circuit. The first bias circuit provides a first bias current to the first amplifier. The current compensation circuit includes a power detection circuit, an operational amplifier circuit and a current-to-voltage converter. The power detection circuit detects and converts an input power or an output power of the first amplifier to a first detection voltage. The operational amplifier circuit generates a second detection voltage according to the first detection voltage and a calibration voltage. The current-to-voltage converter converts the second detection voltage to a compensation current. A first compensation current flows to the first amplifier through the first transistor according to the compensation current, such that the first amplifier is driven by the first bias current plus the first compensation current.
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公开(公告)号：US10326412B2
公开(公告)日：2019-06-18
申请号：US16008054
申请日：2018-06-14
Applicant: RichWave Technology Corp.
Inventor： Chih-Sheng Chen , Chang-Yi Chen
Abstract: An amplifier includes an input terminal for receiving an input signal, an output terminal for outputting an output signal, a first transistor, a second transistor having a first terminal coupled to a second terminal of the first transistor, a third transistor having a first terminal coupled to a second terminal of the second transistor, a capacitor coupled between a control terminal and a second terminal of the third transistor, a bias circuit coupled to the first terminal of the third transistor for providing a bias voltage to the third transistor, a fourth transistor having a first terminal coupled to the input terminal and a second terminal coupled to the output terminal for providing a bypass path, and a fifth transistor having a first terminal coupled to the first terminal of the first transistor and a second terminal coupled to the output terminal.
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公开(公告)号：US20190165743A1
公开(公告)日：2019-05-30
申请号：US16264701
申请日：2019-02-01
Applicant: RichWave Technology Corp.
Inventor： Chih-Sheng Chen , Chang-Yi Chen
CPC classification number: H03F1/565 , H01F27/2804 , H01F2019/085 , H01F2027/2809 , H03F3/195 , H03F3/211 , H03F3/45475 , H03F2200/387 , H03F2200/451 , H03F2200/537 , H03F2200/541 , H03F2203/45731
Abstract: A transformer has a first winding, a second winding, a third winding, a fourth winding and a fifth winding. The fifth winding has a first part and a second part serially connected to the first part. The first part is magnetically coupled to the second winding and magnetically isolated from the first winding, and the second part is magnetically coupled to the fourth winding and magnetically isolated from the third winding. The second winding is positioned between the first winding and the first part, the first winding is positioned adjacent to the second winding, and the second winding is positioned adjacent to the first part. The fourth winding is positioned between the third winding and the second part, the third winding is positioned adjacent to the fourth winding, and the fourth winding is positioned adjacent to the second part.
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公开(公告)号：US20190163220A1
公开(公告)日：2019-05-30
申请号：US16191355
申请日：2018-11-14
Applicant: RichWave Technology Corp.
Inventor： Chih-Sheng Chen , Tien-Yun Peng
Abstract: A power supply device includes an input terminal, a regulated voltage output terminal, a switch, a first transistor, and a current split circuit. The input terminal receives a first control voltage. The regulated voltage output terminal outputs an output voltage. The switch has a first terminal coupled to the input terminal, a second terminal, and a control terminal. The first transistor has a first terminal coupled to a voltage terminal, a second terminal coupled to the regulated voltage output terminal, and a control terminal coupled to the second terminal of the switch. The current split circuit is coupled to the voltage terminal and the regulated voltage output terminal. The current split circuit receives the first control voltage or a second control voltage, and includes a second transistor coupled between the voltage terminal and the regulated voltage output terminal.
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Patent Agency Ranking
公开(公告)号：US20190123747A1
公开(公告)日：2019-04-25
申请号：US16111238
申请日：2018-08-24
Applicant: RichWave Technology Corp.
Inventor： Chih-Sheng Chen , Tien-Yun Peng
IPC: H03K19/003
CPC classification number: H03K19/00315 , H03K19/0013 , H03K19/0016 , H03K19/003 , H03K19/017 , H03K19/01707 , H03K19/20
Abstract: An inverter includes a first system voltage terminal, a second system voltage terminal, an output terminal, a plurality of P-type transistors, a plurality of N-type transistors, and a voltage drop impedance element. The first system voltage terminal receives a first voltage, and the second system voltage terminal receives a second voltage. The plurality of P-type transistors are coupled in series between the first system voltage terminal and the output terminal. The plurality of N-type transistors are coupled in series between the output terminal and the second system voltage terminal. The voltage drop impedance element is coupled in parallel with a first N-type transistor of the plurality of N-type transistors, and the impedance of the voltage drop impedance element is smaller than the impedance of the first N-type transistor when the first N-type transistor is turned off.
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公开(公告)号：US10270401B2
公开(公告)日：2019-04-23
申请号：US14886109
申请日：2015-10-19
Applicant: RichWave Technology Corp.
Inventor： Chih-Sheng Chen , Chang-Yi Chen
Abstract: A transformer has a first winding, a second winding and a third winding. The first winding is configured to receive a first signal. The second winding is magnetically coupled to the first winding and configured to generate a second signal through electromagnetic induction with the first winding, or by receiving a second input signal. The third winding is magnetically coupled to the second winding, magnetically isolated from the first winding, and configured to generate a third signal through electromagnetic induction with the second winding. The second winding is posited between the first winding and the third winding. The first winding is posited adjacent to the second winding, and the second winding is posited adjacent to the third winding.
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公开(公告)号：US10256808B2
公开(公告)日：2019-04-09
申请号：US15825116
申请日：2017-11-29
Applicant: RichWave Technology Corp.
Inventor： Chih-Sheng Chen , Tien-Yun Peng
Abstract: A bandgap reference circuit includes a voltage generation circuit, a capacitor and a clamping control circuit. The voltage generation circuit is used to generate a current on an operation terminal. The capacitor includes a first terminal coupled to the operation terminal, and a second terminal coupled to a first reference voltage terminal. The clamping control circuit is coupled between the operation terminal and a second reference voltage terminal. The clamping control circuit includes a switch and a clamping unit, and is used to allow part of the current flowing through the clamping unit to the second reference voltage terminal when the switch is turned on.
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公开(公告)号：US10248149B2
公开(公告)日：2019-04-02
申请号：US15839189
申请日：2017-12-12
Applicant: RICHWAVE TECHNOLOGY CORP.
Inventor： Chih-Sheng Chen , Tien-Yun Peng , Jhao-Yi Lin
Abstract: A bias circuit includes a first transistor, a second transistor, a first resistor and a second resistor. The first end of the first transistor is coupled to a first voltage source. One end of the first resistor is coupled to the second end of the first transistor, and the other end of the first resistor is coupled to the control terminal of the first transistor. The first end of the second transistor is coupled to a second voltage source, and the second end of the second transistor is coupled to the control terminal of the first transistor. One end of the second resistor is coupled to the other end of the first resistor, and the other end of the second resistor is coupled to the control terminal of the second transistor.
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公开(公告)号：US20190068195A1
公开(公告)日：2019-02-28
申请号：US16102685
申请日：2018-08-13
Applicant: RichWave Technology Corp.
Inventor： Chih-Sheng Chen , Tien-Yun Peng
IPC: H03K19/094 , H02H9/02 , H03K19/0175 , H03K19/173 , H03H17/02
Abstract: A clamp logic circuit has a logic circuit, a control terminal, a current clamp circuit and an output terminal. The logic circuit has at least a junction field-effect transistor (JFET). The control terminal receives an input signal. The current clamp circuit has a transistor and a resistor. A first end of the transistor is coupled to the control terminal, a second end of the transistor is coupled to a first end of the resistor, a control end of the transistor is coupled to a reference voltage, and a second end of the resistor is coupled to an input end of the logic circuit. The output terminal is coupled to an output end of the logic circuit.
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