公开(公告)号：US09361169B2

公开(公告)日：2016-06-07

申请号：US14173101

申请日：2014-02-05

Applicant: D-Wave Systems Inc.

Inventor： Andrew J. Berkley

IPC: G06F11/00 ,  G06F11/07 ,  G06N99/00 ,  G06F11/14

CPC classification number: G06F11/0724 ,  G06F11/10 ,  G06F11/1492 ,  G06N99/002

Abstract: The effects of decoherence and/or noise in adiabatic quantum computation and quantum annealing are reduced by implementing replica coding schemes. Multiple instances of the same problem are mapped to respective subsets of the qubits and coupling devices of a quantum processor. The multiple instances are evolved simultaneously in the presence of coupling between the qubits of different instances. Quantum processor architectures that are adapted to facilitate replica coding are also described.

Abstract translation: 通过实现复制编码方案，减少绝热和/或噪声对绝热量子计算和量子退火的影响。 相同问题的多个实例被映射到量子位的相应子集和量子处理器的耦合器件。 在不同实例的量子位之间存在耦合的情况下，多个实例同时进化。 还描述了适于促进复制编码的量子处理器体系结构。

公开(公告)号：US09355365B2

公开(公告)日：2016-05-31

申请号：US14255561

申请日：2014-04-17

Applicant: D-WAVE SYSTEMS INC.

Inventor： Andrew J. Berkley ,  Mark W. Johnson ,  Paul I. Bunyk

IPC: H01L39/00 ,  G06N99/00 ,  B82Y10/00 ,  H01L23/532 ,  H01L27/18

CPC classification number: G06N99/002 ,  B82Y10/00 ,  H01L23/53285 ,  H01L27/18 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A superconducting integrated circuit may include a magnetic flux transformer having an inner inductive coupling element and an outer inductive coupling element that surrounds the inner inductive coupling element along at least a portion of a length thereof. The magnetic flux transformer may have a coaxial-like geometry such that a mutual inductance between the first inductive coupling element and the second inductive coupling element is sub-linearly proportional to a distance that separates the first inner inductive coupling element from the first outer inductive coupling element. At least one of the first inductive coupling element and the second inductive coupling element may be coupled to a superconducting programmable device, such as a superconducting qubit.

Abstract translation: 超导集成电路可以包括具有内部感应耦合元件和外部感应耦合元件的磁通量变换器，该外部感应耦合元件沿其长度的至少一部分围绕内部感应耦合元件。 磁通变压器可以具有类似同轴的几何形状，使得第一感应耦合元件和第二感应耦合元件之间的互感与将第一内部感应耦合元件与第一外部电感耦合器分开的距离成亚线性比例 元件。 第一电感耦合元件和第二电感耦合元件中的至少一个可以耦合到超导可编程器件，例如超导量子位。

公开(公告)号：US20160087598A1

公开(公告)日：2016-03-24

申请号：US14959846

申请日：2015-12-04

Applicant: D-Wave Systems Inc.

Inventor： Murray C. Thom ,  Alexander M. Tcaciuc

IPC: H03H1/00 ,  H03H7/01 ,  H01F27/28 ,  H01F41/06 ,  H01F41/04

CPC classification number: H03H1/00 ,  H01F6/06 ,  H01F6/065 ,  H01F27/2823 ,  H01F41/048 ,  H01F41/069 ,  H01F41/076 ,  H01L39/02 ,  H01L39/14 ,  H01P1/203 ,  H03H7/0115 ,  H03H7/0138 ,  H03H7/1741 ,  H03H2001/0078

Abstract: Systems and devices for providing differential input/output communication with a superconducting device are described. Each differential I/O communication is electrically filtered using a respective tubular filter structure incorporating superconducting lumped element devices and high frequency dissipation by metal powder epoxy. A plurality of such tubular filter structures is arranged in a cryogenic, multi-tiered assembly further including structural/thermalization supports and a device sample holder assembly for securing a device sample, for example a superconducting quantum processor. The interface between the cryogenic tubular filter assembly and room temperature electronics is achieved using hermetically sealed vacuum feed-through structures designed to receive flexible printed circuit board cable.

公开(公告)号：US20160012347A1

公开(公告)日：2016-01-14

申请号：US14863045

申请日：2015-09-23

Applicant: D-Wave Systems Inc.

Inventor： Andrew Douglas King

IPC: G06N99/00 ,  G06F15/76

CPC classification number: G06N99/002 ,  G06F15/76 ,  H03K19/195

Abstract: Quantum processor architectures employ unit cells tiled over an area. A unit cell may include first and second sets of qubits where each qubit in the first set crosses at least one qubit in the second set. Angular deviations between qubits in one set may allow qubits in the same set to cross one another. Each unit cell is positioned proximally adjacent at least one other unit cell. Communicatively coupling between qubits is realized through respective intra-cell and inter-cell coupling devices.

公开(公告)号：US20150363708A1

公开(公告)日：2015-12-17

申请号：US14734924

申请日：2015-06-09

Applicant: D-Wave Systems Inc.

Inventor： Mohammad H.S. Amin ,  Mark W. Johnson

IPC: G06N99/00 ,  G06F15/78

Abstract: A second problem Hamiltonian may replace a first problem Hamiltonian during evolution of an analog processor (e.g., quantum processor) during a first iteration in solving a first problem. This may be repeated during a second, or further successive iterations on the first problem, following re-initialization of the analog processor. An analog processor may evolve under a first non-monotonic evolution schedule during a first iteration, and second non-monotonic evolution schedule under second, or additional non-monotonic evolution schedule under even further iterations. A first graph and second graph may each be processed to extract final states versus a plurality of evolution schedules, and a determination made as to whether the first graph is isomorphic with respect to the second graph. An analog processor may evolve by decreasing a temperature of, and a set of quantum fluctuations, within the analog processor until the analog processor reaches a state preferred by a problem Hamiltonian.

Abstract translation: 在解决第一个问题的第一次迭代期间，第二个问题哈密尔顿算子可以在模拟处理器（例如，量子处理器）的演变期间替换第一个问题哈密尔顿算子。 在对模拟处理器进行重新初始化之后，可以在关于第一问题的第二次或进一步的连续迭代中重复这一点。 在第一次迭代期间，模拟处理器可以在第一非单调进化计划下演化，并且在甚至进一步迭代的第二非单调进化计划下进行第二非单调进化计划。 可以分别处理第一图和第二图以提取最终状态与多个进化计划，并且确定关于第一图表是否与第二图形是同构的。 模拟处理器可以通过降低模拟处理器内的温度和一组量子波动来演化，直到模拟处理器达到由问题哈密尔顿算子所优选的状态。

公开(公告)号：US09152923B2

公开(公告)日：2015-10-06

申请号：US13958339

申请日：2013-08-02

Applicant: D-Wave Systems Inc.

Inventor： Richard G. Harris ,  Andrew J. Berkley ,  Jan Johansson ,  Mark Johnson ,  Mohammad Amin ,  Paul I. Bunyk

IPC: G06N99/00 ,  B82Y10/00 ,  H01L39/22

CPC classification number: H01L39/223 ,  B82Y10/00 ,  G06N99/002 ,  H01L27/18

Abstract: Apparatus and methods enable active compensation for unwanted discrepancies in the superconducting elements of a quantum processor. A qubit may include a primary compound Josephson junction (CJJ) structure, which may include at least a first secondary CJJ structure to enable compensation for Josephson junction asymmetry in the primary CJJ structure. A qubit may include a series LC-circuit coupled in parallel with a first CJJ structure to provide a tunable capacitance. A qubit control system may include means for tuning inductance of a qubit loop, for instance a tunable coupler inductively coupled to the qubit loop and controlled by a programming interface, or a CJJ structure coupled in series with the qubit loop and controlled by a programming interface.

Abstract translation: 装置和方法使得能够对量子处理器的超导元件中的不期望的差异进行主动补偿。 量子位可以包括主复合约瑟夫逊结（CJJ）结构，其可以包括至少第一次级CJJ结构，以能够补偿主CJJ结构中的约瑟夫逊结不对称性。 量子位可以包括与第一CJJ结构并联耦合以提供可调电容的串联LC电路。 量子比特控制系统可以包括用于调整量子比特环的电感的装置，例如感应耦合到量子位循环并由编程接口控制的可调谐耦合器，或与量子位循环串联耦合并由编程接口控制的CJJ结构 。

公开(公告)号：US09129224B2

公开(公告)日：2015-09-08

申请号：US14340291

申请日：2014-07-24

Applicant: D-WAVE SYSTEMS INC.

Inventor： Trevor Michael Lanting ,  Colin Enderud ,  Elena Tolkacheva

IPC: H03K19/195 ,  G06N99/00

CPC classification number: G06N99/002

Abstract: Increasing the energy scale of a quantum processor improves its performance. Energy scale of a quantum processor may be increased by increasing the coupling strength of communicatively coupled superconducting devices comprised in the quantum processor. Configuring the physical dimensions of communicatively coupled superconducting devices such that an intentional direct coupling is induced between a pair of superconducting devices communicatively coupled by a coupling device may controllably add an additional mutual inductance to the mutual inductance of the pair of superconducting devices. Furthermore, reducing the beta parameter of a coupling device may improve the tunability of the coupling device. The combined effects of improved tunability of the coupling devices and the increased coupling strength between superconducting devices communicatively coupled by respective coupling devices comprised in the quantum processor may thus improve the performance of the quantum processor.

Abstract translation: 增加量子处理器的能量规格提高了其性能。 可以通过增加包含在量子处理器中的通信耦合的超导装置的耦合强度来增加量子处理器的能量级。 配置通信耦合的超导装置的物理尺寸，使得在由耦合装置通信耦合的一对超导装置之间引起有意的直接耦合可以可控地向一对超导装置的互感增加额外的互感。 此外，降低耦合装置的β参数可以提高耦合装置的可调性。 耦合器件的改进的可调谐性以及通过由包含在量子处理器中的相应耦合器件通信耦合的超导器件之间增加的耦合强度的组合效应可以改善量子处理器的性能。

公开(公告)号：US20150205759A1

公开(公告)日：2015-07-23

申请号：US14671862

申请日：2015-03-27

Applicant: D-WAVE SYSTEMS INC.

Inventor： Robert Israel ,  William G. Macready ,  Zhengbing Bian ,  Fabian Chudak ,  Mani Ranjbar

IPC: G06F17/11

CPC classification number: G06F17/11 ,  G06N99/002

Abstract: Methods and systems represent constraint as an Ising model penalty function and a penalty gap associated therewith, the penalty gap separating a set of feasible solutions to the constraint from a set of infeasible solutions to the constraint; and determines the Ising model penalty function subject to the bounds on the programmable parameters imposed by the hardware limitations of the second processor, where the penalty gap exceeds a predetermined threshold greater than zero. Such may be employed to find quantum binary optimization problems and associated gap values employing a variety of techniques.

Abstract translation: 方法和系统表示作为Ising模型惩罚函数的约束和与之相关联的惩罚差距，将一组可行解与约束的惩罚差距从一组不可行解解决定到约束; 并且确定Ising模型惩罚函数受到由第二处理器的硬件限制所强加的可编程参数的界限的影响，其中惩罚间隔超过大于零的预定阈值。 可以采用这种方法来找到采用各种技术的量子二进制优化问题和相关的间隙值。

公开(公告)号：US09069928B2

公开(公告)日：2015-06-30

申请号：US14175731

申请日：2014-02-07

Applicant: D-Wave Systems Inc.

Inventor： Alexander Maassen van den Brink ,  Peter Love ,  Mohammad H. S. Amin ,  Geordie Rose ,  David Grant ,  Miles F. H. Steininger ,  Paul I. Bunyk ,  Andrew J. Berkley

IPC: H03K19/195 ,  G06F15/76 ,  H03K3/38 ,  B82Y10/00 ,  G06N99/00

CPC classification number: G06F15/80 ,  B82Y10/00 ,  G06F15/76 ,  G06N99/002 ,  H03K3/38 ,  H04L67/12

Abstract: Analog processors for solving various computational problems are provided. Such analog processors comprise a plurality of quantum devices, arranged in a lattice, together with a plurality of coupling devices. The analog processors further comprise bias control systems each configured to apply a local effective bias on a corresponding quantum device. A set of coupling devices in the plurality of coupling devices is configured to couple nearest-neighbor quantum devices in the lattice. Another set of coupling devices is configured to couple next-nearest neighbor quantum devices. The analog processors further comprise a plurality of coupling control systems each configured to tune the coupling value of a corresponding coupling device in the plurality of coupling devices to a coupling. Such quantum processors further comprise a set of readout devices each configured to measure the information from a corresponding quantum device in the plurality of quantum devices.

公开(公告)号：US20150161524A1

公开(公告)日：2015-06-11

申请号：US14561086

申请日：2014-12-04

Applicant: D-Wave Systems Inc.

Inventor： Firas Hamze

IPC: G06N99/00 ,  G06N7/00

CPC classification number: G06N7/005 ,  G06N10/00

Abstract: The techniques and structures described herein generally relate to sampling from an available probability distribution to create a desirable probability distribution. This resultant distribution can be used for computing values used in computational techniques including: Importance Sampling and Markov chain Monte Carlo systems.

Abstract translation: 本文描述的技术和结构通常涉及从可用概率分布中的采样以创建期望的概率分布。 该结果分布可用于计算技术中使用的计算值，包括：重要性抽样和马尔可夫链蒙特卡洛系统。