Abstract:
A method of mounting an electronic component having at least one contact extending across a part of its undersurface may include providing a support smaller in area than the undersurface of the component and having a contact pad for connection to the contact. The contact pad may have a first portion extending across an upper surface of the support adjacent one edge and a second portion extending from the edge across a side surface of the support. The method may also include positioning the electronic component and the support with the undersurface of the component adjacent the upper surface of the support. This is done so that the first portion of the contact pad is aligned with and spaced apart from a first portion of the contact, and the second portion of the contact pad is aligned with and disposed inwardly of a second portion of the contact.
Abstract:
A solid state image sensor may include a pixel array of an active pixel type including three transistors and a photodiode for each pixel. Pixel reset values may be read out one row at a time and stored in a frame store. Pixel signal values may also be read out a row at a time. The stored reset values may be subtracted, for example, by a read/write/modify circuit to remove kTC noise. The readout of the reset and signal values may be interleaved, and the offset between read and reset for each row may be selected to control frame exposure.
Abstract:
A method is for generating a key from the fixed pattern noise (FPN) of a CMOS image sensor to be used in generating a digital authentication signature. The key may be generated by temporarily disabling the FPN cancellation circuit that is conventionally included in the system, and generating a substantially nullblacknull image to produce a digitized FPN signal. The key may then be generated from characteristics of the FPN, such as by comparing pairs of pixels, for example.
Abstract:
A look-up table circuit includes address decoder circuitry that includes circuitry for utilizing the address decoder circuitry for producing secondary functions concurrently with operation of the address decoding operations. This eliminates or reduces secondary functions.
Abstract:
A high bit density, high speed, via and metal BE type programmable ROM core cell architecture for storing large amounts of non-volatile data and having a relatively fast turn around time is provided. The ROM core cell may include memory cells organized in rows and columns where each of the memory cells includes three transistors and two bit lines. The arrangement between the three transistors and two bit lines may be such that each of the memory cells is capable of storing four bits of data.
Abstract:
A method of operating a solid state image sensor having an image sensing array that includes a plurality of active pixels comprises resetting each pixel, and after successive time periods reading outputs from each pixel to obtain multiple sets of image data having different dynamic ranges without resetting the pixels between the successive time periods. The sets of image data are combined to obtain a resultant set of image data having a further dynamic range different from the individual dynamic ranges of the multiple data sets. Images are obtained having low noise, a wide dynamic range, and are resistant to lighting-induced flicker.