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公开(公告)号:US20220216136A1
公开(公告)日:2022-07-07
申请号:US17142198
申请日:2021-01-05
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Po-Jen CHENG , Chien-Fan CHEN
IPC: H01L23/498 , H01L23/31 , H01L23/00 , H01L23/538 , H01L25/18 , H01L21/48 , H01L21/56
Abstract: An electronic device package and a method for manufacturing the same are provided. The electronic device package includes a circuit layer and an electronic component. The circuit layer includes a dielectric layer having an opening, and an electrical contact. A width of an aperture of the opening increases from a first surface toward a second surface. The electrical contact is at least partially disposed in the opening and exposed through the opening. The electronic component is disposed on the second surface and electrically connected to the circuit layer.
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公开(公告)号:US20220208623A1
公开(公告)日:2022-06-30
申请号:US17695757
申请日:2022-03-15
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Tsung-Yu LIN , Pei-Yu WANG , Chung-Wei HSU
Abstract: A semiconductor device package includes a supporting element, a transparent plate disposed on the supporting element, a semiconductor device disposed under the transparent plate, and a lid surrounding the transparent plate. The supporting element and the transparent plate define a channel.
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公开(公告)号:US11373956B2
公开(公告)日:2022-06-28
申请号:US16742788
申请日:2020-01-14
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Min Lung Huang , Hung-Jung Tu , Hsin Hsiang Wang , Chih-Wei Huang , Shiuan-Yu Lin
IPC: H01L23/538 , H01L23/31 , H01L21/768 , H01L23/00 , H01L23/528
Abstract: The present disclosure provides a semiconductor device package. The semiconductor device package includes a first semiconductor device, a first conductive layer and a second conductive layer. The first semiconductor device has a first conductive pad. The first conductive layer is disposed in direct contact with the first conductive pad. The first conductive layer extends along a direction substantially parallel to a surface of the first conductive pad. The second conductive layer is disposed in direct contact with the first conductive pad and spaced apart from the first conductive layer.
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公开(公告)号:US20220199559A1
公开(公告)日:2022-06-23
申请号:US17127671
申请日:2020-12-18
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Hsu-Nan FANG
Abstract: A semiconductor package and a method for manufacturing a semiconductor package are provided. The semiconductor package includes a first semiconductor device, a second semiconductor device, and an alignment material. The first semiconductor device has a first bonding layer, and the first bonding layer includes a first bond pad contacting an organic dielectric material. The second semiconductor device has a second bonding layer, and the second bonding layer includes a second bond pad contacting the organic dielectric material. The alignment material is between the first bonding layer and the second bonding layer.
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公开(公告)号:US11362036B2
公开(公告)日:2022-06-14
申请号:US16734989
申请日:2020-01-06
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Chao Wei Liu
Abstract: A semiconductor device package and a method of manufacturing the same are provided. The semiconductor device package includes a first carrier, an encapsulant, a second carrier and one or more supporters. The first carrier has a first surface and a first side contiguous with the first surface. The encapsulant is on the first surface of the first carrier, and the first side of the first carrier is exposed from the encapsulant. The second carrier is disposed over the first carrier. The one or more supporters are spaced apart from the first side of the first carrier and connected between the first carrier and the second carrier. The one or more supporters are arranged asymmetrically with respect to the geographic center of the first carrier. The one or more supporters are fully sealed in the encapsulant.
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公开(公告)号:US11355426B2
公开(公告)日:2022-06-07
申请号:US16945429
申请日:2020-07-31
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Wen Hung Huang , Min Lung Huang
Abstract: A wiring structure and a method for manufacturing the same are provided. The wiring structure includes a conductive structure and at least one conductive through via. The conductive structure includes a plurality of dielectric layers, a plurality of circuit layers in contact with the dielectric layers, and a plurality of dam portions in contact with the dielectric layers. The dam portions are substantially arranged in a row and spaced apart from one another. The conductive through via extends through the dam portions.
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公开(公告)号:US20220165683A1
公开(公告)日:2022-05-26
申请号:US17105277
申请日:2020-11-25
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Wen Hung HUANG , Yu-Ju LIAO
Abstract: An assembly structure and a method for manufacturing the same are provided. The method for manufacturing the assembly structure includes providing a substrate defining an active region and a side rail surrounding the active region; and forming a frame structure on the side rail.
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公开(公告)号:US11342476B2
公开(公告)日:2022-05-24
申请号:US16923876
申请日:2020-07-08
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Jenchun Chen
IPC: H01L31/00 , H01L33/00 , H01L31/14 , H01L31/0216 , H01L33/52 , H01L31/18 , H01L33/44 , H01L31/0203
Abstract: An optical device includes a substrate, a light receiving component, an encapsulant, a coupling layer and a light shielding layer. The light receiving component is disposed on the substrate. The encapsulant covers the light receiving component. The coupling layer is disposed on at least a portion of the encapsulant. The light shielding layer is disposed on the coupling layer.
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公开(公告)号:US11332363B2
公开(公告)日:2022-05-17
申请号:US16670493
申请日:2019-10-31
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Chieh-An Yeh , Tai-Hung Kuo
Abstract: A stacked structure includes a polymer layer and a metal layer. The metal layer is disposed on the polymer layer. A burr length on a surface of the polymer layer is about 0.8 μm to about 150 μm, and a burr length on a surface of the metal layer is about 0.8 μm to about 7 μm.
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公开(公告)号:US20220148974A1
公开(公告)日:2022-05-12
申请号:US17584051
申请日:2022-01-25
Applicant: Advanced Semiconductor Engineering, Inc.
Inventor: Cheng-Yuan KUNG , Hung-Yi LIN
IPC: H01L23/538 , H01L25/10
Abstract: An assembly structure includes a core-computing section and a sub-computing section. The core-computing section has a first surface and a second surface opposite to the first surface. The core-computing section includes at least one conductive via electrically connecting the first surface and the second surface. The sub-computing section has a first surface stacked on the first surface of the core-computing section and a second surface opposite to the first surface. The sub-computing section includes at least one conductive via electrically connecting the first surface and the second surface. The assembly structure includes a first signal transmission path and a second signal transmission path. The first signal transmission path is between the at least one conductive via of the sub-computing section and the at least one conductive via of the core-computing section. The second signal transmission path is between the second surface of the sub-computing section and the at least one conductive via of the sub-computing section.
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