Abstract:
A method of forming a fin field effect transistor includes forming a fin and forming a source region adjacent a first end of the fin and a drain region adjacent a second end of the fin. The method further includes forming a dummy gate over the fin and forming a dielectric layer around the dummy gate. The method also includes removing the dummy gate to form a trench in the dielectric layer and forming a metal gate in the trench.
Abstract:
A real-time, portable peptide-containing potentiometric biosensor that can directly identify bacterial spores. Two peptides for specific recognition of B. subtilis and B. anthracis Sterne may be immobilized by a polysiloxane monolayer immobilization (PMI) technique. The sensors translate the biological recognition event into a potential change by detecting, for example, B. subtilis spores in a concentration range of 0.08-7.3×104 CFU/ml. The sensor exhibited highly selective recognition properties towards Bacillus subtilis spores over other kinds of spores. The selectivity coefficients of the sensors for other kinds of spores are in the range of 0-1.0×10−5. The biosensor system not only has the specificity to distinguish Bacillus subtilis spores in a mixture of B. subtilis and B. thuringiensis (thur.) Kurstaki spores, but also can discriminate between live and dead B. subtilis spores. Furthermore, the sensor can distinguish a Bacillus subtilis 1A700 from other B. subtilis strain. Assay time may be as low as about 5 minutes for a single test. Rapid identification of B. anthracis Sterne and B. anthracis ΔAmes was also provided.
Abstract:
A method of manufacturing a semiconductor device may include forming a fin on an insulator and forming a gate oxide on sides of the fin. The method may also include forming a gate structure over the fin and the gate oxide and forming a dielectric layer adjacent the gate structure. Material in the gate structure may be removed to define a gate recess. A width of a portion of the fin below the gate recess may be reduced, and a metal gate may be formed in the gate recess.
Abstract:
A double-semiconductor device includes a substrate, an insulating layer, a fin and a gate. The insulating layer is formed on the substrate and the fin is formed on the insulating layer. The fin has a number of side surfaces, a top surface and a bottom surface. The gate is formed on the insulating layer and surrounds the top surface, bottom surface and the side surfaces of the fin in the channel region of the semiconductor device. Surrounding the fin with gate material results in an increased total channel width and more flexible device adjustment margins.
Abstract:
A narrow channel FinFET is described herein with a narrow channel width. A protective layer may be formed over the narrow channel, the protective layer being wider than the narrow channel.
Abstract:
A diffraction laser encoder apparatus for positional and movement information measurement of a target made with a diffraction grating. The diffraction laser encoder has a laser light source for generating a source beam. A polarization beam splitter assembly comprises a polarization beam splitter for receiving the source beam for splitting a P-polarization component and an S-polarization component of the source beam into parallel and offset beams. A focusing lens focuses the P-polarization component and the S-polarization component beams onto the target diffraction grating and returning diffracted P-polarization and diffracted S-polarization beams back into the polarization beam splitter for generating a detector beam coaxially containing the diffracted P-polarization and the diffracted S-polarization beams. A detector assembly receives the detector beam for electrical processing and analysis for resolving the positional and movement information. In the process, phase information contained in the diffraction signal returned by the target is analyzed.
Abstract:
A method of forming a fin field effect transistor includes forming a fin and forming a source region on a first end of the fin and a drain region on a second end of the fin. The method further includes forming a dummy gate with a first semi-conducting material in a first pattern over the fin and forming a dielectric layer around the dummy gate. The method also includes removing the first semi-conducting material to leave a trench in the dielectric layer corresponding to the first pattern, thinning a portion of the fin exposed within the trench, and forming a metal gate within the trench.
Abstract:
A memory device includes a conductive structure, a number of dielectric layers and a control gate. The dielectric layers are formed around the conductive structure and the control gate is formed over the dielectric layers. A portion of the conductive structure functions as a drain region for the memory device and at least one of the dielectric layers functions as a charge storage structure for the memory device. The dielectric layers may include oxide-nitride-oxide layers.
Abstract:
A semiconductor device and method of manufacture. The semiconductor device having a silicide source and a silicide drain; a semiconductor body disposed between the source and the drain; a gate electrode disposed over the body and defining a channel interposed between the source and the drain; and a gate dielectric made from a high-K material and separating the gate electrode and the body.
Abstract:
A shallow trench isolation region formed in a layer of semiconductor material. The shallow trench isolation region includes a trench formed in the layer of semiconductor material, the trench being defined by sidewalls and a bottom; a liner within the trench formed from a high-K material, the liner conforming to the sidewalls and bottom of the trench; and a fill section made from isolating material, and disposed within and conforming to the high-K liner. A method of forming the shallow trench isolation region is also disclosed.