公开(公告)号：US20220020841A1

公开(公告)日：2022-01-20

申请号：US17488376

申请日：2021-09-29

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Kengo AKIMOTO ,  Shigeki KOMORI ,  Hideki UOCHI ,  Rihito WADA ,  Yoko CHIBA

IPC: H01L27/32 ,  H01L29/786 ,  H01L27/12

Abstract: A display device includes a pixel portion in which a pixel is arranged in a matrix, the pixel including an inverted staggered thin film transistor having a combination of at least two kinds of oxide semiconductor layers with different amounts of oxygen and having a channel protective layer over a semiconductor layer to be a channel formation region overlapping a gate electrode layer and a pixel electrode layer electrically connected to the inverted staggered thin film transistor. In the periphery of the pixel portion in this display device, a pad portion including a conductive layer made of the same material as the pixel electrode layer is provided. In addition, the conductive layer is electrically connected to a common electrode layer formed on a counter substrate.

公开(公告)号：US20210359134A1

公开(公告)日：2021-11-18

申请号：US17443541

申请日：2021-07-27

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kengo AKIMOTO ,  Toshinari SASAKI

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/45 ,  H01L29/66 ,  H01L29/04 ,  H01L29/24 ,  H01L29/423

Abstract: An object is to improve field effect mobility of a thin film transistor using an oxide semiconductor. Another object is to suppress increase in off current even in a thin film transistor with improved field effect mobility. In a thin film transistor using an oxide semiconductor layer, by forming a semiconductor layer having higher electrical conductivity and a smaller thickness than the oxide semiconductor layer between the oxide semiconductor layer and a gate insulating layer, field effect mobility of the thin film transistor can be improved, and increase in off current can be suppressed.

公开(公告)号：US20210159345A1

公开(公告)日：2021-05-27

申请号：US17167163

申请日：2021-02-04

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Masashi TSUBUKU ,  Kengo AKIMOTO ,  Hiroki OHARA ,  Tatsuya HONDA ,  Takatsugu OMATA ,  Yusuke NONAKA ,  Masahiro TAKAHASHI ,  Akiharu MIYANAGA

IPC: H01L29/786 ,  H01L29/04 ,  H01L29/10 ,  H01L29/24

Abstract: An oxide semiconductor film which has more stable electric conductivity is provided. The oxide semiconductor film comprises a crystalline region. The oxide semiconductor film has a first peak of electron diffraction intensity with a full width at half maximum of greater than or equal to 0.4 nm−1 and less than or equal to 0.7 nm−1 in a region where a magnitude of a scattering vector is greater than or equal to 3.3 nm−1 and less than or equal to 4.1 nm−1. The oxide semiconductor film has a second peak of electron diffraction intensity with a full width at half maximum of greater than or equal to 0.45 nm−1 and less than or equal to 1.4 nm−1 in a region where a magnitude of a scattering vector is greater than or equal to 5.5 nm−1 and less than or equal to 7.1 nm−1.

公开(公告)号：US20210091210A1

公开(公告)日：2021-03-25

申请号：US17111838

申请日：2020-12-04

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Hidekazu MIYAIRI ,  Kengo AKIMOTO ,  Kojiro SHIRAISHI

IPC: H01L29/66 ,  H01L29/786 ,  H01L27/12 ,  H01L21/46

Abstract: It is an object to provide a semiconductor device including a thin film transistor with favorable electric properties and high reliability, and a method for manufacturing the semiconductor device with high productivity. In an inverted staggered (bottom gate) thin film transistor, an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer, and a buffer layer formed using a metal oxide layer is provided between the semiconductor layer and a source and drain electrode layers. The metal oxide layer is intentionally provided as the buffer layer between the semiconductor layer and the source and drain electrode layers, whereby ohmic contact is obtained.

公开(公告)号：US20200176606A1

公开(公告)日：2020-06-04

申请号：US16783577

申请日：2020-02-06

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Hidekazu MIYAIRI ,  Akiharu MIYANAGA ,  Kengo AKIMOTO ,  Kojiro SHIRAISHI

IPC: H01L29/786 ,  H01L29/423 ,  H01L29/66

Abstract: To offer a semiconductor device including a thin film transistor having excellent characteristics and high reliability and a method for manufacturing the semiconductor device without variation. The summary is to include an inverted-staggered (bottom-gate structure) thin film transistor in which an oxide semiconductor film containing In, Ga, and Zn is used for a semiconductor layer and a buffer layer is provided between the semiconductor layer and source and drain electrode layers. An ohmic contact is formed by intentionally providing a buffer layer containing In, Ga, and Zn and having a higher carrier concentration than the semiconductor layer between the semiconductor layer and the source and drain electrode layers.

公开(公告)号：US20200066918A1

公开(公告)日：2020-02-27

申请号：US16666584

申请日：2019-10-29

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hajime KIMURA ,  Kengo AKIMOTO ,  Masashi TSUBUKU ,  Toshinari SASAKI

IPC: H01L29/786 ,  H01L27/12 ,  G09G3/36

Abstract: A display device including a pixel having a memory. The pixel includes at least a display element, a capacitor, an inverter, and a switch. The switch is controlled with a signal held in the capacitor and a signal output from the inverter so that voltage is supplied to the display element. The inverter and the switch can be constituted by transistors with the same polarity. A semiconductor layer included in the pixel may be formed using a light-transmitting material. Moreover, a gate electrode, a drain electrode, and a capacitor electrode may be formed using a light-transmitting conductive layer. The pixel is formed using a light-transmitting material in such a manner, whereby the display device can be a transmissive display device while including a pixel having a memory.

公开(公告)号：US20190288120A1

公开(公告)日：2019-09-19

申请号：US16372930

申请日：2019-04-02

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Kengo AKIMOTO

IPC: H01L29/786 ,  H01L29/24 ,  H01L29/66 ,  H01L21/02 ,  H01L29/49

Abstract: An object is to provide favorable interface characteristics of a thin film transistor including an oxide semiconductor layer without mixing of an impurity such as moisture. Another object is to provide a semiconductor device including a thin film transistor having excellent electric characteristics and high reliability, and a method by which a semiconductor device can be manufactured with high productivity. A main point is to perform oxygen radical treatment on a surface of a gate insulating layer. Accordingly, there is a peak of the oxygen concentration at an interface between the gate insulating layer and a semiconductor layer, and the oxygen concentration of the gate insulating layer has a concentration gradient. The oxygen concentration is increased toward the interface between the gate insulating layer and the semiconductor layer.

公开(公告)号：US20190081031A1

公开(公告)日：2019-03-14

申请号：US16189396

申请日：2018-11-13

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Kengo AKIMOTO ,  Shigeki KOMORI ,  Hideki UOCHI ,  Tomoya FUTAMURA ,  Takahiro KASAHARA

IPC: H01L27/02 ,  H01L27/12 ,  H01L29/786

Abstract: A protective circuit includes a non-linear element which includes a gate electrode, a gate insulating layer covering the gate electrode, a first oxide semiconductor layer overlapping with the gate electrode over the gate insulating layer, a channel protective layer overlapping with a channel formation region of the first oxide semiconductor layer, and a pair of a first wiring layer and a second wiring layer whose end portions overlap with the gate electrode over the channel protective layer and in which a conductive layer and a second oxide semiconductor layer are stacked. Over the gate insulating layer, oxide semiconductor layers with different properties are bonded to each other, whereby stable operation can be performed as compared with Schottky junction. Thus, the junction leakage can be reduced and the characteristics of the non-linear element can be improved.

公开(公告)号：US20180040741A1

公开(公告)日：2018-02-08

申请号：US15723479

申请日：2017-10-03

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hidekazu MIYAIRI ,  Kengo AKIMOTO ,  Yasuo NAKAMURA

IPC: H01L29/786 ,  H01L29/66 ,  H01L29/51 ,  H01L29/49 ,  H01L29/423 ,  H01L29/26 ,  H01L29/24 ,  H01L29/10 ,  H01L29/06 ,  H01L27/12 ,  H01L21/4763 ,  H01L21/467 ,  H01L21/465 ,  H01L21/3213 ,  H01L21/02

CPC classification number: H01L29/78696 ,  H01L21/02323 ,  H01L21/02565 ,  H01L21/32139 ,  H01L21/465 ,  H01L21/467 ,  H01L21/4763 ,  H01L21/47635 ,  H01L27/1225 ,  H01L29/0692 ,  H01L29/1033 ,  H01L29/24 ,  H01L29/263 ,  H01L29/42364 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/495 ,  H01L29/513 ,  H01L29/518 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/78618 ,  H01L29/78633 ,  H01L29/7869 ,  H01L29/78693

Abstract: To provide a method by which a semiconductor device including a thin film transistor with excellent electric characteristics and high reliability is manufactured with a small number of steps. After a channel protective layer is formed over an oxide semiconductor film containing In, Ga, and Zn, a film having n-type conductivity and a conductive film are formed, and a resist mask is formed over the conductive film. The conductive film, the film having n-type conductivity, and the oxide semiconductor film containing In, Ga, and Zn are etched using the channel protective layer and gate insulating films as etching stoppers with the resist mask, so that source and drain electrode layers, a buffer layer, and a semiconductor layer are formed.

公开(公告)号：US20170271378A1

公开(公告)日：2017-09-21

申请号：US15451540

申请日：2017-03-07

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Kenichi OKAZAKI ,  Hiroyuki MIYAKE ,  Kengo AKIMOTO ,  Masami JINTYOU ,  Takahiro IGUCHI

IPC: H01L27/12 ,  H01L29/04 ,  H01L29/24 ,  H01L29/786

CPC classification number: H01L27/1229 ,  H01L27/1222 ,  H01L27/1225 ,  H01L27/1251 ,  H01L27/3262 ,  H01L29/045 ,  H01L29/24 ,  H01L29/786 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78696

Abstract: A semiconductor device with a reduced layout area of transistors is provided. The semiconductor device includes a first transistor including a first oxide semiconductor film and a second transistor including a second oxide semiconductor film over a substrate. When the oxide semiconductor films are subjected to electron diffraction, the ratio of the integrated intensity of luminance of a diffraction spot derived from c-axis alignment to the integrated intensity of luminance of a diffraction spot derived from alignment in any direction in the first oxide semiconductor film is higher than that in the second oxide semiconductor film. In addition, part of the first transistor is located between the second transistor and the substrate.