公开(公告)号：US20120098689A1

公开(公告)日：2012-04-26

申请号：US13340321

申请日：2011-12-29

申请人： Yukio Tanaka

发明人： Yukio Tanaka

IPC分类号： H03M1/66

CPC分类号： H03M1/66 ,  G09G3/2011 ,  G09G3/3688 ,  G09G2310/027 ,  G09G2310/0289 ,  H03M1/662 ,  H03M1/682 ,  H03M1/765

摘要： A D/A conversion circuit in accordance with the present invention, which is provided with a switch swD, allows a writing operation of a voltage (a true gradation voltage) to be performed at a higher speed by first applying a first voltage (a voltage close to the true gradation voltage), which is supplied without passing through a resistor element, to an output line and then applying a second voltage (the true gradation voltage), which is supplied via the resistor element, to the output line. Thus, the present invention can provide a D/A conversion circuit capable of writing display data to liquid crystal cells with higher precision at higher speed, and a semiconductor device utilizing such a D/A conversion circuit.

摘要翻译： 根据本发明的具有开关swD的AD / A转换电路允许通过首先施加第一电压（电压近似）来以更高速度执行电压（真正灰度电压）的写入操作 到没有通过电阻器元件而提供的真实灰度电压）输出到输出线，然后将经由电阻器元件提供的第二电压（真实灰度电压）施加到输出线。 因此，本发明可以提供一种能够以更高的速度以更高的精度将显示数据写入液晶单元的D / A转换电路，以及利用这种D / A转换电路的半导体器件。

公开(公告)号：US08030659B2

公开(公告)日：2011-10-04

申请号：US12824747

申请日：2010-06-28

申请人： Shunpei Yamazaki ,  Satoshi Murakami ,  Jun Koyama ,  Yukio Tanaka ,  Hidehito Kitakado ,  Hideto Ohnuma

发明人： Shunpei Yamazaki ,  Satoshi Murakami ,  Jun Koyama ,  Yukio Tanaka ,  Hidehito Kitakado ,  Hideto Ohnuma

IPC分类号： H01L27/14

CPC分类号： G02F1/1368 ,  G02F1/133345 ,  G02F1/13454 ,  G02F1/136227 ,  G02F1/136286 ,  G02F2201/123 ,  G02F2202/104 ,  H01L27/12 ,  H01L27/1222 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1259 ,  H01L27/3248 ,  H01L27/3258 ,  H01L27/3262 ,  H01L27/3272 ,  H01L27/3276 ,  H01L29/458 ,  H01L29/78621 ,  H01L29/78627 ,  H01L29/78675 ,  H01L2029/7863 ,  H01L2227/323

摘要： This invention provides a semiconductor device having high operation performance and high reliability. An LDD region 707 overlapping with a gate wiring is arranged in an n-channel TFT 802 forming a driving circuit, and a TFT structure highly resistant to hot carrier injection is achieved. LDD regions 717, 718, 719 and 720 not overlapping with a gate wiring are arranged in an n-channel TFT 804 forming a pixel unit. As a result, a TFT structure having a small OFF current value is achieved. In this instance, an element belonging to the Group 15 of the Periodic Table exists in a higher concentration in the LDD region 707 than in the LDD regions 717, 718, 719 and 720.

摘要翻译： 本发明提供一种具有高操作性能和高可靠性的半导体器件。 在形成驱动电路的n沟道TFT 802中配置与栅极配线重叠的LDD区域707，能够实现高耐热载流子注入的TFT结构。 不与栅极布线重叠的LDD区域717,718,719和720被布置在形成像素单元的n沟道TFT 804中。 结果，实现了具有小的截止电流值的TFT结构。 在这种情况下，属于周期表第15族的元素在LDD区707中比在LDD区717,718,719和720中的浓度更高。

公开(公告)号：US08023042B2

公开(公告)日：2011-09-20

申请号：US10913415

申请日：2004-08-09

申请人： Shunpei Yamazaki ,  Satoshi Murakami ,  Jun Koyama ,  Yukio Tanaka ,  Hidehito Kitakado

发明人： Shunpei Yamazaki ,  Satoshi Murakami ,  Jun Koyama ,  Yukio Tanaka ,  Hidehito Kitakado

IPC分类号： H01L21/00

CPC分类号： H01L27/1255 ,  G02F1/13454 ,  G02F1/136209 ,  G02F1/136213 ,  G02F1/136286 ,  G02F1/1368 ,  H01L27/12 ,  H01L27/1214 ,  H01L27/124 ,  H01L29/78621 ,  H01L29/78627 ,  H01L29/78645 ,  H01L29/78651 ,  H01L29/78675

摘要： In an active matrix type liquid crystal display device, in which functional circuits such as a shift register circuit and a buffer circuit are incorporated on the same substrate, an optimal TFT structure is provided along with the aperture ratio of a pixel matrix circuit is increased. There is a structure in which an n-channel TFT, with a third impurity region which overlaps a gate electrode, is formed in a buffer circuit, etc., and an n-channel TFT, in which a fourth impurity region which does not overlap the gate electrode, is formed in a pixel matrix circuit. A storage capacitor formed in the pixel matrix circuit is formed by a light shielding film, a dielectric film formed on the light shielding film, and a pixel electrode. Al is especially used in the light shielding film, and the dielectric film is formed anodic oxidation process, using an Al oxide film.

摘要翻译： 在有源矩阵型液晶显示装置中，其中诸如移位寄存器电路和缓冲电路的功能电路并入同一衬底上，提供了最佳的TFT结构，同时增加了像素矩阵电路的孔径比。 存在这样的结构，其中在缓冲电路等中形成具有与栅电极重叠的第三杂质区的n沟道TFT，以及n沟道TFT，其中不重叠的第四杂质区 栅电极形成在像素矩阵电路中。 形成在像素矩阵电路中的保持电容器由遮光膜，形成在遮光膜上的电介质膜和像素电极形成。 Al特别用于遮光膜，并且使用Al氧化物膜形成电介质膜的阳极氧化工艺。

公开(公告)号：US20100328128A1

公开(公告)日：2010-12-30

申请号：US12827391

申请日：2010-06-30

申请人： Yukio Tanaka

发明人： Yukio Tanaka

IPC分类号： H03M1/66

CPC分类号： H03M1/66 ,  G09G3/2011 ,  G09G3/3688 ,  G09G2310/027 ,  G09G2310/0289 ,  H03M1/662 ,  H03M1/682 ,  H03M1/765

摘要： A D/A conversion circuit in accordance with the present invention, which is provided with a switch swD, allows a writing operation of a voltage (a true gradation voltage) to be performed at a higher speed by first applying a first voltage (a voltage close to the true gradation voltage), which is supplied without passing through a resistor element, to an output line and then applying a second voltage (the true gradation voltage), which is supplied via the resistor element, to the output line. Thus, the present invention can provide a D/A conversion circuit capable of writing display data to liquid crystal cells with higher precision at higher speed, and a semiconductor device utilizing such a D/A conversion circuit.

摘要翻译： 根据本发明的具有开关swD的AD / A转换电路允许通过首先施加第一电压（电压近似）来以更高速度执行电压（真正灰度电压）的写入操作 到没有通过电阻器元件而提供的真实灰度电压）输出到输出线，然后将经由电阻器元件提供的第二电压（真实灰度电压）施加到输出线。 因此，本发明可以提供一种能够以更高的速度以更高的精度将显示数据写入液晶单元的D / A转换电路，以及利用这种D / A转换电路的半导体器件。

公开(公告)号：US20100320148A1

公开(公告)日：2010-12-23

申请号：US12665854

申请日：2008-12-24

申请人： Atsuhiro Yukumoto ,  Hiroyuki Osora ,  Yoshio Seiki ,  Haruaki Hirayama ,  Kazuto Kobayashi ,  Yukio Tanaka

发明人： Atsuhiro Yukumoto ,  Hiroyuki Osora ,  Yoshio Seiki ,  Haruaki Hirayama ,  Kazuto Kobayashi ,  Yukio Tanaka

IPC分类号： B01D65/00 ,  B01D61/58 ,  B01D61/16

CPC分类号： B01D61/362 ,  B01D67/0048 ,  B01D71/027 ,  B01D71/028 ,  B01D71/38 ,  B01D71/56 ,  B01D71/64 ,  B01D2313/38 ,  B01D2317/022 ,  B01D2317/027 ,  B01D2323/12 ,  C07C29/76 ,  C07C31/08

摘要： A dehydrating system using multiple water separation membranes aims to prevent damage to the water separation membrane units and also to take appropriate measures against decrease in water permeation rate of the water separation membranes. Provided is a dehydrating system (100) for removing water from a target fluid, including at least two water separation membrane units (1, 2, 3) connected in series in a flow direction of the target fluid; two or more heat exchangers (11, 21, 31) respectively provided in front of the water separation membrane units (1, 2, 3), each of the heat exchangers (11, 21, 31) raising a temperature of the target fluid to a temperature which is lower than a boiling point of the target fluid but close to the boiling point.

摘要翻译： 使用多个水分离膜的脱水系统旨在防止水分离膜单元的损坏，并且还采取适当措施降低水分离膜的渗水速率。 提供一种用于从目标流体中除去水的脱水系统（100），其包括沿着目标流体的流动方向串联连接的至少两个水分离膜单元（1,2,3） 分别设置在水分离膜单元（1,2,3）前面的两个或多个热交换器（11,21,31），每个热交换器（11,21,31）将目标流体的温度升高到 其温度低于目标流体的沸点但接近沸点。

公开(公告)号：US07750833B2

公开(公告)日：2010-07-06

申请号：US12188739

申请日：2008-08-08

申请人： Yukio Tanaka

发明人： Yukio Tanaka

IPC分类号： H03M1/66

CPC分类号： H03M1/66 ,  G09G3/2011 ,  G09G3/3688 ,  G09G2310/027 ,  G09G2310/0289 ,  H03M1/662 ,  H03M1/682 ,  H03M1/765

摘要： A D/A conversion circuit in accordance with the present invention, which is provided with a switch swD, allows a writing operation of a voltage (a true gradation voltage) to be performed at a higher speed by first applying a first voltage (a voltage close to the true gradation voltage), which is supplied without passing through a resistor element, to an output line and then applying a second voltage (the true gradation voltage), which is supplied via the resistor element, to the output line. Thus, the present invention can provide a D/A conversion circuit capable of writing display data to liquid crystal cells with higher precision at higher speed, and a semiconductor device utilizing such a D/A conversion circuit.

摘要翻译： 根据本发明的具有开关swD的AD / A转换电路允许通过首先施加第一电压（电压近似）来以更高速度执行电压（真正灰度电压）的写入操作 到没有通过电阻器元件而提供的真实灰度电压）输出到输出线，然后将经由电阻器元件提供的第二电压（真实灰度电压）施加到输出线。 因此，本发明可以提供一种能够以更高的速度以更高的精度将显示数据写入液晶单元的D / A转换电路，以及利用这种D / A转换电路的半导体器件。

公开(公告)号：US07663613B2

公开(公告)日：2010-02-16

申请号：US10159288

申请日：2002-06-03

申请人： Yukio Tanaka ,  Munehiro Azami ,  Yasushi Kubota ,  Hajime Washio

发明人： Yukio Tanaka ,  Munehiro Azami ,  Yasushi Kubota ,  Hajime Washio

IPC分类号： G09G5/00 ,  G06F3/038

CPC分类号： G09G3/3688 ,  G09G2310/027 ,  G09G2310/0297

摘要： An occupying area of a digital system signal line driver circuit in an image display device is large and this hinders the miniaturization of the display device. A memory circuit and a D/A converter circuit in the signal line driver circuit are commonly used for n (“n” is a natural number equal to or larger than 2) signal lines. One horizontal scanning period is divided into n periods and the memory circuit and the D/A converter circuit each perform processing for different signal lines during each of the divided periods. Thus, all the signal lines can be driven. Therefore, the number of memory circuits and the number of D/A converter circuits in the signal line driver circuit can be reduced to one n-th in a conventional case.

摘要翻译： 图像显示装置中的数字系统信号线驱动电路的占有面积大，妨碍显示装置的小型化。 信号线驱动电路中的存储电路和D / A转换电路通常用于n（“n”是等于或大于2的自然数）的信号线。 一个水平扫描周期被分为n个周期，并且存储器电路和D / A转换器电路在每个分割周期期间各自执行不同信号线的处理。 因此，可以驱动所有的信号线。 因此，在常规情况下，信号线驱动电路中的存储电路数量和D / A转换电路的数量可以减少到1 / n。

公开(公告)号：US20090295704A1

公开(公告)日：2009-12-03

申请号：US12431348

申请日：2009-04-28

申请人： Yukio Tanaka ,  Keisuke Hayashi

发明人： Yukio Tanaka ,  Keisuke Hayashi

IPC分类号： G09G3/36

CPC分类号： G11C19/00 ,  G09G3/20 ,  G09G3/3677 ,  G09G3/3688 ,  G09G2300/0408 ,  G09G2310/0224 ,  G09G2310/027 ,  G09G2310/0281 ,  G11C19/28 ,  H01L27/12 ,  H01L27/1214

摘要： There is provided a driving circuit which is simple and has a small occupied area. A shift register circuit of the present invention includes a plurality of register circuits. Each of the register circuits includes a clocked inverter circuit and an inverter circuit. Both are connected in series with each other so that an output signal of the clocked inverter circuit becomes an input signal of the inverter circuit. Further, the register circuit includes a signal line by which an output signal of the inverter circuit is transmitted. Since a number of elements are connected to the signal line and parasitic capacitance is large, it has a high load. The shift register circuit of the present invention uses the fact that since the parasitic capacitance of the signal line is large, it has a high load.

摘要翻译： 提供了一种简单且占用面积小的驱动电路。 本发明的移位寄存器电路包括多个寄存器电路。 每个寄存器电路包括时钟反相电路和反相器电路。 两者彼此串联连接，使得时钟反相器电路的输出信号变为逆变器电路的输入信号。 此外，寄存器电路包括发送反相器电路的输出信号的信号线。 由于许多元件连接到信号线并且寄生电容大，所以它具有高负载。 本发明的移位寄存器电路使用由于信号线的寄生电容大而具有高负载的事实。