公开(公告)号：US20060202266A1

公开(公告)日：2006-09-14

申请号：US11080765

申请日：2005-03-14

Applicant: Marko Radosavljevic ,  Suman Datta ,  Brian Doyle ,  Jack Kavalieros ,  Justin Brask ,  Mark Doczy ,  Amian Majumdar ,  Robert Chau

Inventor： Marko Radosavljevic ,  Suman Datta ,  Brian Doyle ,  Jack Kavalieros ,  Justin Brask ,  Mark Doczy ,  Amian Majumdar ,  Robert Chau

IPC: H01L29/772 ,  H01L21/336

CPC classification number: H01L29/41791 ,  H01L21/3141 ,  H01L23/485 ,  H01L29/66636 ,  H01L29/7843 ,  H01L29/785 ,  H01L29/78621 ,  H01L29/78681 ,  H01L29/78684 ,  H01L2029/7858 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device comprising a gate electrode formed on a gate dielectric layer formed on a semiconductor film. A pair of source/drain regions are formed adjacent the channel region on opposite sides of the gate electrode. The source and drain regions each comprise a semiconductor portion adjacent to and in contact with the semiconductor channel and a metal portion adjacent to and in contact with the semiconductor portion.

Abstract translation: 一种半导体器件，包括形成在形成在半导体膜上的栅极电介质层上的栅电极。 一对源极/漏极区域形成在栅电极的相对侧上的沟道区域附近。 源极和漏极区域各自包括与半导体沟道相邻并与其接触的半导体部分和与半导体部分相邻并与其接触的金属部分。

公开(公告)号：US20060189156A1

公开(公告)日：2006-08-24

申请号：US11064648

申请日：2005-02-23

Applicant: Mark Doczy ,  Jack Kavalieros ,  Justin Brask ,  Matthew Metz ,  Suman Datta ,  Brian Doyle ,  Robert Chau

Inventor： Mark Doczy ,  Jack Kavalieros ,  Justin Brask ,  Matthew Metz ,  Suman Datta ,  Brian Doyle ,  Robert Chau

IPC: H01L21/31 ,  H01L21/469

CPC classification number: H01L21/02244 ,  H01L21/02175 ,  H01L21/28194 ,  H01L21/28229 ,  H01L21/31683 ,  H01L21/31691 ,  H01L29/495 ,  H01L29/513 ,  H01L29/517 ,  H01L29/78

Abstract: A method for making a semiconductor device is described. That method comprises forming a high-k gate dielectric layer that contacts a metal oxide layer. The metal oxide layer is generated by forming a metal layer, then oxidizing the metal layer.

Abstract translation: 描述制造半导体器件的方法。 该方法包括形成接触金属氧化物层的高k栅介质层。 金属氧化物层通过形成金属层，然后氧化金属层而产生。

公开(公告)号：US07060568B2

公开(公告)日：2006-06-13

申请号：US10881055

申请日：2004-06-30

Applicant: Matthew V. Metz ,  Suman Datta ,  Jack Kavalieros ,  Mark L. Doczy ,  Justin K. Brask ,  Robert S. Chau

Inventor： Matthew V. Metz ,  Suman Datta ,  Jack Kavalieros ,  Mark L. Doczy ,  Justin K. Brask ,  Robert S. Chau

IPC: H01L21/8234 ,  H01L21/336 ,  H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

CPC classification number: H01L21/823828 ,  H01L21/823857

Abstract: Complementary metal oxide semiconductor integrated circuits may be formed with NMOS and PMOS transistors having different gate dielectrics. The different gate dielectrics may be formed, for example, by a replacement process. The gate dielectrics may differ in material, thickness, or formation techniques, as a few examples.

公开(公告)号：US20060121678A1

公开(公告)日：2006-06-08

申请号：US11006218

申请日：2004-12-07

Applicant: Justin Brask ,  Sangwoo Pae ,  Jack Kavalieros ,  Matthew Metz ,  Mark Doczy ,  Suman Datta ,  Robert Chau ,  Jose Maiz

Inventor： Justin Brask ,  Sangwoo Pae ,  Jack Kavalieros ,  Matthew Metz ,  Mark Doczy ,  Suman Datta ,  Robert Chau ,  Jose Maiz

IPC: H01L21/336

CPC classification number: H01L29/66545 ,  H01L21/28079 ,  H01L21/28194 ,  H01L21/28202 ,  H01L29/495 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518

Abstract: A method for making a semiconductor device is described. That method comprises adding nitrogen to a silicon dioxide layer to form a nitrided silicon dioxide layer on a substrate. After forming a sacrificial layer on the nitrided silicon dioxide layer, the sacrificial layer is removed to generate a trench. A high-k gate dielectric layer is formed on the nitrided silicon dioxide layer within the trench, and a metal gate electrode is formed on the high-k gate dielectric layer.

Abstract translation: 描述制造半导体器件的方法。 该方法包括向二氧化硅层中加入氮以在基底上形成氮化二氧化硅层。 在氮化二氧化硅层上形成牺牲层之后，除去牺牲层以产生沟槽。 在沟槽内的氮化二氧化硅层上形成高k栅介质层，在高k栅介质层上形成金属栅电极。

公开(公告)号：US20060121668A1

公开(公告)日：2006-06-08

申请号：US11254338

申请日：2005-10-19

Applicant: Matthew Metz ,  Suman Datta ,  Mark Doczy ,  Jack Kavalieros ,  Justin Brask ,  Robert Chau

Inventor： Matthew Metz ,  Suman Datta ,  Mark Doczy ,  Jack Kavalieros ,  Justin Brask ,  Robert Chau

IPC: H01L21/8238

CPC classification number: H01L21/28088 ,  H01L21/823842 ,  H01L21/823857 ,  H01L29/4966

Abstract: A method for making a titanium carbide layer is described. That method comprises alternately introducing a carbon containing precursor and a titanium containing precursor into a chemical vapor deposition reactor, while a substrate is maintained at a selected temperature. The reactor is operated for a sufficient time, and pulse times are selected for the carbon containing precursor and the titanium containing precursor, to form a titanium carbide layer of a desired thickness and workfunction on the substrate.

Abstract translation: 对碳化钛层的制造方法进行说明。 该方法包括在将基底保持在选定温度的同时将含碳前体和含钛前体交替引入化学气相沉积反应器。 反应器运行足够的时间，并且对于含碳的前体和含钛的前体选择脉冲时间，以在基底上形成所需厚度和功函数的碳化钛层。

公开(公告)号：US07045428B2

公开(公告)日：2006-05-16

申请号：US10855635

申请日：2004-05-26

Applicant: Justin K. Brask ,  Jack Kavalieros ,  Mark L. Doczy ,  Matthew V. Metz ,  Uday Shah ,  Chris E. Barns ,  Suman Datta ,  Robert B. Turkot, Jr. ,  Robert S. Chau

Inventor： Justin K. Brask ,  Jack Kavalieros ,  Mark L. Doczy ,  Matthew V. Metz ,  Uday Shah ,  Chris E. Barns ,  Suman Datta ,  Robert B. Turkot, Jr. ,  Robert S. Chau

IPC: H01L21/8234

CPC classification number: H01L29/66545 ,  H01L21/76895 ,  H01L21/823842 ,  H01L21/823857 ,  H01L21/823871

Abstract: A method for making a semiconductor device is described. That method comprises forming on a substrate a first gate dielectric layer that has a first substantially vertical component, then forming a first metal layer on the first gate dielectric layer. After forming on the substrate a second gate dielectric layer that has a second substantially vertical component, a second metal layer is formed on the second gate dielectric layer. In this method, a conductor is formed that contacts both the first metal layer and the second metal layer.

Abstract translation: 描述制造半导体器件的方法。 该方法包括在衬底上形成具有第一基本垂直分量的第一栅极电介质层，然后在第一栅极电介质层上形成第一金属层。 在衬底上形成具有第二基本垂直分量的第二栅介质层之后，在第二栅介质层上形成第二金属层。 在该方法中，形成与第一金属层和第二金属层接触的导体。

公开(公告)号：US07037845B2

公开(公告)日：2006-05-02

申请号：US10652546

申请日：2003-08-28

Applicant: Justin K. Brask ,  Uday Shah ,  Mark L. Doczy ,  Jack Kavalieros ,  Robert S. Chau ,  Robert B. Turkot, Jr. ,  Matthew V. Metz

Inventor： Justin K. Brask ,  Uday Shah ,  Mark L. Doczy ,  Jack Kavalieros ,  Robert S. Chau ,  Robert B. Turkot, Jr. ,  Matthew V. Metz

IPC: H01L21/302

CPC classification number: H01L21/31111

Abstract: A method for making a semiconductor device is described. That method comprises forming a high-k gate dielectric layer on a substrate, and modifying a first portion of the high-k gate dielectric layer to ensure that it may be removed selectively to a second portion of the high-k gate dielectric layer.

Abstract translation: 描述制造半导体器件的方法。 该方法包括在衬底上形成高k栅极电介质层，以及修改高k栅极电介质层的第一部分，以确保其可被选择性地去除到高k栅极电介质层的第二部分。

公开(公告)号：US20060071285A1

公开(公告)日：2006-04-06

申请号：US10953295

申请日：2004-09-29

Applicant: Suman Datta ,  Jack Kavalieros ,  Mark Doczy ,  Matthew Metz ,  Justin Brask ,  Robert Chau ,  Brian Doyle

Inventor： Suman Datta ,  Jack Kavalieros ,  Mark Doczy ,  Matthew Metz ,  Justin Brask ,  Robert Chau ,  Brian Doyle

IPC: H01L29/78 ,  H01L21/8238

CPC classification number: H01L21/28079 ,  H01L21/26586 ,  H01L21/28088 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/823807 ,  H01L21/823842 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/6659 ,  H01L29/7833 ,  H01L29/7845

Abstract: In a metal gate replacement process, strain may be selectively induced in the channels of NMOS and PMOS transistors. For example, a material having a higher coefficient of thermal expansion than the substrate may be used to form the gate electrodes of PMOS transistors. A material with a lower coefficient of thermal expansion than that of the substrate may be used to form the gate electrodes of NMOS transistors.

Abstract translation: 在金属栅极替换工艺中，可以在NMOS和PMOS晶体管的沟道中选择性地诱发应变。 例如，可以使用具有比衬底更高的热膨胀系数的材料来形成PMOS晶体管的栅电极。 可以使用具有比基板的热膨胀系数更低的热膨胀系数的材料来形成NMOS晶体管的栅电极。

公开(公告)号：US20060068591A1

公开(公告)日：2006-03-30

申请号：US11240440

申请日：2005-09-29

Applicant: Marko Radosavljevic ,  Amlan Majumdar ,  Suman Datta ,  Jack Kavalieros ,  Brian Doyle ,  Justin Brask ,  Robert Chau

Inventor： Marko Radosavljevic ,  Amlan Majumdar ,  Suman Datta ,  Jack Kavalieros ,  Brian Doyle ,  Justin Brask ,  Robert Chau

IPC: H01L21/302

CPC classification number: H01L29/42392 ,  H01L21/28079 ,  H01L21/28194 ,  H01L29/0673 ,  H01L29/41775 ,  H01L29/495 ,  H01L29/51 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66606 ,  H01L29/66636 ,  H01L29/66742 ,  H01L29/7834 ,  H01L29/78618 ,  H01L29/78696 ,  Y10S438/926 ,  Y10S438/957

Abstract: A method for fabricating a field-effect transistor with a gate completely wrapping around a channel region is described. Ion implantation is used to make the oxide beneath the channel region of the transistor more etchable, thereby allowing the oxide to be removed below the channel region. Atomic layer deposition is used to form a gate dielectric and a metal gate entirely around the channel region once the oxide is removed below the channel region.

Abstract translation: 描述了一种制造具有完全围绕通道区域的栅极的场效应晶体管的方法。 离子注入用于使晶体管的沟道区下方的氧化物更易蚀刻，从而允许在沟道区下方除去氧化物。 一旦氧化物在通道区域下方被去除，原子层沉积被用于在通道区域的整个周围形成栅极电介质和金属栅极。

公开(公告)号：US20060060930A1

公开(公告)日：2006-03-23

申请号：US10943693

申请日：2004-09-17

Applicant: Matthew Metz ,  Clifford Boyd ,  Markus Kuhn ,  Suman Datta ,  Jack Kavalieros ,  Mark Doczy ,  Justin Brask ,  Robert Chau

Inventor： Matthew Metz ,  Clifford Boyd ,  Markus Kuhn ,  Suman Datta ,  Jack Kavalieros ,  Mark Doczy ,  Justin Brask ,  Robert Chau

IPC: H01L29/76 ,  H01L21/336

CPC classification number: H01L29/517 ,  H01L21/28185 ,  H01L21/28194 ,  H01L29/7833

Abstract: Gate dielectrics formed of silicates of hafnium or zirconium dioxide may be formed by atomic layer deposition. The precursors for the atomic layer deposition may include an oxidant, a silicate precursor, and a zirconium or hafnium precursor.

Abstract translation: 可以通过原子层沉积形成由铪或二氧化锆的硅酸盐形成的栅极电介质。 原子层沉积的前体可以包括氧化剂，硅酸盐前体和锆或铪前体。