公开(公告)号：US20230032080A1

公开(公告)日：2023-02-02

申请号：US17388284

申请日：2021-07-29

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Alexander M. Derrickson ,  Mankyu Yang ,  Judson R. Holt ,  Jagar Singh ,  Alexander L. Martin ,  Richard F. Taylor, III

IPC: H01L29/735 ,  H01L29/417 ,  H01L29/08 ,  H01L29/66

Abstract: Disclosed is a semiconductor structure that includes an asymmetric lateral bipolar junction transistor (BJT). The BJT includes an emitter, a base, a collector extension and a collector arranged side-by-side (i.e., laterally) across a semiconductor layer. The emitter, collector and collector extension have a first type conductivity with the collector extension having a lower conductivity level than either the emitter or the collector. The base has a second type conductivity that is different from the first type conductivity. With such a lateral configuration, the BJT can be easily integrated with CMOS devices on advanced SOI technology platforms. With such an asymmetric configuration and, particularly, given the inclusion of the collector extension but not an emitter extension, the BJT can achieve a relatively high collector-emitter breakdown voltage (Vbr-CEO) without a significant risk of leakage currents at high voltages. Also disclosed are method embodiments for forming such a semiconductor structure.

公开(公告)号：US11569738B1

公开(公告)日：2023-01-31

申请号：US17488380

申请日：2021-09-29

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Siva K. Chinthu

IPC: H02M3/07

Abstract: Disclosed is a multi-stage charge pump. A first stage is controlled by a first clock signal. A second stage is controlled by a second clock signal, which has high and low states that are shifted relative to the high and low states of the first clock signal. The high and low states of the second clock signal can be higher than the high and low states, respectively, of the first clock signal for a positive charge pump and vice versa for a negative charge pump. Any additional stage is similarly controlled by an additional clock signal that is shifted with respect to the clock signal controlling the immediately preceding stage. By shifting the high and low states of clock signals controlling downstream stages, the need for series-connected or high voltage capacitors in the downstream stages is eliminated and circuit complexity and area consumption are reduced.

公开(公告)号：US11569180B2

公开(公告)日：2023-01-31

申请号：US17400847

申请日：2021-08-12

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Nicholas A. Polomoff ,  Jae Kyu Cho ,  Mohamed A. Rabie ,  Andreas D. Stricker

IPC: H01L23/522 ,  H01L31/02 ,  H01L33/62 ,  H01L23/00

Abstract: Structures for an optical fiber groove and methods of forming a structure for an optical fiber groove. A photonics chip includes a substrate and an interconnect structure over the substrate. The photonics chip has a first exterior corner, a second exterior corner, and a side edge extending from the first exterior corner to the second exterior corner. The substrate includes a groove positioned along the side edge between the first exterior corner and the second exterior corner. The groove is arranged to intersect the side edge at a groove corner, and the interconnect structure includes metal structures adjacent to the first groove corner. The metal structures extend diagonally in the interconnect structure relative to the side edge of the photonics chip.

公开(公告)号：US11567266B1

公开(公告)日：2023-01-31

申请号：US17551377

申请日：2021-12-15

Applicant: GlobalFoundries U.S. Inc.

Inventor： Judson Holt ,  Yusheng Bian ,  Qizhi Liu ,  Elizabeth Strehlow

IPC: G02B6/34 ,  G02B6/124 ,  G02B6/12 ,  G02B6/293 ,  G02B6/42

Abstract: Structures for a grating coupler and methods of fabricating a structure for a grating coupler. The structure includes a grating coupler having a central portion and edge portions. The central portion and the edge portions define a sidewall, and the central portion and the edge portions have a first longitudinal axis along which the edge portions are arranged in a spaced relationship. Each edge portion projects from the sidewall at an angle relative to the first longitudinal axis. A waveguide core is optically coupled to the grating coupler. The first longitudinal axis is aligned in a first direction, and the waveguide core has a second longitudinal axis that is aligned in a second direction different from the first direction.

公开(公告)号：US11567261B2

公开(公告)日：2023-01-31

申请号：US17173639

申请日：2021-02-11

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Yusheng Bian ,  Roderick A. Augur ,  Kenneth J. Giewont ,  Karen Nummy

IPC: G02B6/122 ,  G02B6/12 ,  F21V8/00 ,  G02B6/14

Abstract: Structures for an edge coupler and methods of forming a structure for an edge coupler. The structure includes a waveguide core over a dielectric layer, and a back-end-of-line stack over the waveguide core and the dielectric layer. The back-end-of-line stack includes an interlayer dielectric layer, a side edge, a first feature, a second feature, and a third feature laterally arranged between the first feature and the second feature. The first feature, the second feature, and the third feature are positioned on the interlayer dielectric layer adjacent to the side edge, and the third feature has an overlapping relationship with a tapered section of the waveguide core.

公开(公告)号：US11550200B2

公开(公告)日：2023-01-10

申请号：US16808613

申请日：2020-03-04

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Yusheng Bian ,  Ajey Poovannummoottil Jacob

IPC: G02F1/313

Abstract: One illustrative device disclosed herein includes a lower waveguide structure and an upper body structure positioned above at least a portion of the lower waveguide structure. In this example, the device also includes a grating structure positioned in the upper body structure, wherein the grating structure comprises a plurality of grating elements that comprise a tunable material whose index of refraction may be changed by application of energy to the tunable material.

公开(公告)号：US11545575B2

公开(公告)日：2023-01-03

申请号：US16919225

申请日：2020-07-02

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Man Gu ,  Wenjun Li ,  Sudarshan Narayanan

IPC: H01L29/78 ,  H01L29/66 ,  H01L29/423 ,  H01L21/762 ,  H01L21/8234 ,  H01L21/8238

Abstract: An integrated circuit (IC) structure includes a semiconductor fin having a first longitudinal extent and a second longitudinal extent. The semiconductor fin has an upper fin portion having a uniform lateral dimension in the first longitudinal extent and the second longitudinal extent, a first subfin portion under the upper fin portion in the first longitudinal extent having a first lateral dimension, and a second subfin portion under the upper fin portion in the second longitudinal extent having a second lateral dimension different than the first lateral dimension. The second subfin may be used in a drain extension region of a laterally-diffused metal-oxide semiconductor (LDMOS) device. The second subfin reduces subfin current and improves HCI reliability, regardless of the type of LDMOS device.

公开(公告)号：US11543606B2

公开(公告)日：2023-01-03

申请号：US17196428

申请日：2021-03-09

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Nicholas A. Polomoff ,  Jae Kyu Cho ,  Frank Kuechenmeister ,  John J. Ellis-Monaghan ,  Michal Rakowski

IPC: G02B6/42 ,  G02B6/122 ,  G02B6/13 ,  F21V8/00

Abstract: Structures including an edge coupler and a crackstop, as well as methods of forming a structure including an edge coupler and a crackstop. A waveguide core and a crackstop are located over a top surface of a dielectric layer. A communication passageway is either optically coupled or electrically coupled to the waveguide core. The communication passageway, which may include an electric conductor or a buried waveguide core, extends laterally beneath the crackstop.

公开(公告)号：US20220413217A1

公开(公告)日：2022-12-29

申请号：US17358255

申请日：2021-06-25

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Subramanian Krishnamurthy ,  Yusheng Bian

IPC: G02B6/122 ,  G02B6/13

Abstract: Structures for an optical power splitter and methods of forming a structure for an optical power splitter. The structure includes a first waveguide core having a first arm, a second waveguide core including a second arm, and a third waveguide core having a third arm laterally positioned between the first arm and the second arm. The third arm has a longitudinal axis. The first arm is longitudinally offset from the third arm parallel to the longitudinal axis such that the third arm and the first arm are laterally adjacent over a first overlap distance. The second arm is longitudinally offset from the third arm parallel to the longitudinal axis such that the third arm and the second arm are laterally adjacent over a second overlap distance. The first overlap distance is greater than the second overlap distance to provide an overlap offset.

公开(公告)号：US11538856B2

公开(公告)日：2022-12-27

申请号：US15930577

申请日：2020-05-13

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Hemant Dixit ,  Vinayak Bharat Naik

IPC: H01L21/02 ,  H01L27/22 ,  G11C11/16 ,  H01L43/10 ,  H01F41/34 ,  H01L43/02 ,  H01L43/12 ,  H01F10/32

Abstract: One illustrative MRAM cell disclosed herein includes a bottom electrode, a top electrode positioned above the bottom electrode and an MTJ (Magnetic Tunnel Junction) element positioned above the bottom electrode and below the top electrode. In this example, the MTJ element includes a bottom insulation layer positioned above the bottom electrode, a top insulation layer positioned above the bottom electrode; and a first ferromagnetic material layer positioned between the bottom insulation layer and the top insulation layer.