Data transmission system and method
    181.
    发明申请
    Data transmission system and method 失效
    数据传输系统及方法

    公开(公告)号:US20080056345A1

    公开(公告)日:2008-03-06

    申请号:US11708557

    申请日:2007-02-21

    CPC classification number: H03M5/145

    Abstract: Data transmission system and method are provided. The transmission system includes a data converter and data restoring unit. The data converter converts N-bit first data to be transmitted into M-bit second data, where M is greater than N and the second data is arranged in a minimum unit greater than 1, each minimum unit including at least successive data bits having the same phase. The transmitter compresses the second data prior to transmission via a channel having performance characteristics defining a minimum pulse width, and a receiver receives and de-compresses the transmitted second data. The data restoring unit then restores the first data from the second.

    Abstract translation: 提供数据传输系统和方法。 传输系统包括数据转换器和数据恢复单元。 数据转换器将要发送的N位第一数据转换成M位第二数据,其中M大于N,第二数据以大于1的最小单位排列,每个最小单位包括至少连续的数据位, 相同阶段 发射机在通过具有定义最小脉冲宽度的性能特征的信道进行传输之前压缩第二数据,并且接收机接收和解压缩传输的第二数据。 数据恢复单元然后从第二数据恢复第一数据。

    Semiconductor device, related method, and printed circuit board
    182.
    发明申请
    Semiconductor device, related method, and printed circuit board 失效
    半导体器件,相关方法和印刷电路板

    公开(公告)号:US20080012661A1

    公开(公告)日:2008-01-17

    申请号:US11797988

    申请日:2007-05-09

    Abstract: A semiconductor device, a method related to the semiconductor device, and a printed circuit board are disclosed. The semiconductor device includes a chip, a package including a plurality of power voltage terminals and a plurality of ground voltage terminals, wherein the chip is disposed in the package. The semiconductor device further includes an impedance circuit connected between a DC component power voltage terminal and a ground voltage, wherein the DC component power voltage terminal is one of the plurality of power voltage terminals, and an AC component interrupter connected between the DC component power voltage terminal and a power voltage. Both the AC component and a DC component of the power voltage are applied to each of the power voltage terminals except the DC component second power voltage terminal, and the ground voltage is applied to each of the ground voltage terminals.

    Abstract translation: 公开了半导体器件,与半导体器件相关的方法和印刷电路板。 半导体器件包括芯片,包括多个电源电压端子和多个接地电压端子的封装,其中芯片设置在封装中。 半导体装置还包括连接在直流分量电源端子和接地电压之间的阻抗电路,其中直流分量电源电压端子是多个电源电压端子中的一个,以及连接在直流分量电源电压 端子和电源电压。 除了直流分量第二电力电压端子之外,将电力电压的交流分量和直流分量都施加到各电力电压端子,并且将接地电压施加到每个接地电压端子。

    Memory module and signal line arrangement method thereof
    183.
    发明申请
    Memory module and signal line arrangement method thereof 有权
    存储模块及其信号线排列方法

    公开(公告)号:US20060207788A1

    公开(公告)日:2006-09-21

    申请号:US11357500

    申请日:2006-02-17

    Abstract: In a memory module and a signal line arrangement method thereof, the memory module comprises: memory chips mounted on both sides of the module in a mirrored configuration; and a printed circuit board (PCB) having same signal applying contact pads arranged on both sides in contact with same signal applying balls of the memory chips in the mirrored configuration, the PCB including a via at a location proximal to the same signal applying contact pad of one side of the PCB among the same signal applying contact pads arranged on both sides in the mirrored configuration, the via connecting an other side of the PCB to the one side of the PCB, and a contact junction connected to the same signal applying contact pad of the other side of the PCB, the contact junction being connected to the via of the other side of the PCB, and the via of the one side of the PCB being connected to the same signal applying contact pad of the one side of the PCB, the contact junction connected to a signal terminal from the other side of the PCB.

    Abstract translation: 在存储器模块及其信号线布置方法中,存储器模块包括:以镜像配置安装在模块两侧的存储器芯片; 以及具有相同信号的印刷电路板(PCB),其施加布置在两侧的接触焊盘,以与镜像配置中的存储器芯片的相同信号施加球接触,PCB包括位于相邻信号施加接触垫 在布置在镜面配置两侧的相同信号施加接触垫中的PCB的一侧,通孔将PCB的另一侧连接到PCB的一侧,以及连接到相同信号的接触点施加接触 PCB的另一侧的焊盘,接触点连接到PCB的另一侧的通孔,并且PCB的一侧的通孔连接到施加与该PCB的一侧的接触焊盘相同的信号 PCB,接触点从PCB的另一侧连接到信号端子。

    System board
    184.
    发明授权
    System board 有权
    系统板

    公开(公告)号:US06870742B2

    公开(公告)日:2005-03-22

    申请号:US10200731

    申请日:2002-07-22

    Abstract: A system board includes a control unit; connectors arranged in series in one direction and accepting a connecting means for inputting and outputting data; and signal lines connecting the control unit to the connectors and including at least one branch point, wherein sub signal lines branched off at the same branch point are equal in length and/or loads of path from the branch point to the connecting means.

    Abstract translation: 系统板包括控制单元; 连接器在一个方向上串联布置并且接受用于输入和输出数据的连接装置; 以及将控制单元连接到连接器并且包括至少一个分支点的信号线,其中在相同分支点处分支的子信号线在从分支点到连接装置的路径的长度和/或负载相等。

    Memory system with improved signal integrity
    185.
    发明申请
    Memory system with improved signal integrity 审中-公开
    具有改善信号完整性的存储系统

    公开(公告)号:US20050002241A1

    公开(公告)日:2005-01-06

    申请号:US10837610

    申请日:2004-05-04

    CPC classification number: G06F13/4086

    Abstract: A memory system includes a memory controller, a memory bus connected to the memory controller, and a plurality of memory modules connected along the memory bus, where each of the memory modules includes a plurality of memory devices. The system also includes a dummy stub or a dummy module connected to the memory bus between the memory controller and the memory module closest to the memory controller among the plurality of memory modules. The dummy stub or dummy module improves a signal integrity of at least the memory module closest to the memory controller.

    Abstract translation: 存储器系统包括存储器控制器,连接到存储器控制器的存储器总线以及沿着存储器总线连接的多个存储器模块,其中每个存储器模块包括多个存储器件。 该系统还包括连接到存储器总线之间的存储器控​​制器和位于多个存储器模块中最靠近存储器控制器的存储器模块之间的虚拟存根或虚拟模块。 虚拟短线或虚拟模块改善了至少与存储器控制器最接近的存储器模块的信号完整性。

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