Loopback technique for IQ imbalance estimation for calibration in OFDM systems
    181.
    发明授权
    Loopback technique for IQ imbalance estimation for calibration in OFDM systems 有权
    用于IQ系统校准的IQ不平衡估计的环回技术

    公开(公告)号:US09344302B2

    公开(公告)日:2016-05-17

    申请号:US14423757

    申请日:2013-09-10

    Applicant: ST-Ericsson SA

    Inventor: Achraf Dhayni

    Abstract: A transceiver for orthogonal frequency division multiplex communication has a transmitter module (1) and a receiver module (2). The transmitter (1) has an l-path (3) and a Q-path (4) to receive signals on a number of subcarriers provided by a signal generator (9). The receiver module (2) has a receiver l-path (7) and a receiver Q-path (8) to deliver signals to a processor (15). IQ imbalance is calculated for each of the transmitter and receiver by the signal generator sending a sample signal (Xl(k), XQ(k)) over a one of the transmitter paths. The signal is then applied to one or each of the inputs to the receiver paths (7,8) to generate receiver output signals Yl(k), YQ(k), RQ(k). The processor (15) is responsive to the output signals to calculate the transmitter and receiver IQ imbalance for that subcarrier. A calibrator (19) and compensator (20) are responsive to the calculated IQ imbalance to correct or compensate each subcarrier of the transceiver band.

    Abstract translation: 用于正交频分复用通信的收发机具有发射机模块(1)和接收机模块(2)。 发射机(1)具有1路径(3)和Q路径(4),以在由信号发生器(9)提供的多个子载波上接收信号。 接收器模块(2)具有接收器1路径(7)和用于将信号传送到处理器(15)的接收器Q路径(8)。 通过信号发生器通过发送器路径之一发送采样信号(X1(k),XQ(k)),为每个发射机和接收机计算IQ不平衡。 然后将信号施加到接收器路径(7,8)的一个或每个输入以产生接收机输出信号Y1(k),YQ(k),RQ(k)。 处理器(15)响应于输出信号来计算该子载波的发射机和接收机IQ不平衡。 校准器(19)和补偿器(20)响应于所计算的IQ不平衡来校正或补偿收发器频带的每个子载波。

    Circuit for use with a loudspeaker for portable equipments

    公开(公告)号:US09288574B2

    公开(公告)日:2016-03-15

    申请号:US14374929

    申请日:2013-02-11

    Applicant: ST-Ericsson SA

    Abstract: The invention relates to a circuit (100) for use with a loudspeaker (104) having a first differential input terminal (t1) and a second differential input terminal (t2), the circuit (100) comprising: a differential power amplifier (103) having a first differential output terminal (t3) operatively connected to the first differential input terminal (t1) of the loudspeaker (104) and a second differential output terminal (t4) operatively connected to the second differential input terminal (t2) of the loudspeaker (104);—a first resistor (RS1) disposed between the first differential output terminal (t3) of the differential power amplifier (103) and the first differential input terminal (t1) of the loudspeaker (104); a second resistor (RS2) disposed between the second differential output terminal (t4) of the differential power amplifier (103) and the second differential input terminal (t2) of the loudspeaker (104). The circuit (100) further comprises: a first resistive module (RR1, RR2) arranged to generate on a respective output terminal (t5) a first control voltage (VIN), the first resistive module (RR1, RR2) having a first input terminal (t6) connected to the first differential output terminal (t3) of the power amplifier (103) and a second input terminal (t7) connected to the second differential input terminal (t2) of the loudspeaker (104), a second resistive module (RR3, RR4) arranged to generate on a respective output terminal (t8) a second control voltage (VIP), the second resistive module (RR3, RR4) having a first input terminal (t9) connected to the second differential output terminal (t4) of the power amplifier (103) and a second input terminal (t10) connected to the first differential input terminal (t1) of the loudspeaker (104). The loudspeaker circuit (100) being arranged to control the differential power amplifier (103) on the basis of the first control voltage (VIN) and the second control voltage (VIP).

    Oscillator having dual topology
    183.
    发明授权
    Oscillator having dual topology 有权
    具有双拓扑的振荡器

    公开(公告)号:US09252705B2

    公开(公告)日:2016-02-02

    申请号:US14362279

    申请日:2012-12-06

    Applicant: ST-Ericsson SA

    Abstract: An oscillator (200, 300, 350) comprises a tank circuit (100), a first transistor (M1c) and a second transistor (M1r), and the second transistor (M1r) occupies an area of silicon that is smaller than an area of silicon occupied by the first transistor (M1c). A switching apparatus (Sw1 . . . Sw14) selects either one of a first oscillator topology and a second oscillator topology, where in the first oscillator topology, the tank circuit (100) is coupled to the first transistor (M1c) in a first feedback configuration to provide feedback around the first transistor (M1c), and in the second oscillator topology, the tank circuit (100) is coupled to the second transistor (M1r) in a second feedback configuration that is different to the first feedback configuration to provide feedback around the second transistor (M1r).

    Abstract translation: 振荡器(200,3300,350)包括一个振荡电路(100),一个第一晶体管(M1c)和一个第二晶体管(M1r),第二晶体管(M1r)占据一个小于 由第一晶体管(M1c)占据的硅。 开关装置(Sw1 ... Sw14)选择第一振荡器拓扑结构和第二振荡器拓扑中的任何一个,其中在第一振荡器拓扑中,振荡电路(100)以第一反馈耦合到第一晶体管(M1c) 配置以围绕第一晶体管(M1c)提供反馈,并且在第二振荡器拓扑中,振荡电路(100)以与第一反馈配置不同的第二反馈配置耦合到第二晶体管(M1r),以提供反馈 围绕第二晶体管(M1r)。

    Automatic Stereoscopic Camera Calibration
    184.
    发明申请
    Automatic Stereoscopic Camera Calibration 审中-公开
    自动立体相机校准

    公开(公告)号:US20150381964A1

    公开(公告)日:2015-12-31

    申请号:US14767608

    申请日:2014-02-03

    Applicant: ST-ERICSSON SA

    Inventor: Antoine DROUOT

    Abstract: An apparatus for calibrating a stereoscopic camera with respect to at least one stereo-image of the stereoscopic camera includes a processing unit configured to support at least a first triangulation unit, a second triangulation unit, and a Bundle Adjustment unit. The processing unit is configured to determine whether a convergence criterion has been met, the convergence criterion being indicative of whether or not a camera calibration ground-truth has been found.

    Abstract translation: 用于相对于立体照相机的至少一个立体图像校准立体照相机的设备包括:处理单元,被配置为支持至少第一三角测量单元,第二三角测量单元和捆绑调整单元。 处理单元被配置为确定是否已经满足收敛标准,收敛标准指示是否已经找到相机校准基础。

    Frequency offset estimation in communication devices
    185.
    发明授权
    Frequency offset estimation in communication devices 有权
    通信设备频偏估计

    公开(公告)号:US09225566B2

    公开(公告)日:2015-12-29

    申请号:US14361399

    申请日:2012-12-10

    Applicant: ST-Ericsson SA

    CPC classification number: H04L27/0014 H04L2027/0028 H04L2027/0042

    Abstract: The present subject matter discloses a system and a method for estimating a frequency offset in communication devices. In one embodiment, the method of estimating a frequency offset in a communication device comprises generating a reconstructed signal based at least in part on a channel impulse response (CIR) corresponding to a received signal. Further, a normalization matrix is determined for the reconstructed signal. Thereafter, based at least in part on the normalization matrix and the reconstructed signal, the frequency offset is estimated such that the frequency offset corresponds to a maximum normalized-correlation between the reconstructed signal and the received signal.

    Abstract translation: 本主题公开了一种用于估计通信设备中的频率偏移的系统和方法。 在一个实施例中,估计通信设备中的频率偏移的方法包括至少部分地基于对应于接收信号的信道脉冲响应(CIR)来生成重构信号。 此外,为重构信号确定归一化矩阵。 此后,至少部分地基于归一化矩阵和重构信号,估计频率偏移,使得频率偏移对应于重构信号和接收信号之间的最大归一化相关。

    OFDM Packets Time Synchronisation
    186.
    发明申请
    OFDM Packets Time Synchronisation 有权
    OFDM包时间同步

    公开(公告)号:US20150372847A1

    公开(公告)日:2015-12-24

    申请号:US14767960

    申请日:2013-11-25

    Applicant: ST-Ericsson SA

    Inventor: Achraf DHAYNI

    CPC classification number: H04L27/266 H04L27/265

    Abstract: A method and an apparatus determine a time of start of series of OFDM symbols forming an OFDM packet, wherein one or more symbols of the OFDM signal includes a plurality of copies of a short training sequence made of a plurality of time-domain samples. The method includes determining a coarse time index, determining a fine time index, and determining the time of start of each OFDM symbols based on the fine time index. The coarse time-domain sample of the coarse time index is within a coarse estimation error interval, and the time-domain samples of the coarse estimation error interval are converted into frequency domain samples. A metric value is determined for each frequency domain samples, and the fine time index is the time index corresponding to one of the coarse estimation error interval having its associated frequency domain sample having the lowest metric value.

    Abstract translation: 一种方法和装置确定形成OFDM分组的一系列OFDM符号的起始时间,其中OFDM信号的一个或多个符号包括由多个时域采样构成的短训练序列的多个副本。 该方法包括:确定粗略时间索引,确定精细时间索引,以及基于精细时间索引确定每个OFDM符号的开始时间。 粗略时间索引的粗时域样本在粗估计误差区间内,粗估计误差区间的时域样本被转换为频域采样。 对于每个频域样本确定度量值,并且精细时间索引是对应于具有具有最低度量值的其相关联的频域采样的粗估计误差间隔之一的时间索引。

    Level-Shifting Device
    187.
    发明申请
    Level-Shifting Device 有权
    换档装置

    公开(公告)号:US20150372680A1

    公开(公告)日:2015-12-24

    申请号:US14655353

    申请日:2013-12-05

    Applicant: ST-ERICSSON SA

    CPC classification number: H03K19/018521 H03K19/0013 H03K19/01714

    Abstract: A voltage level shifting device for driving a capacitive load has an input terminal for receiving a first input signal switchable between a first logic state corresponding to a first reference voltage and a second logic state corresponding to a second reference voltage, and an output terminal for supplying an output signal switchable between a first logic state corresponding to a third reference voltage and a second logic state corresponding to a fourth reference voltage. The device also has a first electronic circuit that is activated following a commutation of the first input signal from the first reference voltage to the second reference voltage for fixing the output terminal to the fourth reference voltage. The device further has a second electronic circuit that is activated following a commutation of the first input signal from the second reference voltage to the first reference voltage.

    Abstract translation: 用于驱动电容性负载的电压电平移动装置具有用于接收可在与第一参考电压相对应的第一逻辑状态和对应于第二参考电压的第二逻辑状态之间切换的第一输入信号的输入端和用于提供 输出信号可在对应于第三参考电压的第一逻辑状态与对应于第四参考电压的第二逻辑状态之间切换。 该装置还具有第一电子电路,其在从第一参考电压到第二参考电压的第一输入信号的换向之后被激活,用于将输出端固定到第四参考电压。 该装置还具有第二电子电路,其在从第二参考电压到第一参考电压的第一输入信号的换向之后被激活。

    Analog-to-digital conversion device
    188.
    发明授权
    Analog-to-digital conversion device 有权
    模数转换器

    公开(公告)号:US09219491B2

    公开(公告)日:2015-12-22

    申请号:US14412747

    申请日:2013-07-17

    Applicant: ST-Ericsson SA

    CPC classification number: H03M1/12 H02J7/00 H03M1/129

    Abstract: An electronic analog-to-digital conversion device includes an analog-to-digital conversion block having a first input for receiving a voltage signal to be converted based on a reference voltage signal provided to a second input, and an input block connected to the first input of the analog-to-digital conversion block. The input block receives an input signal at a first resistive network connected to a second resistive network, which is then connected to a reference potential. The input block also includes an active network connected between an output of the first resistive network and the first input of the analog-to-digital conversion block. The active network has a first input terminal directly connected to the second input of the analog-to-digital conversion block for receiving the same reference voltage signal so that the input voltage signal received at a second input of the active network is processed based on the reference voltage signal.

    Abstract translation: 一种电子模拟 - 数字转换装置,包括具有第一输入的模数转换块,该第一输入用于基于提供给第二输入端的参考电压信号接收要转换的电压信号;以及输入模块,连接到第一输入端 输入模数转换块。 输入块在连接到第二电阻网络的第一电阻网络处接收输入信号,该第二电阻网络然后连接到参考电位。 输入块还包括连接在第一电阻网络的输出端和模数转换块的第一输入端之间的有源网络。 有源网络具有直接连接到模数转换块的第二输入的第一输入端,用于接收相同的参考电压信号,使得在有源网络的第二输入处接收的输入电压信号基于 参考电压信号。

    Combined Parallel and Pipelined Video Encoder
    189.
    发明申请
    Combined Parallel and Pipelined Video Encoder 有权
    组合并行和流水线视频编码器

    公开(公告)号:US20150358630A1

    公开(公告)日:2015-12-10

    申请号:US14761821

    申请日:2014-01-28

    Applicant: ST-ERICSSON SA

    CPC classification number: H04N19/42 H04N19/436 H04N19/50

    Abstract: A method of encoding video data including a sequence of digital image frames, in a pipelined processing system is provided. The method includes dividing each frame in the sequence into a plurality of sections, each section including a horizontal band across a frame. The method further includes subdividing each section into a plurality of macroblocks, and encoding a representation of each macroblock in each section to form an output stream. The sections of each frame are processed during adjacent steps in a pipeline of the pipelined processing system.

    Abstract translation: 提供了一种在流水线处理系统中对包括数字图像帧序列的视频数据进行编码的方法。 该方法包括将序列中的每个帧划分成多个部分,每个部分包括横跨帧的水平带。 该方法还包括将每个部分细分成多个宏块,并对每个部分中的每个宏块的表示进行编码以形成输出流。 在流水线处理系统的流水线中的相邻步骤期间处理每个帧的各部分。

    IQ mismatch compensation
    190.
    发明授权
    IQ mismatch compensation 有权
    IQ失配补偿

    公开(公告)号:US09203666B2

    公开(公告)日:2015-12-01

    申请号:US14390507

    申请日:2013-04-10

    Applicant: ST-Ericsson SA

    CPC classification number: H04L27/1525 H03D3/009 H04B1/123 H04L27/3863

    Abstract: A receiver (100) has an ln-phase path (l-path) (101) that delivers a digital l-path signal x1(t) and a Quadrature path (Q-path) (103) that delivers a digital Q-path signal xQ(t). The receiver (100) includes a compensation stage (124) arranged to compensate for gain error g and phase error φ between the digital l-path signal x1(t) and the digital Q-path signal xQ(t). The compensation stage (124) has a compensation coefficient generation stage (200), a compensation coefficient application stage (202), a gain control stage (208), a relative gradient generation stage (214) and a step parameter generation stage (224). Compensation coefficients W1,1, W1,2, W2,1, W2,2 applied to the digital l-path signal x1(t) and the digital Q-path signal xQ(t) are generated by iteratively updating them using a relative gradient of the compensated digital in-phase signal y1(t) and a compensated digital quadrature signal yQ(t), and a step parameter μn, the magnitude of which is adjusted based on a rate of change of the compensation coefficients W1,1, W1,2, W2,1, W2,2.

    Abstract translation: 接收器(100)具有传送数字l路径信号x1(t)和传递数字Q路径的正交路径(Q路径)(103)的相位路径(1路径)(101) 信号xQ(t)。 接收器(100)包括补偿级(124),其被布置为补偿增益误差g和相位误差&phgr; 在数字l路径信号x1(t)和数字Q路径信号xQ(t)之间。 补偿级(124)具有补偿系数生成级(200),补偿系数应用级(202),增益控制级(208),相对梯度生成级(214)和步骤参数生成级(224) 。 通过使用相对梯度迭代地更新它们来产生施加到数字l路径信号x1(t)和数字Q路径信号xQ(t)的补偿系数W1,1,W1,2,W2,1,W2,2 补偿数字同相信号y1(t)和补偿数字正交信号yQ(t)的步长参数μn,其幅度基于补偿系数W1,1,W1的变化率进行调整 ,2,W2,1,W2,2。

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