公开(公告)号：US10727227B2

公开(公告)日：2020-07-28

申请号：US16447973

申请日：2019-06-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Che-Cheng Chang ,  Chih-Han Lin

IPC: H01L27/08 ,  H01L27/088 ,  H01L29/66 ,  H01L29/78 ,  H01L21/8234 ,  H01L29/49

Abstract: A fin-type field effect transistor comprising a substrate, at least one gate structure, spacers and source and drain regions is described. The substrate has a plurality of fins and a plurality of insulators disposed between the fins. The source and drain regions are disposed on two opposite sides of the at least one gate structure. The gate structure is disposed over the plurality of fins and disposed on the plurality of insulators. The gate structure includes a stacked strip disposed on the substrate and a gate electrode stack disposed on the stacked strip. The spacers are disposed on opposite sidewalls of the gate structure, and the gate electrode stack contacts sidewalls of the opposite spacers.

公开(公告)号：US20200098646A1

公开(公告)日：2020-03-26

申请号：US16452101

申请日：2019-06-25

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chang-Yin Chen ,  Che-Cheng Chang ,  Chih-Han Lin

IPC: H01L21/8238 ,  H01L21/8234

Abstract: A method for fabricating a semiconductor device includes providing a structure having two fins over a substrate, lower portions of the fins being separated by an isolation structure, a dummy gate structure over the fins, and source/drain features over the fins on both sides of the dummy gate structure; forming a trench in the dummy gate structure between the two fins, where forming the trench removes a portion of the isolation structure; forming a dielectric layer in the trench, where a bottom surface of the dielectric layer extends below a top surface of the isolation structure; and replacing the dummy gate structure with one high-k metal gate structure formed over one of the fins and another high-k metal gate structure formed over the other of the fins.

公开(公告)号：US10553706B2

公开(公告)日：2020-02-04

申请号：US15804787

申请日：2017-11-06

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Che-Cheng Chang ,  Chih-Han Lin

IPC: H01L29/66 ,  H01L29/78 ,  H01L29/06 ,  H01L29/40 ,  H01L29/423 ,  H01L21/762

Abstract: A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a substrate and a fin structure formed over the substrate. The semiconductor structure further includes an isolation structure formed around the fin structure and a gate structure formed across the fin structure. In addition, the gate structure includes a first portion formed over the fin structure and a second portion formed over the isolation structure, and the second portion of the gate structure includes an extending portion extending into the isolation structure.

公开(公告)号：US20200027988A1

公开(公告)日：2020-01-23

申请号：US16587814

申请日：2019-09-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Che-Cheng Chang ,  Chih-Han Lin

IPC: H01L29/78 ,  H01L29/66 ,  H01L29/49 ,  H01L29/423 ,  H01L21/3213

Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a fin structure over a semiconductor substrate. The semiconductor device structure also includes a gate stack covering a portion of the fin structure. The gate stack includes a first portion and a second portion adjacent to the fin structure, and the first portion is wider than the second portion.

公开(公告)号：US10522536B2

公开(公告)日：2019-12-31

申请号：US15227207

申请日：2016-08-03

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Che-Cheng Chang ,  Chih-Han Lin ,  Horng-Huei Tseng

IPC: H01L27/088 ,  H01L23/31 ,  H01L29/06 ,  H01L29/66 ,  H01L21/8234

Abstract: Structures and formation methods of a semiconductor device are provided. The semiconductor device includes a substrate and a first fin structure and a second fin structure over the substrate. The semiconductor device also includes a first gate stack and a second gate stack partially covering the first fin structure and the second fin structure, respectively, and a stack structure over the substrate. The stack structure is between the first gate stack and the second gate stack. The stack structure includes a semiconductor layer over the substrate and a protection layer over the semiconductor layer.

公开(公告)号：US10510896B2

公开(公告)日：2019-12-17

申请号：US16041664

申请日：2018-07-20

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Che-Cheng Chang ,  Chih-Han Lin

IPC: H01L21/00 ,  H01L29/78 ,  H01L29/423 ,  H01L29/51 ,  H01L29/66

Abstract: A method includes forming an insulating structure over a substrate, wherein the substrate has a semiconductor fin separated from the insulating structure; depositing a high-κ dielectric layer over the semiconductor fin and a sidewall of the insulating structure facing the semiconductor fin; etching a first portion of the high-κ dielectric layer over the sidewall of the insulating structure, wherein a second portion of the high-κ dielectric layer remains over the semiconductor fin; and depositing a gate electrode over the second portion of the high-κ dielectric layer.

公开(公告)号：US10510893B2

公开(公告)日：2019-12-17

申请号：US15876176

申请日：2018-01-21

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Che-Cheng Chang ,  Chih-Han Lin ,  Horng-Huei Tseng

IPC: H01L21/8234 ,  H01L29/78 ,  H01L21/02 ,  H01L21/3065 ,  H01L21/3213 ,  H01L21/762 ,  H01L29/06 ,  H01L29/66

Abstract: A method for forming a semiconductor device is provided. In this method, a stop layer is formed on a semiconductor substrate. A semiconductor fin is formed on the stop layer. Two cells adjacent to each other are formed on the semiconductor fin. A gate conductor is formed on a top of the semiconductor fin at a common boundary that is shared by the two cells. A gate spacer is formed to peripherally enclose the gate conductor. The gate conductor and the semiconductor fin are etched to form a gap extending from the top of the semiconductor fin to the stop layer, thereby dividing the semiconductor fin into two portions of the semiconductor fin. The gap is filled with a dielectric filler.

公开(公告)号：US10460942B2

公开(公告)日：2019-10-29

申请号：US15715762

申请日：2017-09-26

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Che-Cheng Chang ,  Po-Chi Wu ,  Chih-Han Lin ,  Horng-Huei Tseng

IPC: H01L29/78 ,  H01L29/06 ,  H01L21/225 ,  H01L29/66 ,  H01L29/36 ,  H01L21/8234 ,  H01L21/84 ,  H01L27/088 ,  H01L27/12

Abstract: A semiconductor structure includes a substrate, at least one active semiconductor fin, at least one insulating structure, a gate electrode, and a gate dielectric. The active semiconductor fin is disposed on the substrate. The insulating structure is disposed on the substrate and adjacent to the active semiconductor fin. A top surface of the insulating structure is non-concave and is lower than a top surface of the active semiconductor fin. The gate electrode is disposed over the active semiconductor fin. The gate dielectric is disposed between the gate electrode and the active semiconductor fin.

公开(公告)号：US20190326283A1

公开(公告)日：2019-10-24

申请号：US16447973

申请日：2019-06-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Che-Cheng Chang ,  Chih-Han Lin

IPC: H01L27/088 ,  H01L29/78 ,  H01L29/66 ,  H01L29/49 ,  H01L21/8234

Abstract: A fin-type field effect transistor comprising a substrate, at least one gate structure, spacers and source and drain regions is described. The substrate has a plurality of fins and a plurality of insulators disposed between the fins. The source and drain regions are disposed on two opposite sides of the at least one gate structure. The gate structure is disposed over the plurality of fins and disposed on the plurality of insulators. The gate structure includes a stacked strip disposed on the substrate and a gate electrode stack disposed on the stacked strip. The spacers are disposed on opposite sidewalls of the gate structure, and the gate electrode stack contacts sidewalls of the opposite spacers.

公开(公告)号：US20190244863A1

公开(公告)日：2019-08-08

申请号：US16390246

申请日：2019-04-22

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Che-Cheng Chang ,  Chih-Han Lin

IPC: H01L21/8234 ,  H01L29/78 ,  H01L21/3105 ,  H01L21/321 ,  H01L29/66 ,  H01L21/28 ,  H01L29/06 ,  H01L27/088 ,  H01L29/49 ,  H01L29/51 ,  H01L21/311

CPC classification number: H01L21/823431 ,  H01L21/28079 ,  H01L21/28088 ,  H01L21/31051 ,  H01L21/31111 ,  H01L21/32115 ,  H01L27/0886 ,  H01L29/0649 ,  H01L29/4958 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/6681 ,  H01L29/7848 ,  H01L29/785 ,  H01L29/7851

Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a fin structure over a semiconductor substrate and a gate stack covering a portion of the fin structure. The gate stack includes a gate dielectric layer, a work function layer, and a conductive filling over the work function layer. The semiconductor device structure also includes a dielectric layer covering the fin structure. The dielectric layer is in direct contact with the conductive filling.