公开(公告)号：US20150063708A1

公开(公告)日：2015-03-05

申请号：US14013122

申请日：2013-08-29

Applicant: ANALOG DEVICES TECHNOLOGY

Inventor： Anil M. Sripadarao ,  Bijesh Poyil

IPC: G06T7/00 ,  G06K9/62

CPC classification number: G06T7/0085 ,  G06K9/00228 ,  G06K9/4614 ,  G06K9/6256 ,  G06K9/6267 ,  G06K9/6282

Abstract: In one aspect, there is disclosed a digital signal processor and method performed by the same for performing object detection, including facial detection, in a reduced number of clock cycles. The method comprises using Sobel edge detection to identify regions with many edges, and classifying those regions as foreground candidates. Foreground candidates are further checked for vertical or horizontal symmetry, and symmetrical windows are classified as face candidates. Viola-Jones type facial detection is then performed only on those windows identified as face candidates.

Abstract translation: 在一个方面，公开了一种数字信号处理器及其方法，该数字信号处理器和方法由减少数量的时钟周期执行，用于执行包括面部检测的对象检测。 该方法包括使用Sobel边缘检测来识别具有许多边缘的区域，并将这些区域分类为前景候选。 进一步检查前景候选者的垂直或水平对称性，对称窗口被分类为面部候选。 然后仅在被识别为面部候选的那些窗口上执行Viola-Jones型面部检测。

公开(公告)号：US20150035387A1

公开(公告)日：2015-02-05

申请号：US13955866

申请日：2013-07-31

Applicant: Analog Devices Technology

Inventor： John G. Macnamara ,  Padraig L. Fitzgerald ,  Raymond C. Goggin ,  Bernard P. Stenson

IPC: H01H59/00 ,  B81C1/00

CPC classification number: H01H59/0009 ,  B81B7/007 ,  B81B2201/014 ,  B81B2207/092 ,  B81C1/00341 ,  H01H2001/0052 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/49109 ,  H01L2924/181 ,  Y10T307/937 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A MEMS switch device including: a substrate layer; an insulating layer formed over the substrate layer; and a MEMS switch module having a plurality of contacts formed on the surface of the insulating layer, wherein the insulating layer includes a number of conductive pathways formed within the insulating layer, the conductive pathways being configured to interconnect selected contacts of the MEMS switch module.

Abstract translation: 一种MEMS开关装置，包括：基板层; 形成在所述基板层上的绝缘层; 以及MEMS开关模块，其具有形成在所述绝缘层的表面上的多个触点，其中所述绝缘层包括形成在所述绝缘层内的多个导电路径，所述导电路径被配置为互连所述MEMS开关模块的选定触点。

公开(公告)号：US20150002142A1

公开(公告)日：2015-01-01

申请号：US13931148

申请日：2013-06-28

Applicant: ANALOG DEVICES TECHNOLOGY

Inventor： Jan Kubik

IPC: G01D5/16

CPC classification number: G01D5/16 ,  G01R33/0005 ,  G01R33/0094 ,  G01R33/02 ,  G01R33/09

Abstract: A magnetic direction sensor, comprising a first array of magneto-resistive elements, said array having a first array primary direction and wherein some but not all of the magneto-resistive elements are wholly or partially provided at a first angle to the primary direction, and the remaining elements are also inclined with respect to the primary direction.

Abstract translation: 一种磁方向传感器，包括第一磁阻元件阵列，所述阵列具有第一阵列主方向，并且其中一些但不是全部的磁阻元件全部或部分地设置成与主方向成第一角度，并且 剩余的元件也相对于主要方向倾斜。

公开(公告)号：US20140354459A1

公开(公告)日：2014-12-04

申请号：US13905251

申请日：2013-05-30

Applicant: ANALOG DEVICES TECHNOLOGY

Inventor： Trevor Clifford Caldwell ,  Richard E. Schreier ,  David Alldred ,  Wenhua W. Yang

IPC: H03M3/00

CPC classification number: H03M1/0673 ,  H03M1/361 ,  H03M1/74 ,  H03M3/30 ,  H03M3/338 ,  H03M3/464

Abstract: In one aspect, an electrical signal converter is disclosed. The exemplary electrical signal converter may include a plurality of ordered converter elements. Element selection logic may be provided to pseudorandomly select a pointer to a switch matrix, wherein the switch matrix maps converter elements according to a stepwise “delta-two-maximum pattern.” Advantageously, pseudorandom stepwise delta-two-maximum patterns may be applied both to a first order converter, and to a feedback converter for error correction.

Abstract translation: 一方面，公开了一种电信号转换器。 示例性电信号转换器可以包括多个有序的转换器元件。 可以提供元素选择逻辑以伪随机选择指向开关矩阵的指针，其中开关矩阵根据逐步的“二进制二最大模式”来映射转换器元件。有利地，可以应用伪随机逐步的Δ-二最大模式 到一阶转换器和用于纠错的反馈转换器。

公开(公告)号：US08884802B2

公开(公告)日：2014-11-11

申请号：US13920083

申请日：2013-06-18

Applicant: Analog Devices Technology

Inventor： Zhao Li ,  Shipra Bhal ,  Kevin Glenn Gard ,  David Alldred ,  Christopher Mayer ,  Trevor Clifford Caldwell ,  David J. McLaurin ,  Victor Kozlov

IPC: H03M1/34 ,  H03M1/10 ,  H03M1/00 ,  H03M1/12

CPC classification number: H03M3/384 ,  H03M1/00 ,  H03M1/1009 ,  H03M1/12 ,  H03M3/458

Abstract: A calibration system for an analog-to-digital converter (ADC) an internal ADC that receives an analog input and converts the analog input to digital multi-bit data. The calibration system also includes a reference shuffling circuit that shuffles reference values of comparators of the internal ADC. Further, the calibration system includes a calibration circuit that calibrates the comparators of the internal ADC. The calibration system includes a digital block that measures an amplitude based on the digital multi-bit data. Additionally, the calibration system includes calibration logic that controls the calibration circuit based on an output of the digital block.

Abstract translation: 用于模数转换器（ADC）的校准系统，内部ADC接收模拟输入并将模拟输入转换为数字多位数据。 该校准系统还包括一个参考混洗电路，它洗牌内部ADC的比较器参考值。 此外，校准系统包括校准电路，校准内部ADC的比较器。 校准系统包括基于数字多位数据测量幅度的数字块。 此外，校准系统包括基于数字块的输出来控制校准电路的校准逻辑。

公开(公告)号：US20140269985A1

公开(公告)日：2014-09-18

申请号：US13828989

申请日：2013-03-14

Applicant: ANALOG DEVICES TECHNOLOGY

Inventor： Haim Primo ,  Manish J. Manglani ,  Yosef Stein

IPC: H04B1/04

CPC classification number: H04B1/0475 ,  H03D7/165 ,  H03D2200/0043 ,  H04L25/061 ,  H04L27/364 ,  H04L27/366

Abstract: Apparatus and methods for estimating a direct current offset in an upconverter are disclosed. Samples of a first signal are received. Values of a compensation signal are retrieved. For example, the compensation signal can be a component in a modified baseband signal, wherein the modified baseband signal is upconverted, downconverted, and filtered to generate the first signal. An estimate of a first DC offset induced by an upconverter is generated based at least partly on at least two selected samples of the first signal and corresponding values of the compensation signal.

Abstract translation: 公开了用于估计上变频器中的直流偏移的装置和方法。 接收第一信号的样本。 检索补偿信号的值。 例如，补偿信号可以是修改的基带信号中的分量，其中修改的基带信号被上变频，下变频和滤波以产生第一信号。 至少部分地基于第一信号的至少两个选定样本和补偿信号的对应值来生成由上变频器引起的第一DC偏移的估计。

公开(公告)号：US20140254431A1

公开(公告)日：2014-09-11

申请号：US13790071

申请日：2013-03-08

Applicant: ANALOG DEVICES TECHNOLOGY

Inventor： Dongqin Yan ,  Yang Pan ,  Olafur M. Josefsson

IPC: H04L12/24

CPC classification number: H04Q11/04 ,  H04Q2213/13292 ,  H04Q2213/13322 ,  H04Q2213/1336

Abstract: Advanced TDM daisy-chain configurations utilize data transmission over a frame sync signal path with feedback to allow for communication between the master device and slave devices and/or between individual slave devices while maintaining a simple TDM communication interface. In certain daisy-chain configurations, the feedback path returns to the frame sync signal path between the master device and the first slave device, which allows for transmission of data from the last slave device to the master device and/or to the first slave device. In other daisy-chain configurations, the feedback path returns to the frame sync signal path between the first slave device and the second slave device, which allows for transmission of data from the last slave device to the first slave device (which may transfer data to the master device, e.g., over separate command and/or data lines) and/or to the first slave device.

Abstract translation: 高级TDM菊花链配置利用具有反馈的帧同步信号路径上的数据传输，以允许主设备和从设备之间和/或各个从设备之间的通信，同时保持简单的TDM通信接口。 在某些菊花链配置中，反馈路径返回到主设备和第一从设备之间的帧同步信号路径，其允许从最后从设备向主设备和/或第一从设备传输数据 。 在其他菊花链配置中，反馈路径返回到第一从设备和第二从设备之间的帧同步信号路径，其允许从最后从设备向第一从设备传输数据（其可以将数据传送到 主设备，例如通过单独的命令和/或数据线）和/或到第一从设备。

公开(公告)号：US20140254206A1

公开(公告)日：2014-09-11

申请号：US13947820

申请日：2013-07-22

Applicant: ANALOG DEVICES TECHNOLOGY

Inventor： Yingyang Ou ,  Qingyi Huang ,  Renjian Xie ,  Ling Ren

IPC: H02M3/335

CPC classification number: H02M3/33592 ,  Y02B70/1475

Abstract: In certain example embodiments, a system is provided that includes a circuit. The system also includes a reverse current control module that provides an isolated power supply in order to protect one or more devices in a power chain during one or more testing activities having one or more requirements.

Abstract translation: 在某些示例性实施例中，提供了包括电路的系统。 该系统还包括反向电流控制模块，其提供隔离的电源，以便在具有一个或多个要求的一个或多个测试活动期间保护功率链中的一个或多个设备。

公开(公告)号：US20140253223A1

公开(公告)日：2014-09-11

申请号：US13793543

申请日：2013-03-11

Applicant: ANALOG DEVICES TECHNOLOGY

Inventor： Patrick J. Meehan ,  Mark T. Kelly ,  Christopher Peter Hurrell ,  Thomas Anthony Conway ,  Donal O'Sullivan ,  Michael Hennessy ,  William Hunt

IPC: H03K17/00

CPC classification number: H03H21/0007 ,  G06F1/26 ,  H03K17/00 ,  H03K17/161 ,  H03M1/0626 ,  H03M1/12

Abstract: A signal processing apparatus that includes a circuit in which a signal processing function is performed during a first time period, the signal processing apparatus including or being associated with a switch or a filter in a power supply to the signal processing apparatus so as to disconnect the signal processing apparatus from the power supply or to filter the power supply during a second time period that is coincident with at least part of the first time period.

Abstract translation: 一种信号处理装置，包括在第一时间段内执行信号处理功能的电路，所述信号处理装置包括或者与所述信号处理装置的电源中的开关或滤波器相关联，以便断开所述信号处理装置 信号处理装置，或者在与第一时间段的至少一部分一致的第二时间段期间对电源进行滤波。

公开(公告)号：US20140247031A1

公开(公告)日：2014-09-04

申请号：US13782223

申请日：2013-03-01

Applicant: ANALOG DEVICES TECHNOLOGY

Inventor： SONG QIN

IPC: H02M1/32 ,  H02M3/156

CPC classification number: H02M1/32 ,  H02M3/1588 ,  Y02B70/1466

Abstract: A negative current protection system for a low side switching converter FET, for use with a switching converter arranged to operate high and low side FETs connected to an output inductor to produce an output voltage. The negative current protection system comprises a current sensing circuit which produces an output Vcs that varies with the current in the high side FET, a negative current threshold generator which produces a threshold signal −Ith which represents the maximum negative current to which the low side FET is to be subjected, and a comparison circuit arranged to compare the valley portion of Vcs and −Ith and to set a flag if Vcs

Abstract translation: 一种用于低侧开关转换器FET的负电流保护系统，用于与连接到输出电感器的高低侧FET连接以产生输出电压的开关转换器。 负电流保护系统包括电流检测电路，其产生随着高侧FET中的电流而变化的输出Vcs;产生阈值信号的负电流阈值发生器，其表示低边FET的最大负电流 并且比较电路被布置为比较Vcs和-Ith的谷部分，并且在开关周期中的预定时间（通常在转换器的消隐时间之后）设置Vcs <-Ith的标志。 当标志置位时，系统优选地通过调节开关FET的操作来减小负电流来进行响应。