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公开(公告)号：US09178529B2
公开(公告)日：2015-11-03
申请号：US14057153
申请日：2013-10-18
Applicant: ANALOG DEVICES TECHNOLOGY
Inventor： Yunzhi Dong , Hajime Shibata , Wenhua W. Yang , Richard E. Schreier
CPC classification number: H03M3/344 , H03M1/00 , H03M1/12 , H03M1/144 , H03M1/145 , H03M3/30 , H03M3/416 , H04L25/067 , H04M1/72519
Abstract: The present disclosure describes an improved multi-stage noise shaping (MASH) analog-to-digital converter (ADC) for converting an analog input signal to a digital output signal. In particular, a full delta-sigma (ΔΣ) modulator is provided at the front-end of the MASH ADC, and another full ΔΣ modulator is provided at the back-end of the MASH ADC. The front-end ΔΣ modulator digitizes an analog input signal, and the back-end ΔΣ modulator digitizes an error between the output of the front-end ΔΣ modulator and the (original) analog input signal. In this configuration where the back-end modulator digitizes the error of the (full) front-end modulator, some design constraints of the front-end are relaxed. These design constraints include thermal noise, digital noise cancellation filter complexity (the quantization noise of the front-end is already shaped by the noise transfer function of the front-end), and/or non-linearity.
Abstract translation: 本公开描述了一种用于将模拟输入信号转换为数字输出信号的改进的多级噪声整形（MASH）模数转换器（ADC）。 特别地，在MASH ADC的前端提供了一个完整的delta-sigma（＆Dgr＆amp; Sgr）调制器，另一个完整的＆Dgr＆amp; 调制器设置在MASH ADC的后端。 前端＆Dgr＆＆ 调制器将模拟输入信号数字化，后端＆Dgr＆amp; 调制器数字化前端＆Dgr＆amp; Sgr的输出之间的误差; 调制器和（原始）模拟输入信号。 在这种配置中，后端调制器将（全）前端调制器的误差数字化，前端的一些设计约束被放宽。 这些设计约束包括热噪声，数字噪声消除滤波器复杂度（前端的量化噪声已经由前端的噪声传递函数形成）和/或非线性。
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公开(公告)号：US20150171880A1
公开(公告)日：2015-06-18
申请号：US14571274
申请日：2014-12-15
Applicant: ANALOG DEVICES TECHNOLOGY
Inventor： Trevor Clifford Caldwell , Richard E. Schreier , David Alldred , Wenhua W. Yang
Abstract: In one aspect, an electrical signal converter is disclosed. The exemplary electrical signal converter may include a plurality of ordered converter elements. Element selection logic may be provided to pseudorandomly select a pointer to a switch matrix, wherein the switch matrix maps converter elements according to a stepwise “delta-two-maximum pattern.” Advantageously, pseudorandom stepwise delta-two-maximum patterns may be applied both to a first order converter, and to a feedback converter for error correction.
Abstract translation: 一方面，公开了一种电信号转换器。 示例性电信号转换器可以包括多个有序的转换器元件。 可以提供元素选择逻辑以伪随机选择指向开关矩阵的指针，其中开关矩阵根据逐步的“二进制二最大模式”来映射转换器元件。有利地，可以应用伪随机逐步的Δ-二最大模式 到一阶转换器和用于纠错的反馈转换器。
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公开(公告)号：US20140354459A1
公开(公告)日：2014-12-04
申请号：US13905251
申请日：2013-05-30
Applicant: ANALOG DEVICES TECHNOLOGY
Inventor： Trevor Clifford Caldwell , Richard E. Schreier , David Alldred , Wenhua W. Yang
IPC: H03M3/00
Abstract: In one aspect, an electrical signal converter is disclosed. The exemplary electrical signal converter may include a plurality of ordered converter elements. Element selection logic may be provided to pseudorandomly select a pointer to a switch matrix, wherein the switch matrix maps converter elements according to a stepwise “delta-two-maximum pattern.” Advantageously, pseudorandom stepwise delta-two-maximum patterns may be applied both to a first order converter, and to a feedback converter for error correction.
Abstract translation: 一方面，公开了一种电信号转换器。 示例性电信号转换器可以包括多个有序的转换器元件。 可以提供元素选择逻辑以伪随机选择指向开关矩阵的指针，其中开关矩阵根据逐步的“二进制二最大模式”来映射转换器元件。有利地，可以应用伪随机逐步的Δ-二最大模式 到一阶转换器和用于纠错的反馈转换器。
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公开(公告)号：US09203426B2
公开(公告)日：2015-12-01
申请号：US14302173
申请日：2014-06-11
Applicant: ANALOG DEVICES TECHNOLOGY
Inventor： Jialin Zhao , Richard E. Schreier , Jose Barreiro Silva , Hajime Shibata , Wenhua W. Yang , Yunzhi Dong
CPC classification number: H03M3/378 , H03M1/1019 , H03M1/1038 , H03M1/74 , H03M3/37 , H03M3/384 , H03M3/388 , H03M3/464
Abstract: Digital-to-analog converters (DACs) are used widely in electronics. The DACs are usually not ideal and typically exhibits errors, e.g., static mismatch errors. This disclosure describes a digital calibration technique for DAC static mismatch in continuous-time delta-sigma modulators (CTDSMs). The methodology utilizes the DAC unit elements (UEs) themselves to measure each other's mismatch. There are no extra circuitries except for the logic design inside DAC drivers or comparators. The methodology is an attractive calibration technique for high performance CTDSMs, especially for high speed system in multi-gigahertz range with low over-sampling rate (OSR).
Abstract translation: 数模转换器（DAC）广泛应用于电子产品。 DAC通常不理想，并且通常表现出错误，例如静态失配错误。 本公开描述了用于连续时间Δ-Σ调制器（CTDSM）中的DAC静态失配的数字校准技术。 该方法利用DAC单元元件（UE）本身来测量彼此的不匹配。 没有额外的电路，除了DAC驱动器或比较器中的逻辑设计。 该方法是高性能CTDSM的有吸引力的校准技术，特别是对于具有低过采样率（OSR）的多千兆赫兹范围内的高速系统。
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公开(公告)号：US09054731B2
公开(公告)日：2015-06-09
申请号：US14073396
申请日：2013-11-06
Applicant: ANALOG DEVICES TECHNOLOGY
Inventor： David Nelson Alldred , Jipeng Li , Richard E. Schreier , Hajime Shibata
Abstract: In one example implementation, the present disclosure provides a loop filter for use in a continuous-time sigma-delta analog-to-digital converter. Specifically, a capacitive feedback digital-to-analog converter path is provided at the input of a first opamp in a series of opamp integrators. The capacitive feedback digital-to-analog converter at the input of the first opamp reduces the signal content at the output of the first opamp, and thereby reduces the output swing of the first opamp. A reduction in output swing provides a more efficient loop filter.
Abstract translation: 在一个示例实现中，本公开提供了一种在连续时间Σ-Δ模数转换器中使用的环路滤波器。 具体地，在一系列运算放大器积分器中的第一运算放大器的输入处提供电容反馈数模转换器路径。 在第一运算放大器的输入处的电容反馈数模转换器减少了第一运算放大器的输出处的信号内容，从而减小了第一运算放大器的输出摆幅。 输出摆幅的减小提供了更有效的环路滤波器。
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Patent Agency Ranking
公开(公告)号：US20150109157A1
公开(公告)日：2015-04-23
申请号：US14055980
申请日：2013-10-17
Applicant: ANALOG DEVICES TECHNOLOGY
Inventor： Trevor Clifford Caldwell , Richard E. Schreier
IPC: H03M3/00
Abstract: A delta-sigma modulator is configured to sense and convert an electromagnetic field into a digital signal. An exemplary delta-sigma modulator includes a sensor component, such as an LC resonator, that is configured to sense the electromagnetic field and generate an input analog signal, where the delta-sigma modulator is configured to convert the input analog signal to the digital signal. Delta-sigma modulator can include an analog-to-digital converter coupled to the sensor component that receives and converts the input analog signal to the digital signal. Delta-sigma modulator can further include a digital-to-analog converter (DAC) coupled to the resonator and the ADC, the DAC configured to receive the digital signal from the ADC and generate a feedback analog signal.
Abstract translation: Δ-Σ调制器被配置为感测并将电磁场转换成数字信号。 示例性的Δ-Σ调制器包括诸如LC谐振器的传感器组件，其被配置为感测电磁场并产生输入模拟信号，其中Δ-Σ调制器被配置为将输入的模拟信号转换为数字信号 。 Δ-Σ调制器可以包括耦合到传感器组件的模数转换器，其接收并将输入的模拟信号转换成数字信号。 Δ-Σ调制器还可以包括耦合到谐振器和ADC的数模转换器（DAC），DAC被配置为从ADC接收数字信号并产生反馈模拟信号。
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7.发明授权Digital tuning engine for highly programmable delta-sigma analog-to-digital converters 有权数字调谐引擎，用于高度可编程的delta-sigma模数转换器公开(公告)号：US09030342B2
公开(公告)日：2015-05-12
申请号：US13945647
申请日：2013-07-18
Applicant: Analog Devices Technology
Inventor： Kevin Cao-Van Lam , Richard E. Schreier , Donald W. Paterson
IPC: H03M1/10
CPC classification number: H03M3/38 , H03M1/1009 , H03M3/392 , H03M3/424 , H03M3/454
Abstract: An integrated circuit includes a component calculator configured to compute at least one component value of a highly programmable analog-to-digital converter (ADC) from at least one application parameter, and a mapping module configured to map the component value to a corresponding register setting of the ADC based on at least one process parameter, wherein the integrated circuit produces digital control signals capable of programming the ADC. In a specific embodiment, the component calculator uses an algebraic function of a normalized representation of the application parameter to approximately evaluate at least one normalized ADC coefficient. The component value is further calculated by denormalizing the normalized ADC coefficient. In another specific embodiment, the component calculator uses an algebraic function of the application parameter to calculate the component value. In some embodiments, the integrated circuit further includes a scaling module configured to scale the component value based on scaling parameters.
Abstract translation: 集成电路包括：组件计算器，被配置为从至少一个应用参数计算高可编程模数转换器（ADC）的至少一个分量值;以及映射模块，被配置为将分量值映射到对应的寄存器设置 基于至少一个工艺参数，其中所述集成电路产生能够编程所述ADC的数字控制信号。 在具体实施例中，组件计算器使用应用参数的归一化表示的代数函数来近似评估至少一个归一化的ADC系数。 通过对归一化的ADC系数进行非归一化来进一步计算分量值。 在另一具体实施例中，组件计算器使用应用参数的代数函数来计算组件值。 在一些实施例中，集成电路还包括缩放模块，其被配置为基于缩放参数来缩放分量值。
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公开(公告)号：US20150123828A1
公开(公告)日：2015-05-07
申请号：US14073396
申请日：2013-11-06
Applicant: ANALOG DEVICES TECHNOLOGY
Inventor： David Nelson Alldred , Jipeng Li , Richard E. Schreier , Hajime Shibata
Abstract: In one example implementation, the present disclosure provides a loop filter for use in a continuous-time sigma-delta analog-to-digital converter. Specifically, a capacitive feedback digital-to-analog converter path is provided at the input of a first opamp in a series of opamp integrators. The capacitive feedback digital-to-analog converter at the input of the first opamp reduces the signal content at the output of the first opamp, and thereby reduces the output swing of the first opamp. A reduction in output swing provides a more efficient loop filter.
Abstract translation: 在一个示例实现中，本公开提供了一种在连续时间Σ-Δ模数转换器中使用的环路滤波器。 具体地，在一系列运算放大器积分器中的第一运算放大器的输入处提供电容反馈数模转换器路径。 在第一运算放大器的输入处的电容反馈数模转换器减少了第一运算放大器的输出处的信号内容，从而减小了第一运算放大器的输出摆幅。 输出摆幅的减小提供了更有效的环路滤波器。
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公开(公告)号：US08912936B1
公开(公告)日：2014-12-16
申请号：US13905251
申请日：2013-05-30
Applicant: Analog Devices Technology
Inventor： Trevor Clifford Caldwell , Richard E. Schreier , David Alldred , Wenhua W. Yang
IPC: H03M3/00
Abstract: In one aspect, an electrical signal converter is disclosed. The exemplary electrical signal converter may include a plurality of ordered converter elements. Element selection logic may be provided to pseudorandomly select a pointer to a switch matrix, wherein the switch matrix maps converter elements according to a stepwise “delta-two-maximum pattern.” Advantageously, pseudorandom stepwise delta-two-maximum patterns may be applied both to a first order converter, and to a feedback converter for error correction.
Abstract translation: 一方面，公开了一种电信号转换器。 示例性电信号转换器可以包括多个有序的转换器元件。 可以提供元素选择逻辑以伪随机选择指向开关矩阵的指针，其中开关矩阵根据逐步的“二进制二最大模式”来映射转换器元件。有利地，可以应用伪随机逐步的Δ-二最大模式 到一阶转换器和用于纠错的反馈转换器。
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公开(公告)号：US09407283B2
公开(公告)日：2016-08-02
申请号：US14055980
申请日：2013-10-17
Applicant: ANALOG DEVICES TECHNOLOGY
Inventor： Trevor Clifford Caldwell , Richard E. Schreier
Abstract: A delta-sigma modulator is configured to sense and convert an electromagnetic field into a digital signal. An exemplary delta-sigma modulator includes a sensor component, such as an LC resonator, that is configured to sense the electromagnetic field and generate an input analog signal, where the delta-sigma modulator is configured to convert the input analog signal to the digital signal. Delta-sigma modulator can include an analog-to-digital converter coupled to the sensor component that receives and converts the input analog signal to the digital signal. Delta-sigma modulator can further include a digital-to-analog converter (DAC) coupled to the resonator and the ADC, the DAC configured to receive the digital signal from the ADC and generate a feedback analog signal.
Abstract translation: Δ-Σ调制器被配置为感测并将电磁场转换成数字信号。 示例性的Δ-Σ调制器包括诸如LC谐振器的传感器组件，其被配置为感测电磁场并产生输入模拟信号，其中Δ-Σ调制器被配置为将输入的模拟信号转换为数字信号 。 Δ-Σ调制器可以包括耦合到传感器组件的模数转换器，其接收并将输入的模拟信号转换成数字信号。 Δ-Σ调制器还可以包括耦合到谐振器和ADC的数模转换器（DAC），DAC被配置为从ADC接收数字信号并产生反馈模拟信号。
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