Abstract:
A polarization switching device includes a lower panel; an upper panel facing the lower panel; a liquid crystal layer disposed between the lower panel and the upper panel; and a driver to apply a first driving voltage and a second driving voltage to the lower panel and the upper panel, respectively, the first driving voltage to transition among a center voltage, a first voltage and a second voltage. The first voltage and the second voltage have the same difference in value from the center voltage. The driver includes a voltage changing unit to generate the first voltage and the second voltage based on a digital data input to a first digital-analog converter.
Abstract:
A driving device includes an output timing controller which controls an output timing of a first driving voltage and a second driving voltage respectively generated from a first voltage generator and a second voltage generator. A third driving voltage output from the output timing controller is provided to a first data driver and a second data driver, and also provided to a gamma voltage generator to generate a plurality of gamma voltages. Accordingly, a reverse electric potential between the third driving voltage and the gamma voltages is prevented from being generated in the first and second data drivers, therefore, preventing the first and second data drivers from being damaged.
Abstract:
A method of controlling timing signals includes; selectively providing both master control data and slave control data, which are included in control data, to a memory part based on a write enable signal provided form an external device, reading control data stored in the memory part in response to a reset signal provided from an external device, and controlling output timing of at least one power voltage based on the stored control data.
Abstract:
A computer system. The computer system includes memory units; a power supply to supply power to the memory units; and a controller to controls the supply of power the plurality of memory units so as to intercept power supplied from the power supply to at least one of the memory units, among according to user input.
Abstract:
The present invention relates to a tungsten chemical vapor deposition method and a method for forming a tungsten plug. The tungsten chemical vapor deposition method of the present invention includes preparing a wafer where a barrier layer is formed. Silane gas is supplied from each of a top of the wafer and a bottom of an edge part of the wafer toward the wafer simultaneously, in order to form a silicon passivation thin film on the top surface and the edge part of the wafer; in order to form a tungsten nucleation on the top surface of the wafer where the passivation thin film is formed. A mixed gas including a tungsten fluoride gas and a silane gas is supplied from the top of the wafer toward the wafer, and at the same time a silane gas is supplied from the bottom of the edge part toward the wafer. A mixed gas including a tungsten fluoride gas and a hydrogen gas is supplied from the top of the wafer toward the wafer, in order to deposit a sufficiently thick tungsten on the surface of the wafer. Therefore, the present invention can prevent a fluoride ion generated during a tungsten deposition process from reacting with the barrier layer at the edge part by passivating not only the top surface of the wafer but also the edge part with the silane gas at the initial step of the tungsten deposition process.
Abstract:
A hard mask composition, a method of forming a pattern, and a semiconductor integrated circuit device, the hard mask composition including a solvent; and an aromatic ring-containing compound, the aromatic ring-containing compound including at least one of a moiety represented by the following Chemical Formula 1 and a moiety represented by the following Chemical Formula 2:
Abstract:
A memory controller, a PCB and a computer system employing the memory controller, and a memory adjusting method using the memory controller. The memory controller interfaces data reading from and writing to a memory and includes: a characteristic estimating part estimating a characteristic of a memory output signal outputted from the memory for the data reading and writing; and a characteristic adjusting part controlling the memory so that the characteristic of the memory output signal is within a predetermined reference range if the characteristic of the memory output signal estimated by the characteristic estimating part is beyond the predetermined reference range.
Abstract:
A USB circuit device prevents reverse current while complying with USB specifications. A USB circuit device includes a connector unit to which a USB device is connected; a power supplying unit supplying power with the USB device through the connector unit; a switching unit flowing current induced into the connector unit from the USB device, into a ground selectively; and a controller controlling the switching unit to flow the current induced into the connector unit, into the ground if a level of the power provided with the USB device by the power supplying unit is less than a predetermined value. Accordingly, there is provided a USB circuit device for preventing reverse current from an external device and capable of protecting the circuit from over current with satisfaction to a USB specification.