公开(公告)号：US06930370B2

公开(公告)日：2005-08-16

申请号：US10681483

申请日：2003-10-08

Applicant: Frederick A. Perner ,  Thomas C. Anthony

Inventor： Frederick A. Perner ,  Thomas C. Anthony

IPC: H01L27/10 ,  G11C7/18 ,  G11C11/15 ,  H01L21/00 ,  H01L21/82 ,  H01L21/8246 ,  H01L27/105 ,  H01L27/22 ,  H01L29/76 ,  H01L31/062 ,  H01L43/08 ,  G11O11/00

CPC classification number: H01L27/222 ,  G11C11/15

Abstract: A memory includes an array of magnetic memory cells, each magnetic memory cell being adapted to store a bit of information, interconnects in communication with the magnetic memory cells, and conductors in communication with the magnetic memory cells and the interconnects, the conductors filling spaces between adjacent magnetic memory cells of the array.

Abstract translation: 存储器包括磁存储器单元阵列，每个磁存储单元适于存储信息位，与磁存储单元通信的互连以及与磁存储单元和互连通信的导体，导体之间填充空间 阵列的相邻磁存储单元。

公开(公告)号：US06873544B2

公开(公告)日：2005-03-29

申请号：US10696826

申请日：2003-10-30

Applicant: Frederick A. Perner ,  Lung T. Tran ,  Kenneth J. Eldredge

Inventor： Frederick A. Perner ,  Lung T. Tran ,  Kenneth J. Eldredge

IPC: G11C11/15 ,  G11C11/16 ,  H01L21/8246 ,  H01L27/105 ,  H01L43/08 ,  G11C11/00

CPC classification number: G11C11/15 ,  G11C11/16 ,  G11C13/004 ,  G11C27/02 ,  G11C2013/0057

Abstract: A data storage device that includes an array of resistive memory cells. The resistive memory cells may include a magnetic tunnel junction (MTJ) and a thin-film diode. The device may include a circuit that is electrically connected to the array and that is also capable of monitoring a signal current flowing through a selected memory cell. Once the signal current has been monitored, the circuit is capable of comparing the signal current to an average reference current in order to determine which of a first resistance state and a second resistance state the selected memory cell is in. Also, a method for operating the data storage device.

Abstract translation: 一种包括电阻式存储单元阵列的数据存储装置。 电阻存储单元可以包括磁性隧道结（MTJ）和薄膜二极管。 该装置可以包括电连接到阵列的电路，并且还能够监测流过所选择的存储器单元的信号电流。 一旦已经监视了信号电流，电路就可以将信号电流与平均参考电流进行比较，以确定所选择的存储单元处于第一电阻状态和第二电阻状态。另外，一种操作方法 数据存储设备。

公开(公告)号：US06848067B2

公开(公告)日：2005-01-25

申请号：US10107939

申请日：2002-03-27

Applicant: Frederick A. Perner

Inventor： Frederick A. Perner

IPC: G01R31/28 ,  G06F11/22 ,  G11C7/10 ,  G11C11/16 ,  G11C11/41 ,  G11C11/413 ,  G11C19/00 ,  G11C29/48

CPC classification number: G11C29/48 ,  G11C7/1051 ,  G11C7/1078 ,  G11C11/16 ,  G11C19/00 ,  G11C2207/107

Abstract: A memory apparatus, which may be of resistive cross point memory (RXPtM) cell type (one example of which is a magnetic random access memory (MRAM)) includes multiple serial data paths which are merged and may exchange data as needed by the data input/output (I/O) circuits connected to a serial I/O port. A plurality of scan path registers are connected by an array of static random access memory (SRAM) memory units of plural memory cells. The scan paths and SRAM memory units perform a parallel transfer of data from scan path registers to and from temporary registers of the SRAM memory units in order to effect parallel data exchange between the multiple scan path registers.

Abstract translation: 可能是电阻式交叉点存储器（RXPtM）单元类型（其一个例子是磁性随机存取存储器（MRAM））的存储器件包括合并的多个串行数据路径，并且可以根据数据输入的需要来交换数据 /输出（I / O）电路连接到串行I / O端口。 多个扫描路径寄存器通过多个存储单元的静态随机存取存储器（SRAM）存储器单元阵列连接。 扫描路径和SRAM存储器单元从SRAM存储器单元的临时寄存器执行数据从扫描路径寄存器的并行传输，以便实现多个扫描路径寄存器之间的并行数据交换。

公开(公告)号：US06842364B1

公开(公告)日：2005-01-11

申请号：US10614505

申请日：2003-07-07

Applicant: Richard Le Hilton ,  Corbin Champion ,  Kenneth Kay Smith ,  Frederick A. Perner

Inventor： Richard Le Hilton ,  Corbin Champion ,  Kenneth Kay Smith ,  Frederick A. Perner

IPC: G11C11/15 ,  G11C5/00 ,  G11C7/22 ,  G11C11/00 ,  G11C11/02 ,  G11C11/16 ,  G11C16/04

CPC classification number: G11C11/16

Abstract: A method for performing a read operation from a memory cell in a memory cell is provided. The method includes applying a constant current across the memory cell string, measuring a first voltage across the memory cell string, writing the memory cell to a first state, measuring a second voltage across the memory cell string, and determining whether the first voltage differs from the second voltage.

Abstract translation: 提供了一种用于从存储单元中的存储单元执行读取操作的方法。 该方法包括在存储单元串中施加恒定电流，测量存储单元串两端的第一电压，将存储单元写入第一状态，测量存储单元串两端的第二电压，以及确定第一电压是否与 第二电压。

公开(公告)号：US06839270B2

公开(公告)日：2005-01-04

申请号：US10346494

申请日：2003-01-17

Applicant: Frederick A. Perner ,  James R. Eaton, Jr. ,  Kenneth K. Smith ,  Ken Eldredge ,  Lung Tran

Inventor： Frederick A. Perner ,  James R. Eaton, Jr. ,  Kenneth K. Smith ,  Ken Eldredge ,  Lung Tran

IPC: G11C11/15 ,  G11C11/16 ,  G11C11/00

CPC classification number: G11C11/16

Abstract: A control circuit for writing to and reading from MRAMs comprising a row decoder; a first read/write row driver connected to the row decoder; a plurality of global row write conductors connected to the first read/write row driver; a plurality of row taps connected to each of the global row write conductors; and a second read/write row driver connected to the global row write conductors.

公开(公告)号：US06834017B2

公开(公告)日：2004-12-21

申请号：US10264588

申请日：2002-10-03

Applicant: Frederick A. Perner ,  David Murray Banks

Inventor： Frederick A. Perner ,  David Murray Banks

IPC: G11C702

CPC classification number: G11C11/16 ,  G11C7/1006 ,  G11C29/50 ,  G11C2029/5006 ,  G11C2207/063

Abstract: An information storage device is disclosed. In one embodiment, the information storage device includes first and second memory cells which store complementary first and second logic states. An error detection system coupled to the first and second memory cells is configured to indicate an error if a difference between a first current flowing through the first memory cell and a second current flowing through the second memory cell is less than a predefined value.

Abstract translation: 公开了一种信息存储装置。 在一个实施例中，信息存储设备包括存储互补的第一和第二逻辑状态的第一和第二存储器单元。 耦合到第一和第二存储器单元的错误检测系统被配置为如果流过第一存储单元的第一电流和流过第二存储单元的第二电流之间的差小于预定值，则指示错误。

公开(公告)号：US06829191B1

公开(公告)日：2004-12-07

申请号：US10726393

申请日：2003-12-03

Applicant: Frederick A. Perner ,  Kenneth Kay Smith ,  Sarah Morris Brandenberger

Inventor： Frederick A. Perner ,  Kenneth Kay Smith ,  Sarah Morris Brandenberger

IPC: G11C700

CPC classification number: G11C11/16

Abstract: A magnetic memory is disclosed. In one embodiment, the magnetic memory includes first and second memory cells and a read controller coupled to the first and second memory cells. An output controller coupled to the read controller and to the first and second memory cells, wherein the output controller is configured to receive read data in parallel only from the first or second memory cells which have completed the current read operation regardless of whether both the first and second memory cells have completed the current read operation and convert the parallel data to serial data and shift the parallel data to an output in synchronism with the system clock signal.

Abstract translation: 公开了磁存储器。 在一个实施例中，磁存储器包括耦合到第一和第二存储器单元的第一和第二存储器单元和读取控制器。 耦合到读控制器和第一和第二存储器单元的输出控制器，其中输出控制器被配置为仅从已完成当前读操作的第一或第二存储器单元并行地接收读数据，而不管第一 并且第二存储单元已经完成当前的读取操作，并且将并行数据转换成串行数据，并且将并行数据与系统时钟信号同步地移位到输出端。

公开(公告)号：US06791873B1

公开(公告)日：2004-09-14

申请号：US10658442

申请日：2003-09-08

Applicant: Frederick A. Perner

Inventor： Frederick A. Perner

IPC: G11C1100

CPC classification number: G11C5/147 ,  G11C11/15

Abstract: The invention includes an apparatus and method for generating a write current for a magnetic memory cell. The apparatus includes a write current generator for generating a write current, the write current being magnetically coupled to the magnetic memory cell. The apparatus further includes at least one test magnetic memory cell, the write current being magnetically coupled to the at least one test magnetic memory cell. A switching response of the at least one test magnetic memory cell determines a magnitude of the write current generated by the write current generator. The method for determining a write current for a magnetic memory cell includes supplying a test write current to a test magnetic memory cell, sensing a magnetic state of the test magnetic memory cell to determine a switching response of the test magnetic memory cell, and generating the write current having a magnitude that is dependent upon the switching response.

Abstract translation: 本发明包括一种用于产生磁存储单元的写入电流的装置和方法。 该装置包括用于产生写入电流的写入电流发生器，写入电流磁耦合到磁性存储单元。 该装置还包括至少一个测试磁存储单元，该写入电流磁耦合至该至少一个测试磁存储单元。 至少一个测试磁存储器单元的切换响应确定由写入电流发生器产生的写入电流的大小。 用于确定磁存储单元的写入电流的方法包括向测试磁存储单元提供测试写入电流，感测测试磁存储单元的磁状态以确定测试磁存储单元的切换响应， 写入具有取决于切换响应的幅度的电流。

公开(公告)号：US06757188B2

公开(公告)日：2004-06-29

申请号：US10151915

申请日：2002-05-22

Applicant: Frederick A. Perner ,  Lung T. Tran ,  Kenneth J. Eldredge

Inventor： Frederick A. Perner ,  Lung T. Tran ,  Kenneth J. Eldredge

IPC: G11C1100

CPC classification number: G11C11/15 ,  G11C11/16 ,  G11C13/004 ,  G11C27/02 ,  G11C2013/0057

Abstract: A data storage device that includes an array of resistive memory cells. The resistive memory cells may include a magnetic tunnel junction (MTJ) and a thin-film diode. The device may include a circuit that is electrically connected to the array and that is also capable of monitoring a signal current flowing through a selected memory cell. Once the signal current has been monitored, the circuit is capable of comparing the signal current to an average reference current in order to determine which of a first resistance state and a second resistance state the selected memory cell is in. Also, a method for operating the data storage device.

公开(公告)号：US06751147B1

公开(公告)日：2004-06-15

申请号：US10635399

申请日：2003-08-05

Applicant: Kenneth K. Smith ,  Frederick A. Perner ,  Richard L. Hilton

Inventor： Kenneth K. Smith ,  Frederick A. Perner ,  Richard L. Hilton

IPC: G11C1115

CPC classification number: G11C11/15

Abstract: A method of adaptively writing magnetic memory cells of a MRAM is disclosed according to an embodiment of the present invention. The method comprises providing a logical data block of a memory array having magnetic memory cells, each magnetic memory cell in a known initial state and each magnetic memory cell configured along an easy-axis magnetic field generating conductor and writing to the magnetic memory cells using a predefined minimum current level. The method may further comprise sensing the magnetic memory cells to determine if data has been successfully written, incrementing the current level if writing was unsuccessful and repeating above.

Abstract translation: 根据本发明的实施例公开了一种自适应地写入MRAM的磁存储单元的方法。 该方法包括提供具有磁存储单元的存储器阵列的逻辑数据块，具有已知初始状态的每个磁存储单元和沿着易轴磁场产生导体配置的每个磁存储单元，并使用 预定义的最小电流电平。 该方法还可以包括感测磁存储器单元以确定数据是否已被成功写入，如果写入不成功并在上面重复，则递增当前电平。