公开(公告)号：US20090218950A1

公开(公告)日：2009-09-03

申请号：US12320886

申请日：2009-02-06

申请人： Chong-Gi Hong ,  Sung-Yong Lee ,  Jae-Young Park

发明人： Chong-Gi Hong ,  Sung-Yong Lee ,  Jae-Young Park

IPC分类号： H01J1/52 ,  H05K9/00 ,  B44C1/22 ,  B32B37/00

CPC分类号： H01J11/44 ,  H01J11/10 ,  H01J2211/446 ,  H05K9/0096 ,  Y10T156/10

摘要： A single sheet film filter and a manufacturing method thereof and a plasma display apparatus with the single sheet film filter capable of preventing ground problems, securing ground resistance, and reducing ground processing time. This single sheet film filter includes a conductive layer for shielding EMI arranged on one surface of a transparent base film and having a ground portion at an edge region on the base film and a hard coating layer covering the conductive layer in which the ground portion is exposed through a plurality of apertures in a stripe shape formed in the hard coating layer.

摘要翻译： 单片薄膜滤光器及其制造方法以及具有能够防止地面问题，确保接地电阻和降低地面处理时间的单片薄膜滤光器的等离子体显示装置。 该单片膜滤光器包括用于屏蔽布置在透明基膜的一个表面上的EMI的导电层，并且在基膜上的边缘区域具有接地部分，以及覆盖接地部分露出的导电层的硬涂层 通过形成在硬涂层中的条纹形状的多个孔。

公开(公告)号：US20090114977A1

公开(公告)日：2009-05-07

申请号：US12147177

申请日：2008-06-26

申请人： Ki Seon Park ,  Moon Sig Joo ,  Yong Top Kim ,  Jae Young Park ,  Ki Hong Lee

发明人： Ki Seon Park ,  Moon Sig Joo ,  Yong Top Kim ,  Jae Young Park ,  Ki Hong Lee

IPC分类号： H01L29/792 ,  H01L21/28

CPC分类号： H01L29/792 ,  H01L27/11568 ,  H01L29/4234 ,  H01L29/513

摘要： Disclosed herein is a nonvolatile memory device having a charge trapping layer and a method of making the same. The nonvolatile memory device includes a substrate, a tunneling layer disposed on the substrate, a charge trapping layer disposed on the tunneling layer, a first blocking layer disposed on the charge trapping layer, a second blocking layer disposed on the first blocking layer, and a control gate electrode disposed on the second blocking layer. A first band gap between the first blocking layer and the charge trapping layer is larger than a second band gap between the second blocking layer and the charge trapping layer.

摘要翻译： 这里公开了具有电荷捕获层的非易失性存储器件及其制造方法。 非易失性存储器件包括衬底，设置在衬底上的隧道层，设置在隧道层上的电荷俘获层，设置在电荷俘获层上的第一阻挡层，设置在第一阻挡层上的第二阻挡层，以及 设置在第二阻挡层上的控制栅电极。 第一阻挡层和电荷俘获层之间的第一带隙大于第二阻挡层和电荷俘获层之间的第二带隙。

公开(公告)号：US07099272B2

公开(公告)日：2006-08-29

申请号：US10021440

申请日：2001-12-19

申请人： Jae Young Park

发明人： Jae Young Park

IPC分类号： G06F11/00 ,  H04L12/56

CPC分类号： H04J3/1617 ,  H04J2203/0089 ,  H04L2012/5616 ,  H04L2012/5674 ,  H04L2012/5685

摘要： A synchronous transmission module is disclosed, including a UTOPIA interface chip for transmitting UTOPIA level-2 data. A pair of STM interface chips receive UTOPIA level-1 data. A UTOPIA memory converts UTOPIA level-2 data into UTOPIA level-1 data and transfers the UTOPIA level-1 data to one of the pair of STM interface chips, according to a transmission address. A UTOPIA interface control part converts the transmission address, depending on states of the STM interface chips. Therefore, variable duplexing of the plurality of STM interface chips in a board is made possible.

公开(公告)号：US20060135158A1

公开(公告)日：2006-06-22

申请号：US10525922

申请日：2003-08-07

申请人： Sang-Yoen Lee ,  Hee-Hyuk Ham ,  Ki-Moon Kim ,  Young-Tae Noh ,  Jae-Young Park

发明人： Sang-Yoen Lee ,  Hee-Hyuk Ham ,  Ki-Moon Kim ,  Young-Tae Noh ,  Jae-Young Park

IPC分类号： H04Q7/20

CPC分类号： H04M3/42102 ,  H04M3/42017 ,  H04M2207/18 ,  H04W4/12 ,  H04W8/04 ,  H04W8/18 ,  H04W40/00 ,  H04W60/00 ,  H04W76/10 ,  H04W80/00 ,  H04W88/14 ,  H04W92/02 ,  H04W92/24

摘要： A method for controlling routing information for intellectual peripherals (IPs) in a subscriber-based ring-back-tone service. The routing information to be routed to IPs (50) corresponding to subscribers is classified on a subscriber telephone number-by-number basis, a subscriber telephone office number-by-number basis, a subscriber telephone office number group-by-group basis or a subscriber's major activity area-by-area basis according to a selection. The classified routing information is set and registered in a home location register (HLR) (10). When the HLR (10) receives a location registration request message from a terminal of an arbitrary subscriber, a corresponding routing information item to be routed to an IP (50) corresponding to the subscriber's terminal among the classified, set and registered routing information is contained within a response message to the location registration request message, and the response message is provided to a terminating mobile switching center (T MSC) (32).

摘要翻译： 一种在基于用户的回铃音服务中控制智能外设（IP）的路由信息​​的方法。 要路由到与用户相对应的IP（50）的路由信息​​按用户电话号码分组，逐个用户电话局，逐个用户电话号码，或者 根据选择，用户的主要活动逐区。 分类路由信息被设置并登记在归属位置寄存器（HLR）（10）中。 当HLR（10）从任意用户的终端接收到位置注册请求消息时，将包含要分配，设置和登记的路由信息​​中的对应于用户终端的IP（50）的对应路由选择信息项目 在到位置登记请求消息的响应消息内，向终端移动交换中心（T MSC）（32）提供响应消息。

公开(公告)号：US07010112B2

公开(公告)日：2006-03-07

申请号：US10525609

申请日：2003-08-07

申请人： Sang-Yoen Lee ,  Hee-Hyuk Ham ,  Ki-Moon Kim ,  Young-Tae Noh ,  Jae-Young Park

发明人： Sang-Yoen Lee ,  Hee-Hyuk Ham ,  Ki-Moon Kim ,  Young-Tae Noh ,  Jae-Young Park

IPC分类号： H04M3/42 ,  H04M7/00

CPC分类号： H04W4/16 ,  H04M3/42017 ,  H04W8/18 ,  H04W76/10 ,  H04W76/30

摘要： The present invention relates to a method of managing a trunk, and querying and ascertaining a ring-back sound to provide the ring-back sound in a subscriber-based ring-back sound service. In the trunk management method, a terminating mobile switching center (32) requests the intelligent peripheral (50) to release a trunk call when the terminating mobile switching center recognizes the answer of the terminating subscriber or when a first predetermined period of time has elapsed from a time when it is recognized that a corresponding ring-back sound is provided to the originator. Further, the intelligent peripheral (50) requests the terminating mobile switching center (32) to release the trunk call when a second predetermined period of time has elapsed from a time when the ring-back sound is provided.

摘要翻译： 本发明涉及一种管理中继线的方法，以及查询和确定回铃声以在基于用户的回铃声服务中提供回铃音。 在中继管理方法中，终端移动交换中心（32）在终端移动交换中心识别到终止用户的应答时或当第一预定时间段已经过去时请求智能外设（50）释放中继线呼叫 当认识到向发起者提供相应的回铃音时。 此外，当从提供回铃声的时间经过第二预定时间段时，智能外设（50）请求终接移动交换中心（32）释放中继线呼叫。

公开(公告)号：US06970436B2

公开(公告)日：2005-11-29

申请号：US09847347

申请日：2001-05-03

申请人： Jae Young Park

发明人： Jae Young Park

IPC分类号： H04L12/56 ,  H04B7/00

CPC分类号： H04L12/5601 ,  H04L2012/5607 ,  H04L2012/5636

摘要： An apparatus for monitoring asynchronous transfer mode cells in the communication system is proper for recognizing state information of asynchronous transfer mode cells transceiving between a base transceiver station and a base station controller. Accordingly, the apparatus enables to monitor the contents of the cell by comparing VPI/VCI of the ATM cells inputted to the multiplexing/demultiplexing part to the other VPI/VCI latched hardware, have the cell bus RX I/F count the number of the error-occurring ATM cells by carrying out header error checks of the ATM cells inputted to the cell bus RX I/F itself, and find out how long the cell transferring time takes for transceiving loop is found out by transceiving the test ATM cells between the multiplexing/demultiplexing part being the ATM low rate subscriber multiplexing/demultiplexing board assembly (ALMA) and the base transceiver station.

摘要翻译： 用于监视通信系统中的异步传输模式小区的装置适用于识别在基站和基站控制器之间收发的异步传输模式小区的状态信息。 因此，该装置能够通过将输入到复用/解复用部分的ATM信元的VPI / VCI与其他VPI / VCI锁存硬件进行比较来监视小区的内容，具有信元总线RX I / F的数量 通过对输入到信元总线RX I / F本身的ATM信元进行报头错误检查，发现出现ATM ATM信元的错误发生，并且通过在ATM接收单元之间收发测试ATM信元，找出信元传送时间对收发环路所需的时间 复用/解复用部分是ATM低速率用户复用/解复用板组合（ALMA）和基站收发台。

公开(公告)号：US06700153B2

公开(公告)日：2004-03-02

申请号：US10136385

申请日：2002-05-02

申请人： Jung-Hwan Oh ,  Ki-Hyun Hwang ,  Jae-Young Park ,  In-Seak Hwang ,  Young-Wook Park

发明人： Jung-Hwan Oh ,  Ki-Hyun Hwang ,  Jae-Young Park ,  In-Seak Hwang ,  Young-Wook Park

IPC分类号： H01L27108

CPC分类号： H01L28/91 ,  H01L27/10855 ,  Y10T29/5111

摘要： An etch stop layer is formed over a surface of an interlayer insulating layer and over a surface of a conductive plug extending at a depth from the surface of the interlayer insulating layer. A lower mold layer is deposited over the etch stop layer, and a wet etch rate of the lower mold layer is adjusted by adding dopants to the lower mold layer during formation of the lower mold layer, and by annealing the lower mold layer. An upper mold layer is then deposited over the surface of the lower mold layer, such that a wet etch rate of the upper mold layer is less than the adjusted wet etch rate of the lower mold layer. The upper mold layer, the lower mold layer and the etch stop layer are then subjected to dry etching to form an opening therein which exposes at least a portion of the surface of the contact plug. Then a wet etching of the upper mold layer and the lower mold layer is performed so as to increase a size of the opening at the lower mold layer and so at to expose a surface portion of the etch stop layer adjacent the surface of the conductive plug. A conductive material is then deposited over the surface of the opening in the upper and lower mold layers to define a capacitor electrode.

公开(公告)号：US20160293705A1

公开(公告)日：2016-10-06

申请号：US14977865

申请日：2015-12-22

申请人： Han-ki Lee ,  Jae-Young Park ,  Dong-Hun Lee ,  Bon-Young Koo ,  Sun-Young Lee ,  Jae-Jong Han

发明人： Han-ki Lee ,  Jae-Young Park ,  Dong-Hun Lee ,  Bon-Young Koo ,  Sun-Young Lee ,  Jae-Jong Han

IPC分类号： H01L29/10 ,  H01L29/786 ,  H01L29/423 ,  H01L29/78

CPC分类号： H01L29/1054 ,  H01L29/0673 ,  H01L29/068 ,  H01L29/42392 ,  H01L29/66795 ,  H01L29/775 ,  H01L29/785 ,  H01L29/78696

摘要： A semiconductor device and a method of fabricating the same are provided. The semiconductor device includes a multi-channel active pattern including germanium and an inner region and an outer region, the outer region formed along a profile of the inner region, and a germanium fraction of the outer region being smaller than a germanium fraction of the inner region. A gate electrode intersects the multi-channel active pattern.

摘要翻译： 提供半导体器件及其制造方法。 半导体器件包括包括锗和内部区域以及外部区域的多通道活性图案，沿着内部区域的轮廓形成外部区域，并且外部区域的锗部分小于内部区域的锗部分 地区。 栅电极与多通道有源图案相交。

公开(公告)号：US08941972B2

公开(公告)日：2015-01-27

申请号：US13572407

申请日：2012-08-10

申请人： Myung Jun Park ,  Sang Hoon Kwon ,  Chang Hoon Kim ,  Hyun Hee Gu ,  Jae Young Park ,  Da Young Choi ,  Kyu Ha Lee ,  Byung Jun Jeon

发明人： Myung Jun Park ,  Sang Hoon Kwon ,  Chang Hoon Kim ,  Hyun Hee Gu ,  Jae Young Park ,  Da Young Choi ,  Kyu Ha Lee ,  Byung Jun Jeon

IPC分类号： H01G4/30 ,  H01B3/12 ,  H01G4/12 ,  H01G4/232

CPC分类号： H01B3/12 ,  H01G4/12 ,  H01G4/2325 ,  H01G4/30 ,  Y10T29/417

摘要： There are provided a multilayer ceramic electronic component and a method of manufacturing the same. The multilayer ceramic electronic component includes: a ceramic body including a dielectric layer; first and second internal electrodes disposed within the ceramic body to face each other, while having the dielectric layer interposed therebetween; and first external electrodes electrically connected to first and second internal electrodes and second external electrodes formed on the first external electrodes, wherein the first and second external electrodes include a conductive metal and a glass, and when the second external electrodes are divided into three equal parts in a thickness direction, an area of the glass in central parts thereof with respect to an area of the central parts is 30 to 80%. Therefore, sealing properties of a chip is improved, whereby a multilayer ceramic electronic component having improved reliability may be implemented.

摘要翻译： 提供了一种多层陶瓷电子部件及其制造方法。 多层陶瓷电子部件包括：陶瓷体，其包括电介质层; 第一和第二内部电极设置在陶瓷体内以彼此面对，同时介于其间的电介质层; 以及第一外部电极，电连接到形成在第一外部电极上的第一和第二内部电极和第二外部电极，其中第一和第二外部电极包括导电金属和玻璃，并且当第二外部电极被分成三个相等部分 在厚度方向上，中央部分的玻璃的面积相对于中央部的面积为30〜80％。 因此，提高了芯片的密封性，可以实现具有提高的可靠性的多层陶瓷电子部件。

公开(公告)号：US08941971B2

公开(公告)日：2015-01-27

申请号：US13569703

申请日：2012-08-08

申请人： Myung Jun Park ,  Kyu Ha Lee ,  Da Young Choi ,  Chang Hoon Kim ,  Hyun Hee Gu ,  Jae Young Park ,  Sang Hoon Kwon ,  Byung Jun Jeon

发明人： Myung Jun Park ,  Kyu Ha Lee ,  Da Young Choi ,  Chang Hoon Kim ,  Hyun Hee Gu ,  Jae Young Park ,  Sang Hoon Kwon ,  Byung Jun Jeon

IPC分类号： H01G4/30

CPC分类号： H01G4/30 ,  H01G4/12 ,  H01G4/232 ,  H01G4/2325

摘要： There are provided a multilayer ceramic electronic component comprising: a ceramic main body including a dielectric layer and having first and second main faces, third and fourth side faces opposed in a length direction, and fifth and sixth faces opposed in a width direction; first and second internal electrodes; and one or more first external electrodes formed on the fifth face and one or more second external electrodes formed on the sixth face, wherein the first and second external electrodes have an average thickness ranging from 3 μm to 30 μm, and when at least one of the first and second external electrodes is divided into three equal parts in a thickness direction, an area of glass in central area portions thereof is 35% to 80% of the total areas of the central area portions.

摘要翻译： 提供了一种多层陶瓷电子部件，包括：陶瓷主体，包括电介质层，具有第一和第二主面，沿长度方向相对的第三和第四侧面以及沿宽度方向相对的第五和第六面; 第一和第二内部电极; 以及形成在第五面上的一个或多个第一外部电极和形成在第六面上的一个或多个第二外部电极，其中第一外部电极和第二外部电极具有3μm至30μm的平均厚度，并且当至少一个 第一外部电极和第二外部电极在厚度方向上分成三个相等的部分，其中心区域部分的玻璃面积为中心区域部分总面积的35％至80％。