公开(公告)号：US07955960B2

公开(公告)日：2011-06-07

申请号：US12052914

申请日：2008-03-21

申请人： Se Jun Kim ,  Eun Seok Choi ,  Kyoung Hwan Park ,  Hyun Seung Yoo ,  Myung Shik Lee ,  Young Ok Hong ,  Jung Ryul Ahn ,  Yong Top Kim ,  Kyung Pil Hwang ,  Won Sic Woo ,  Jae Young Park ,  Ki Hong Lee ,  Ki Seon Park ,  Moon Sig Joo

发明人： Se Jun Kim ,  Eun Seok Choi ,  Kyoung Hwan Park ,  Hyun Seung Yoo ,  Myung Shik Lee ,  Young Ok Hong ,  Jung Ryul Ahn ,  Yong Top Kim ,  Kyung Pil Hwang ,  Won Sic Woo ,  Jae Young Park ,  Ki Hong Lee ,  Ki Seon Park ,  Moon Sig Joo

IPC分类号： H01L21/336

CPC分类号： H01L29/513 ,  H01L27/105 ,  H01L27/11568 ,  H01L27/11573 ,  H01L29/792

摘要： A nonvolatile memory device and a method of fabricating the same is provided to prevent charges stored in a charge trap layer from moving to neighboring memory cells. The method of fabricating a nonvolatile memory device, includes forming a first dielectric layer on a semiconductor substrate in which active regions are defined by isolation layers, forming a charge trap layer on the first dielectric layer, removing the first dielectric layer and the charge trap layer over the isolation layers, forming a second dielectric layer on the isolation layers including the charge trap layer, and forming a conductive layer on the second dielectric layer.

摘要翻译： 提供了一种非易失性存储器件及其制造方法，以防止存储在电荷陷阱层中的电荷移动到相邻存储器单元。 制造非易失性存储器件的方法包括在半导体衬底上形成第一电介质层，其中有源区由隔离层限定，在第一电介质层上形成电荷陷阱层，去除第一介电层和电荷陷阱层 在隔离层上，在包括电荷陷阱层的隔离层上形成第二电介质层，并在第二介电层上形成导电层。

公开(公告)号：US20090108332A1

公开(公告)日：2009-04-30

申请号：US12163401

申请日：2008-06-27

申请人： Moon Sig Joo ,  Ki Seon Park ,  Yong Top Kim ,  Jae Young Park ,  Ki Hong Lee

发明人： Moon Sig Joo ,  Ki Seon Park ,  Yong Top Kim ,  Jae Young Park ,  Ki Hong Lee

IPC分类号： H01L29/792 ,  H01L21/28

CPC分类号： H01L29/792 ,  H01L29/40117 ,  H01L29/513

摘要： Disclosed herein are a non-volatile memory device and a method of manufacturing the same. The non-volatile memory device includes a substrate, a tunneling layer disposed on the substrate, a charge trapping layer disposed on the tunneling layer, a blocking layer disposed on the charge trapping layer, and a control gate electrode disposed on the blocking layer. The blocking layer in contact with the charge trapping layer includes an aluminum nitride layer.

摘要翻译： 这里公开了一种非易失性存储器件及其制造方法。 非易失性存储器件包括衬底，设置在衬底上的隧穿层，设置在隧道层上的电荷俘获层，设置在电荷俘获层上的阻挡层，以及设置在阻挡层上的控制栅电极。 与电荷捕获层接触的阻挡层包括氮化铝层。

公开(公告)号：US20090114977A1

公开(公告)日：2009-05-07

申请号：US12147177

申请日：2008-06-26

申请人： Ki Seon Park ,  Moon Sig Joo ,  Yong Top Kim ,  Jae Young Park ,  Ki Hong Lee

发明人： Ki Seon Park ,  Moon Sig Joo ,  Yong Top Kim ,  Jae Young Park ,  Ki Hong Lee

IPC分类号： H01L29/792 ,  H01L21/28

CPC分类号： H01L29/792 ,  H01L27/11568 ,  H01L29/4234 ,  H01L29/513

摘要： Disclosed herein is a nonvolatile memory device having a charge trapping layer and a method of making the same. The nonvolatile memory device includes a substrate, a tunneling layer disposed on the substrate, a charge trapping layer disposed on the tunneling layer, a first blocking layer disposed on the charge trapping layer, a second blocking layer disposed on the first blocking layer, and a control gate electrode disposed on the second blocking layer. A first band gap between the first blocking layer and the charge trapping layer is larger than a second band gap between the second blocking layer and the charge trapping layer.

摘要翻译： 这里公开了具有电荷捕获层的非易失性存储器件及其制造方法。 非易失性存储器件包括衬底，设置在衬底上的隧道层，设置在隧道层上的电荷俘获层，设置在电荷俘获层上的第一阻挡层，设置在第一阻挡层上的第二阻挡层，以及 设置在第二阻挡层上的控制栅电极。 第一阻挡层和电荷俘获层之间的第一带隙大于第二阻挡层和电荷俘获层之间的第二带隙。

公开(公告)号：US20090108334A1

公开(公告)日：2009-04-30

申请号：US12164720

申请日：2008-06-30

申请人： Moon Sig Joo ,  Seung Ho Pyi ,  Ki Seon Park ,  Yong Top Kim ,  Jae Young Park ,  Ki Hong Lee

发明人： Moon Sig Joo ,  Seung Ho Pyi ,  Ki Seon Park ,  Yong Top Kim ,  Jae Young Park ,  Ki Hong Lee

IPC分类号： H01L21/28 ,  H01L29/792

CPC分类号： H01L29/792 ,  H01L27/11565 ,  H01L27/11568

摘要： A charge trapping device includes a plurality of isolation layers, a plurality of charge trapping layers, a blocking layer, and a control gate electrode. The isolation layers define active regions, and the isolation layers and active regions extend as respective stripes along a first direction on a semiconductor substrate. The charge trapping layers are disposed on the active regions in island forms where the charge trapping layers are separated from each other in the first direction and disposed on the respective active regions between the isolation layers in a second direction perpendicular to the first direction. The blocking layer is disposed on the isolation layers and the charge trapping layers. The control gate electrode is disposed on the charge trapping layer.

摘要翻译： 电荷俘获装置包括多个隔离层，多个电荷俘获层，阻挡层和控制栅电极。 隔离层限定有源区，并且隔离层和有源区沿着半导体衬底上的第一方向作为相应条延伸。 电荷捕获层以岛形式设置在有源区，其中电荷捕获层在第一方向上彼此分离，并且在垂直于第一方向的第二方向上设置在隔离层之间的相应有源区上。 阻挡层设置在隔离层和电荷俘获层上。 控制栅电极设置在电荷捕获层上。

公开(公告)号：US08941972B2

公开(公告)日：2015-01-27

申请号：US13572407

申请日：2012-08-10

申请人： Myung Jun Park ,  Sang Hoon Kwon ,  Chang Hoon Kim ,  Hyun Hee Gu ,  Jae Young Park ,  Da Young Choi ,  Kyu Ha Lee ,  Byung Jun Jeon

发明人： Myung Jun Park ,  Sang Hoon Kwon ,  Chang Hoon Kim ,  Hyun Hee Gu ,  Jae Young Park ,  Da Young Choi ,  Kyu Ha Lee ,  Byung Jun Jeon

IPC分类号： H01G4/30 ,  H01B3/12 ,  H01G4/12 ,  H01G4/232

CPC分类号： H01B3/12 ,  H01G4/12 ,  H01G4/2325 ,  H01G4/30 ,  Y10T29/417

摘要： There are provided a multilayer ceramic electronic component and a method of manufacturing the same. The multilayer ceramic electronic component includes: a ceramic body including a dielectric layer; first and second internal electrodes disposed within the ceramic body to face each other, while having the dielectric layer interposed therebetween; and first external electrodes electrically connected to first and second internal electrodes and second external electrodes formed on the first external electrodes, wherein the first and second external electrodes include a conductive metal and a glass, and when the second external electrodes are divided into three equal parts in a thickness direction, an area of the glass in central parts thereof with respect to an area of the central parts is 30 to 80%. Therefore, sealing properties of a chip is improved, whereby a multilayer ceramic electronic component having improved reliability may be implemented.

摘要翻译： 提供了一种多层陶瓷电子部件及其制造方法。 多层陶瓷电子部件包括：陶瓷体，其包括电介质层; 第一和第二内部电极设置在陶瓷体内以彼此面对，同时介于其间的电介质层; 以及第一外部电极，电连接到形成在第一外部电极上的第一和第二内部电极和第二外部电极，其中第一和第二外部电极包括导电金属和玻璃，并且当第二外部电极被分成三个相等部分 在厚度方向上，中央部分的玻璃的面积相对于中央部的面积为30〜80％。 因此，提高了芯片的密封性，可以实现具有提高的可靠性的多层陶瓷电子部件。

公开(公告)号：US08941971B2

公开(公告)日：2015-01-27

申请号：US13569703

申请日：2012-08-08

申请人： Myung Jun Park ,  Kyu Ha Lee ,  Da Young Choi ,  Chang Hoon Kim ,  Hyun Hee Gu ,  Jae Young Park ,  Sang Hoon Kwon ,  Byung Jun Jeon

发明人： Myung Jun Park ,  Kyu Ha Lee ,  Da Young Choi ,  Chang Hoon Kim ,  Hyun Hee Gu ,  Jae Young Park ,  Sang Hoon Kwon ,  Byung Jun Jeon

IPC分类号： H01G4/30

CPC分类号： H01G4/30 ,  H01G4/12 ,  H01G4/232 ,  H01G4/2325

摘要： There are provided a multilayer ceramic electronic component comprising: a ceramic main body including a dielectric layer and having first and second main faces, third and fourth side faces opposed in a length direction, and fifth and sixth faces opposed in a width direction; first and second internal electrodes; and one or more first external electrodes formed on the fifth face and one or more second external electrodes formed on the sixth face, wherein the first and second external electrodes have an average thickness ranging from 3 μm to 30 μm, and when at least one of the first and second external electrodes is divided into three equal parts in a thickness direction, an area of glass in central area portions thereof is 35% to 80% of the total areas of the central area portions.

摘要翻译： 提供了一种多层陶瓷电子部件，包括：陶瓷主体，包括电介质层，具有第一和第二主面，沿长度方向相对的第三和第四侧面以及沿宽度方向相对的第五和第六面; 第一和第二内部电极; 以及形成在第五面上的一个或多个第一外部电极和形成在第六面上的一个或多个第二外部电极，其中第一外部电极和第二外部电极具有3μm至30μm的平均厚度，并且当至少一个 第一外部电极和第二外部电极在厚度方向上分成三个相等的部分，其中心区域部分的玻璃面积为中心区域部分总面积的35％至80％。

公开(公告)号：US08767375B2

公开(公告)日：2014-07-01

申请号：US13569738

申请日：2012-08-08

申请人： Myung Jun Park ,  Sang Hoon Kwon ,  Jae Young Park ,  Kyu Ha Lee ,  Byung Jun Jeon ,  Da Young Choi ,  Hyun Hee Gu ,  Chang Hoon Kim

发明人： Myung Jun Park ,  Sang Hoon Kwon ,  Jae Young Park ,  Kyu Ha Lee ,  Byung Jun Jeon ,  Da Young Choi ,  Hyun Hee Gu ,  Chang Hoon Kim

IPC分类号： H01G4/228 ,  H01G4/30 ,  H01G4/005 ,  H01G4/12

CPC分类号： H01G4/228 ,  H01G4/005 ,  H01G4/12 ,  H01G4/30

摘要： There are provided a multilayer ceramic electronic component, and a method of fabricating the same. The multilayer ceramic electronic component includes: a ceramic main body including a dielectric layer; first and second internal electrodes disposed to face each other within the ceramic main body; and a first external electrode and a second external electrode, wherein the first and second external electrodes include a conductive metal and glass, and when at least one of the first and second external electrodes is divided into three equal parts in a thickness direction, an area of the glass in a central part thereof is 35% to 80% of the total area of the central part. A multilayer ceramic electronic component having improved reliability may be implemented by enhancing chip air-tightness.

摘要翻译： 提供了一种多层陶瓷电子部件及其制造方法。 多层陶瓷电子部件包括：陶瓷主体，其包括电介质层; 第一和第二内部电极，其设置成在陶瓷主体内彼此面对; 以及第一外部电极和第二外部电极，其中所述第一和第二外部电极包括导电金属和玻璃，并且当所述第一外部电极和所述第二外部电极中的至少一个在厚度方向上被分成三个相等的部分时， 的中心部分的玻璃的总面积的35％至80％。 具有提高的可靠性的多层陶瓷电子部件可以通过提高芯片气密性来实现。

公开(公告)号：US20060109968A1

公开(公告)日：2006-05-25

申请号：US10530020

申请日：2003-08-22

申请人： Hee Hahm ,  Ki Mun Kim ,  Sang Yun Lee ,  Yeong No ,  Jae Young Park

发明人： Hee Hahm ,  Ki Mun Kim ,  Sang Yun Lee ,  Yeong No ,  Jae Young Park

IPC分类号： H04M3/42 ,  H04Q7/38

CPC分类号： H04W4/16 ,  H04M3/42017 ,  H04M3/4211 ,  H04M3/42153 ,  H04M19/041 ,  H04W8/20

摘要： The present invention relates to a method for providing a caller with an arbitrary sound pre-stored in an exchanger that is chosen by a called subscriber instead of a conventional RBT (RingBack Tone). The present method comprises: a first step, conducted by an HLR (Home Location Register) when a location request message is received from a call-originating exchanger because of call connection request to a terminal, of furnishing a call-terminating exchanger with information on whether or not an RBT is to be replaced for the terminal through a routing information request message that is sent to the call-terminating exchanger; and a second step, conducted by the call-terminating exchanger when a trunk connection request from a call-originating exchanger is recognized, of searching for a sound code assigned to the terminal based on the information, and providing a caller with a pre-stored RBT-replacing sound associated with the found sound code as an RBT.

摘要翻译： 本发明涉及一种用于向呼叫者提供预先存储在由被叫用户而不是常规RBT（RingBack Tone））选择的交换机中的任意声音的方法。 本方法包括：第一步骤，当由呼叫连接请求向终端接收来自呼叫始发交换机的位置请求消息时，由HLR（归属位置寄存器）进行，为呼叫终止交换机提供关于 是否通过发送到呼叫终接交换机的路由信息​​请求消息为终端替换RBT; 以及第二步骤，当来自呼叫始发交换机的中继连接请求被识别时，由呼叫终接交换机进行的第二步骤是基于该信息搜索分配给终端的声音代码，并向主叫方提供预存储 将发现的声码与RBT相关联的RBT替换声音。

公开(公告)号：US09542742B2

公开(公告)日：2017-01-10

申请号：US14168832

申请日：2014-01-30

申请人： Ivana To{hacek over (s)}ić ,  Jae Young Park ,  Kathrin Berkner

发明人： Ivana To{hacek over (s)}ić ,  Jae Young Park ,  Kathrin Berkner

IPC分类号： H04N13/02 ,  G06T7/00 ,  H04N17/00

CPC分类号： G06T7/80 ,  H04N13/232 ,  H04N17/002

摘要： The pupil image function (PIF) matrix of a plenoptic imaging system is calibrated, taking advantage of the low rank of the PIF matrix. In one approach, the low rank is utilized by identifying a subspace for the PIF matrix and then estimating the PIF matrix within that subspace. This can lead to a significant reduction in the number of calibration patterns used to estimate the PIF matrix.

摘要翻译： 利用PIF矩阵的低等级来校正全息成像系统的瞳孔图像功能（PIF）矩阵。 在一种方法中，通过识别用于PIF矩阵的子空间，然后估计该子空间内的PIF矩阵来利用低等级。 这可能导致用于估计PIF矩阵的校准图案的数量的显着减少。

公开(公告)号：US07141116B2

公开(公告)日：2006-11-28

申请号：US11095496

申请日：2005-04-01

申请人： Yong Hoon Son ,  Jae Young Park ,  Cha Dong Yeo ,  Jong Wook Lee ,  Yu Gyun Shin

发明人： Yong Hoon Son ,  Jae Young Park ,  Cha Dong Yeo ,  Jong Wook Lee ,  Yu Gyun Shin

IPC分类号： C30B25/12

CPC分类号： C30B1/023

摘要： Provided are improved methods for forming silicon films, particularly single-crystal silicon films from amorphous silicon films in which a single-crystal silicon substrate is prepared by removing any native oxide, typically using an aqueous HF solution, and placed in a reaction chamber. The substrate is then heated from about 350° C. to a first deposition temperature under a first ambient to induce single-crystal epitaxial silicon deposition primarily on exposed silicon surfaces. The substrate is then heated to a second deposition temperature under a second ambient that will maintain the single-crystal epitaxial silicon deposition on exposed single-crystal silicon while inducing amorphous epitaxial silicon deposition on insulating surfaces. The amorphous epitaxial silicon can then be converted to single-crystal silicon using a solid phase epitaxy process to form a thin, high quality silicon layer. The first and second ambients include at least one silicon source gas and may include a non-oxidizing carrier gas.

摘要翻译： 提供了用于形成硅膜，特别是来自非晶硅膜的单晶硅膜的改进方法，其中通过除去任何天然氧化物（通常使用HF水溶液）并置于反应室中制备单晶硅衬底。 然后将衬底在第一个环境下从约350℃加热到第一沉积温度，以主要在暴露的硅表面上引发单晶外延硅沉积。 然后将衬底在第二环境下被加热到第二沉积温度，其将在暴露的单晶硅上保持单晶外延硅沉积，同时在绝缘表面上诱导非晶外延硅沉积。 然后可以使用固相外延工艺将非晶外延硅转化为单晶硅，以形成薄的，高质量的硅层。 第一和第二环境包括至少一个硅源气体并且可以包括非氧化性载气。