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    Access of register files of other threads using synchronization
    16.
    发明授权
    Access of register files of other threads using synchronization 失效
    使用同步访问其他线程的注册文件

    公开(公告)号：US08261046B2

    公开(公告)日：2012-09-04

    申请号：US12446930

    申请日：2006-10-27

    Applicant: Enric Gibert ,  Josep M. Codina ,  Fernando Latorre ,  José Alejandro Piñeiro ,  Pedro López ,  Antonio González

    Inventor： Enric Gibert ,  Josep M. Codina ,  Fernando Latorre ,  José Alejandro Piñeiro ,  Pedro López ,  Antonio González

    IPC: G06F9/30

    CPC classification number: G06F9/3851 ,  G06F9/3838 ,  G06F9/526

    Abstract: In one embodiment, the present invention includes a method for accessing registers associated with a first thread while executing a second thread. In one such embodiment a method may include preventing an instruction of a first thread that is to access a source operand from a register file of a second thread from executing if a synchronization indicator associated with the source operand indicates incompletion of a producer operation of the second thread, and executing the instruction if the synchronization indicator indicates completion of the producer operation of the second thread. Other embodiments are described and claimed.

    Abstract translation: 在一个实施例中，本发明包括在执行第二线程时访问与第一线程相关联的寄存器的方法。 在一个这样的实施例中，一种方法可以包括：如果与源操作数相关联的同步指示符表示第二线程的生成器操作的不完备，则可以防止第一线程的指令从第二线程的寄存器文件访问源操作数执行 线程，并且如果同步指示符指示第二线程的生成器操作的完成，则执行指令。 描述和要求保护其他实施例。

    Achieving coherence between dynamically optimized code and original code
    17.
    发明授权
    Achieving coherence between dynamically optimized code and original code 有权
    实现动态优化代码与原始代码之间的一致性

    公开(公告)号：US08190652B2

    公开(公告)日：2012-05-29

    申请号：US11951614

    申请日：2007-12-06

    Applicant: Fernando Latorre ,  Grigorios Magklis ,  Enric Gibert ,  Josep M. Codina ,  Antonio González

    Inventor： Fernando Latorre ,  Grigorios Magklis ,  Enric Gibert ,  Josep M. Codina ,  Antonio González

    IPC: G06F17/30

    CPC classification number: G06F12/1027 ,  G06F12/0875

    Abstract: Techniques for achieving coherence between dynamically optimized code and original code are disclosed. In an embodiment, a search is performed for a first entry for a first page containing a first code region in a first data structure. The first code is used to determine whether a first indicator in the first entry is set to a first value. The first entry is added to the first data structure, in response to failing to find the first entry in the first data structure. A second search may be performed for a second entry for the first code region in a second data structure, in response to determining that the first indicator is set to the first value. Other embodiments are also disclosed and claimed.

    Abstract translation: 公开了实现动态优化代码与原始代码之间的一致性的技术。 在一个实施例中，针对包含第一数据结构中的第一代码区域的第一页面的第一条目执行搜索。 第一个代码用于确定第一个条目中的第一个指示符是否设置为第一个值。 响应于找不到第一个数据结构中的第一个条目，第一个条目被添加到第一个数据结构。 响应于确定第一指示符被设置为第一值，可以针对第二数据结构中的第一代码区域的第二条目执行第二搜索。 还公开并要求保护其他实施例。

    REGISTER CHECKPOINTING MECHANISM FOR MULTITHREADING
    18.
    发明申请
    REGISTER CHECKPOINTING MECHANISM FOR MULTITHREADING 有权
    注册检查机制进行多元化

    公开(公告)号：US20100262812A1

    公开(公告)日：2010-10-14

    申请号：US12420762

    申请日：2009-04-08

    Applicant: Pedro Lopez ,  Carlos Madriles ,  Alejandro Martinez ,  Raul Martinez ,  Josep M. Codina ,  Enric Gibert Codina ,  Fernando Latorre ,  Antonio Gonzalez

    Inventor： Pedro Lopez ,  Carlos Madriles ,  Alejandro Martinez ,  Raul Martinez ,  Josep M. Codina ,  Enric Gibert Codina ,  Fernando Latorre ,  Antonio Gonzalez

    IPC: G06F9/30

    CPC classification number: G06F9/3863 ,  G06F9/30043 ,  G06F9/3842 ,  G06F9/3851 ,  G06F11/1402

    Abstract: Methods and apparatus are disclosed for using a register checkpointing mechanism to resolve multithreading mis-speculations. Valid architectural state is recovered and execution is rolled back. Some embodiments include memory to store checkpoint data. Multiple thread units concurrently execute threads. They execute a checkpoint mask instruction to initialize memory to store active checkpoint data including register contents and a checkpoint mask indicating the validity of stored register contents. As register contents change, threads execute checkpoint write instructions to store register contents and update the checkpoint mask. Threads also execute a recovery function instruction to store a pointer to a checkpoint recovery function, and in response to mis-speculation among the threads, branch to the checkpoint recovery function. Threads then execute one or more checkpoint read instructions to copy data from a valid checkpoint storage area into the registers necessary to recover a valid architectural state, from which execution may resume.

    Abstract translation: 公开了使用寄存器检查点机制来解决多线程错误猜测的方法和装置。 恢复有效的架构状态并回滚执行。 一些实施例包括用于存储检查点数据的存储器。 多个线程单元同时执行线程。 它们执行检查点掩码指令来初始化存储器以存储包括寄存器内容的活动检查点数据和指示存储的寄存器内容的有效性的检查点掩码。 随着寄存器内容的改变，线程执行检查点写入指令来存储寄存器内容并更新检查点掩码。 线程还执行恢复功能指令来存储指向检查点恢复功能的指针，并且响应于线程之间的误推测，分支到检查点恢复功能。 线程然后执行一个或多个检查点读取指令，以将数据从有效的检查点存储区域复制到恢复有效架构状态所需的寄存器，从中可以恢复执行。

    ACHIEVING COHERENCE BETWEEN DYNAMICALLY OPTIMIZED CODE AND ORIGINAL CODE
    19.
    发明申请
    ACHIEVING COHERENCE BETWEEN DYNAMICALLY OPTIMIZED CODE AND ORIGINAL CODE 有权
    实现动态优化代码与原始代码之间的一致性

    公开(公告)号：US20090150335A1

    公开(公告)日：2009-06-11

    申请号：US11951614

    申请日：2007-12-06

    Applicant: Fernando Latorre ,  Grigorios Magklis ,  Enric Gibert ,  Josep M. Codina ,  Antonio Gonzalez

    Inventor： Fernando Latorre ,  Grigorios Magklis ,  Enric Gibert ,  Josep M. Codina ,  Antonio Gonzalez

    IPC: G06F7/00 ,  G06F17/30

    CPC classification number: G06F12/1027 ,  G06F12/0875

    Abstract: An apparatus comprising a first search logic to search for a first entry for a first page containing a first code region in a first data structure to determine whether a first indicator in the first entry is set to a first value; an adder logic to add the first entry to the first data structure, in response to failing to find the first entry in the first data structure; a second search logic to search for a second entry for the first code region in a second data structure, in response to determining that the first indicator is set to the first value, wherein one or more optimized code regions corresponding to the first page from a code cache are to be removed in response to determining that the first page may have been modified, and wherein the first indicator is to be set to a second value.

    Abstract translation: 一种装置，包括：第一搜索逻辑，用于搜索包含第一数据结构中的第一代码区域的第一页面的第一条目，以确定第一条目中的第一指示符是否被设置为第一值; 响应于未能找到第一数据结构中的第一条目而将第一条目添加到第一数据结构的加法器逻辑; 响应于确定所述第一指示符被设置为所述第一值，搜索第二数据结构中的所述第一代码区域的第二条目的第二搜索逻辑，其中对应于来自第一值的第一页的一个或多个优化代码区域 响应于确定第一页面可能被修改而要删除代码高速缓存，并且其中第一指示符将被设置为第二值。

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